Abstract: Techniques regarding root cause analyses based on time series data are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise maintenance component that can detect a cause of failure for a mechanical system by employing a greedy hill climbing process to perform a polynomial number of conditional independence tests to determine a Granger causality between variables from time series data of the mechanical system given a conditioning set.

Abstract: A computer-implemented method may include retrieving, via a remote data bus from a data store remote from a hardware accelerator to a local memory device (LMD) included in the hardware accelerator, (1) a filter matrix comprising a set of filter vectors corresponding to a filter location included in each of a set of filters of a convolutional layer of an artificial neural network (ANN), and (2) an activation matrix comprising a primary and a secondary set of activation vectors, each activation vector included in an activation volume inputted into the convolutional layer. The method may also include directing a hardware matrix multiplication unit (MMU) included in the hardware accelerator and communicatively coupled to the LMD via a local data bus, to execute a matrix multiplication operation (MMO) using the filter matrix and the activation matrix.

Abstract: A system and method to determine location information with respect to a plurality of portable devices, with potentially a large number of portable devices such as 40 or more portable devices in proximity to the system. The system may connect to and locate each of the plurality of portable devices in proximity to the system. The location information may be determined with respect to an object, such as a vehicle or building, and optionally within a larger system of objects, such as a mass transit system.

Abstract: A liquid crystal display (LCD) and a driving method thereof are disclosed. The LCD includes: an LCD panel, a grayscale voltage output portion and a grayscale voltage adjusting portion. The LCD panel includes a deformation area formed by bonding of a driver integrated circuit, and the deformation area includes a first subpixel. The grayscale voltage output portion is configured to output a first grayscale voltage to the first subpixel. The grayscale voltage adjusting portion is configured to adjust the first grayscale voltage into a second grayscale voltage, so that a brightness of the first subpixel at the second grayscale voltage is less than a brightness of the first subpixel at the first grayscale voltage.

Abstract: A method of assessing at least one of audio and video HDMI performance capabilities of an AV system including one or more sources and one or more sinks, interconnected in a first configuration comprises using an app running on a smart device, wirelessly connected to the AV system, to present audio and/or video performance capability information for each source and sink to a user of the system, based on EDID information received by the smart device from each source and sink. In one embodiment, the app also presents a determination of maximum theoretical data handling capacity of the AV system in the first configuration; runs a test to assess actual data handling capacity of the AC system in the first configuration; and presents one or more results of the test to the user.

Abstract: A system and method to determine location information with respect to a plurality of portable devices, with potentially a large number of portable devices such as 40 or more portable devices in proximity to the system. The system may connect to and locate each of the plurality of portable devices in proximity to the system. The location information may be determined with respect to an object, such as a vehicle or building, and optionally within a larger system of objects, such as a mass transit system.

Abstract: The present disclosure relates to methods and apparatus for graphics processing. In some aspects, the apparatus selects a first mip-map layer with a first texture size and a second mip-map layer with a second texture size based on a third texture size of an image. The apparatus also determines a relative distance associated with the texture sizes. Additionally, the apparatus determines a first quantity of samples to select from the first mip-map layer, and determines a second quantity of samples to select from the second mip-map layer, the second quantity of samples being less than the first quantity of samples, and a second quantity of filter taps being less than a first quantity of filter taps. Also, the apparatus generates the image at the third texture size through filtering based on the first quantity of samples and the second quantity of samples.

Abstract: A computer-implemented method may include maintaining, within a local memory device (LMD) in a hardware accelerator (1) a filter matrix that may include a set of filter vectors corresponding to a filter location in each of a set of filters of a convolutional layer of an artificial neural network, and (2) an activation matrix that may include a primary and a secondary set of activation vectors, each activation vector included in an activation volume. The method may also include (1) directing a matrix multiplication unit (MMU) in the hardware accelerator to execute a matrix multiplication operation (MMO) using the filter matrix and the activation matrix, (2) replacing (i) the filter matrix with an additional filter matrix, and (ii) the secondary set of activation vectors with an additional set of activation vectors, and (3) directing the MMU to execute an additional MMO using the additional filter matrix and the activation matrix.

Abstract: An apparatus for scaling images is provided that includes at least two input ports, a scaling component coupled to the at least two input ports, the scaling component including a plurality of scalers, the scaling component configurable to map any scaler to any input port of the at least two input ports and configurable to map more than one scaler to any input port, and a memory coupled to the at least two input ports and to outputs of the plurality of scalers, the memory configured to store image data for each input port and scaled image data output by the plurality of scalers.

Abstract: Disclosed are new approaches to Multi-dimensional filtering with a reduced number of memory reads and writes. In one embodiment, a filter includes first and second coefficients. A block of a data having width and height each equal to the number of one of the first or second coefficients is read from a memory device. Arrays of values from the block are filtering using the first filter coefficients and the results filtered using the second coefficients. The final result may be optionally blended with another data value and written to a memory device. Registers store results of filtering with the first coefficients. The block of data may be read from a location including a source coordinate. The final result of filtering may be written to a destination coordinate obtained by rotating and/or mirroring the source coordinate. The orientation of arrays filtered using the first coefficients varies according to a rotation mode.

Abstract: The present invention provides a technique for changing the number of taps in filter processing without the need for execution of branch processing. A filter processing device comprises: an arithmetic circuit that performs arithmetic processing for filtering operation; an internal register that retains data to be subjected to arithmetic processing in the arithmetic circuit and that receives the result of arithmetic processing from the arithmetic circuit as data to be written back thereto; and a data generator that generates data to be fed to the arithmetic circuit through use of the data retained in the internal register. Further, in the filter processing device, there is disposed a tap number control circuit that is capable of controlling the number of taps in filter processing according to a tap control signal applied thereto. In this configuration, no branch processing is required for controlling the number of taps by the use of the tap number control circuit.

Abstract: Multi-dimensional finite impulse response filters ale disclosed in hybrid and transpose forms. Multi-dimensional signals can be expressed in a vector (ox matrix) form to allow multi-dimensional signals to be processed collectively. Known hybrid and transpose FIR filters are extended to the multi-dimensional case to allow multi-dimensional signals to be processed with reduced redundancies. The input signals are vectors with multidimensional components. The disclosed FIR filters include multipliers that perform matrix multiplications with multiple coefficients, and adders for performing vector additions with multiple inputs and outputs. The z-transforms are provided for the disclosed hybrid and transpose multi-dimensional FIR filters.

Abstract: A constrained four dimensional grid-based filter (CGBF) used to provide state estimates for a target maneuvering in two dimensions. Optimal grid and sampling sizes or chosen and the kinematic constraints of the target a y used to restrict the possible predicted states resulting in quality target estimates.

Abstract: A system and method for implementing the Elliptic Curve scalar multiplication method in cryptography, where the Double Base Number System is expressed in decreasing order of exponents and further on using it to determine Elliptic curve scalar multiplication over a finite elliptic curve.

Abstract: Embodiments described herein describe the construction of frequency domain estimates of generalized power density and the filters that can be constructed from those estimates. Using the concept of the Stokes vector representation of the spectral matrix in an M-dimensional vector space, a generalization of the process in which the spectral matrix may be represented by a set of trace-orthogonal matrices that are based upon a particular signal state can be produced. One aspect of the process is as follows: given a particular signal, represented as by a state vector in the space, a complete, orthonormal set of vectors can be produced that includes the signal of interest. Then, a generalized set of matrices is constructed, based upon the developed vectors, that are trace-orthogonal and which serve as a basis set for the expansion of the spectral matrix. The coefficients of this expansion form a generalized Stokes vector that represents the power in the spectral matrix associated with the various state vectors.

Abstract: A transmitter has a portion that sets a parameter about the transmitter itself based on a parameter made to correspond to a condition for selecting a receiver with which the transmitter communicate with, a portion that generates a spread code based on the set parameter, and a sending portion that spreads transmit-data to form a spread signal by the generated spread code, and that sends the spread signal. The receiver has a portion that receives the signal transmitted by the transmitter, a portion that sets a parameter about the receiver itself based on the parameter made to correspond to the condition, a portion that generates a despread code based on the set parameter, a portion that performs a correlation computation of the received signal and the generated despread code, and a portion that selects a transmitter with which the receiver communicates, based on a result of the correlation computation.

Abstract: An image processing apparatus is disclosed that includes an input unit that inputs data subject to image processing, an input filter that controls data input operations of the input unit, an output unit that outputs processed data resulting from the image processing, an output filter that controls data output operations of the output unit, and at least one processing filter arranged between the input filter and the output filter that processes the input data. An interruption process or a termination process for stopping the image processing is successively performed within the output filter, the processing filter, and the input filter starting with the output filter.

Abstract: The present invention is directed toward a Finite Impulse Response (FIR) no-multiply filter (NMF), which replaces complex multiplications with phase additions. At each tap in the FIR filter, only phases are accumulated and at the output the complex result is reconstructed in I/Q. Noise dither is relied upon to smooth the digitized phase resolution. The NMF is ideally suited to a matched filtering scenario for constant modulus signals.

Abstract: A method and apparatus are disclosed for use with multiple input, multiple output (MIMO) signal processing techniques, which reduce the amount of memory and memory bandwidth used to store and access filter coefficients by compressing a filter coefficient based at least in part on one or more neighboring filter coefficients for storage and decompressing the filter coefficients when retrieved. The decompressed filter coefficients can be used with a MIMO filtering technique, and/or can be used to compress or decompress additional coefficients.

Abstract: The invention relates to a method of filtering a multidimensional digital signal comprising a plurality of samples, and comprises the following steps applied to each of the samples to filter, simulating the filtering of the sample to filter by applying at least one filter in a plurality of geometric orientations in the digital signal (S52), the simulation resulting in a plurality of simulated filtering values of the sample, and obtaining a filtering value of the filtered sample on the basis of the plurality of simulated filtering values of the sample according to at least one predetermined criterion (S58).

Abstract: Computer-readable media having corresponding apparatus embodies instructions executable by a computer to perform a method comprising: receiving a first array; generating a plurality of second arrays based on the first array, wherein each of the second arrays is generated using a different threshold number, and wherein each entry of the second arrays indicates whether a corresponding entry in the first array exceeds the respective threshold number; generating a first vector, wherein each entry in the first vector represents a number of connected components for a respective one of the second arrays; generating a second vector based on the first vector, wherein each entry of the second vector represents a variance of a plurality of entries, including a corresponding entry, of the first vector; generating a third vector, comprising filtering the second vector; and selecting, based on the third vector, one of the threshold numbers, of the second arrays or both.

Abstract: The invention provides a filtering device with hierarchical structure making it possible to carry out finite impulse response and infinite impulse response linear filtering functions and which can be combined with one or more devices of the same type. The device includes at least one first and one second filtering module having means for carrying out filtering functions with N configurable coefficients. A first subset of the N coefficients of a module is configured to carry out nonrecursive filtering functions, a second subset of the coefficients configured to carry out recursive filtering functions, one or more feedback loops able to be activated per module, at least one result sample of the filtering being generated at each clock cycle. The invention also provides a reconfigurable filtering device using at least two filtering devices with the hierarchical structure.

Abstract: Embodiments described herein describe the construction of frequency domain estimates of generalized power density and the filters that can be constructed from those estimates. Using the concept of the Stokes vector representation of the spectral matrix in an M-dimensional vector space, a generalization of the process in which the spectral matrix may be represented by a set of trace-orthogonal matrices that are based upon a particular signal state can be produced. One aspect of the process is as follows: given a particular signal, represented as by a state vector in the space, a complete, orthonormal set of vectors can be produced that includes the signal of interest. Then, a generalized set of matrices is constructed, based upon the developed vectors, that are trace-orthogonal and which serve as a basis set for the expansion of the spectral matrix. The coefficients of this expansion form a generalized Stokes vector that represents the power in the spectral matrix associated with the various state vectors.

Abstract: Computer-readable media having corresponding apparatus embodies instructions executable by a computer to perform a method comprising: receiving a first array; generating a plurality of second arrays based on the first array, wherein each of the second arrays is generated using a different threshold number, and wherein each entry of the second arrays indicates whether a corresponding entry in the first array exceeds the respective threshold number; generating a first vector, wherein each entry in the first vector represents a number of connected components for a respective one of the second arrays; generating a second vector based on the first vector, wherein each entry of the second vector represents a variance of a plurality of entries, including a corresponding entry, of the first vector; generating a third vector, comprising filtering the second vector; and selecting, based on the third vector, one of the threshold numbers, of the second arrays or both.

Abstract: The present invention utilizes a pattern extraction methodology to elucidate significant patterns and mathematical relationships that exist between and among pluralities of two-dimensional sample data sets of the same data type. In one instance, the present invention analyzes multi-sample, two-dimensional mass spectroscopy data, while in an alternate instance, another user-specified, preset, or automatically determined data type, modality, submodality, etc., is analyzed.

Abstract: A hardware implementation method for concurrently realizing overlap filter and core transform and an operation method thereof are provided. The overlap filter and core transform can be adjusted according to different specifications, processes, and operation frequencies. The hardware implementation method and the operation method thereof adopt a transform-level hardware sharing architecture and multi-port input/output register array, thereby efficiently realizing overlap filter and core transform.

Abstract: To filter a digital signal, in which, for each sample of the signal, a plurality of context functions take account of a predetermined number of other samples of the signal: the value of a context function from the plurality of context functions for each sample to be filtered is calculated; the signal is divided into a set of sub-signals corresponding respectively to the different values of the context functions; and, for each sub-signal: an optimal filter is determined according to a first criterion that depends on the values of the sub-signal; and the optimal filter is associated with the context function corresponding to the sub-signal. Application to the coding of a digital signal representing an image.

Abstract: A network system and a method of determining a location of a transmitter are described. The method includes reading a signal strength of a signal transmitted by the transmitter by each of a plurality of receivers, at each frequency in a plurality of frequencies, extracting phase information using an amplitude of the signal at each of the plurality of frequencies, and applying a transform (such as a Fourier Transform) to the signal in the frequency domain to obtain a representation of the signal in the time-domain. The method further includes applying a time window to the signal in the time-domain to eliminate reflected multipath signals that arrive to the respective receivers later than a line-of-sight signal to obtain a windowed signal in the time domain, and calculating a location of the transceiver using the windowed time domain signal.

Abstract: A method for adjusting an electronic system is provided in which it is possible to predefine the n parameters of the system which correspond to an n-dimensional adjustment space, wherein at the start of the adjustment each parameter has predefined for it two limit values that delimit an appropriate initial range in the n-dimensional adjustment space, and wherein the following steps are repeated until a termination condition is achieved: evaluating a target function that quantifies the achievement of an adjustment target for the limit values that delimit the initial range, wherein the evaluation includes the measurement and/or evaluation of at least one physical quantity of the system that is a function of the specific parameter or its limit value, and wherein appropriate target function values associated with the limit values are obtained, defining a modified, in particular reduced, initial range for a subsequent iteration as a function of the target function values obtained.

Abstract: An adaptive filter device, including a finite impulse response (FIR) filter which is based on filter coefficients, which are determined based on a predetermined iterative adaptation algorithm for determining filter coefficients of an adaptive filter, wherein, in at least one iteration step of said predetermined iterative adaptation algorithm a sum value is determined, wherein each summand of said sum value depends on one of said filter coefficients, and, if said sum value is above a predetermined threshold, the filter coefficients are modified.

Abstract: Embodiments herein select performance indicators from raw data and measure the indicators over at least one time period to extract a time series of data for each of the indicators. The methods filter out redundant indicators to produce a reduced indicator set of time series of data. The embodiments detect correlations among the time series of data within the reduced indicator set by considering time-shifts between the time series of data so as to identify correlated indicators. The method determines a time order among the correlated indicators and determines a causal direction among the correlated indicators based on which of the correlated indicators occurs first in time so as to identify relative leading indicators among the correlated indicators. However, if the correlated indicators occur at approximately a same time, the determining of the causal direction is based on a relative ability of each of the indicators to predict behavior of another of the correlated indicators.

Abstract: The invention relates to a method of filtering a multidimensional digital signal comprising a plurality of samples, and comprises the following steps applied to each of the samples to filter, simulating the filtering of the sample to filter by applying at least one filter in a plurality of geometric orientations in the digital signal (S52), the simulation resulting in a plurality of simulated filtering values of the sample, and obtaining a filtering value of the filtered sample on the basis of the plurality of simulated filtering values of the sample according to at least one predetermined criterion (S58).

Abstract: A symmetric type image filter processing apparatus having a symmetric type image filter composed of symmetric kernel coefficients, in which SIMD commands are utilized efficiently for making the filtering processes high speed, is provided. The symmetric type image filter processing apparatus provides a row-wise intermediate data generating section, a row-wise intermediate data utilizing section, and a memory. The row-wise intermediate data generating section multiplies each kernel coefficient of M pieces in each column of {(N+1)/2} columns at the right or left column by each pixel of M pieces in the column direction of image data having P pixels in one row, and cumulatively adds the multiplied results, by using SIMD commands that can process sequential data of Q pieces. This multiplication and addition operation is executed P/Q times, and intermediate data in one row of the image data are generated and stored in an intermediate data storing region in the memory.

Abstract: The invention comprises an encoder for encoding a stegotext and a decoder for decoding the encoded stegotext, the stegotext being generated by modulating the log power spectrogram of a covertext signal with at least one key, the or each key having been added or subtracted in the log domain to the covertext power spectrogram in accordance with the data of the watermark code with which the stegotext was generated, and the modulated power spectrogram having been returned into the original domain of the covertext. The decoder carries out Fast Fourier Transformation and rectangular polar conversion of the stegotext signal so as to transform the stegotext signal into the log power spectrogram domain; subtracts in the log power domain positive and negative multiples of the key or keys from blocks of the log power spectrogram and evaluates the probability of the results of such subtractions representing an unmodified block of covertext in accordance with a predetermined statistical model.

Abstract: Multi-dimensional finite impulse response filters are disclosed in hybrid and transpose forms. Multi-dimensional signals can be expressed in a vector (or matrix) form to allow multi-dimensional signals to be processed collectively. Known hybrid and transpose FIR filters are extended to the multi-dimensional case to allow multi-dimensional signals to be processed with reduced redundancies. The input signals are vectors with multidimensional components. The disclosed FIR filters include multipliers that perform matrix multiplications with multiple coefficients, and adders for performing vector additions with multiple inputs and outputs. The z-transforms are provided for the disclosed hybrid and transpose multi-dimensional FIR filters.

Abstract: A band-pass filter with at least one passband, which is real, bidimensional, oriented along the phase axis and resulting from the product of two identical one-dimensional Hamming windows, the transfer function of each of these windows being: X i ? ( f ) = ? i + ( 1 - ? i ) ? cos ? ? ? ( f - f ? ? q i ) f0 i , w ? ? h ? ? e ? ? r ? ? e f is a current frequency; ?i is a real number, included between and excluding 0 and 1; fqi is a central frequency of the passband; and f0i defines half of the passband centered on fqi.

Abstract: Methods and apparatus, including computer program products, implementing and using techniques for using a color table defining a mapping from a source color space representing colors in source color coordinates to a destination color space representing colors in destination color coordinates. An input color in the source color space is received. A location of the input color in a cell of the color table is determined in terms of cell coordinate values in a cell coordinate system. The cell coordinate values are ordered to determine a processing order of the dimensions of the source color space. The cell coordinate values are used to calculate an output color in the destination color space, making no more interpolation calculations than the number of source color space dimensions multiplied by the number of destination color space dimensions.

Abstract: Embodiments of the invention provide an anisotropic filtering configuration where a ratio value is computed as the ratio of the major axis to the minor axis of a pixel projection on a texture map. The number of subpixels generated and sampled is based upon the value of the ratio. For four-way anisotropic filtering, subpixels are generated that move as the computed ratio between the major and minor axis increases. Subpixels may be placed anywhere from 0.5 to 1.5 texel distance from the pixel center depending on the computed ratio. The contribution of the subpixels is equally weighted.

Abstract: A system is provided for processing digital data from an array of receiver elements. The system includes an input assembly interface and a processing element. The input assembly interface is capable of providing the digital data from the array of receiver elements. The processing element, in turn, is capable of providing an impulse response, and representing the digital data and impulse response vectorized receiver matrices and vectorized response matrices, respectively. The processing element can then signal condition the digital data, without corner turning, based upon the vectorized receiver matrices and the vectorized response matrices. Once the signal conditioning output has been computed, the digital data may be further processed by a beamformer and matched filter.

Abstract: Implementations of a two-dimensional pyramid filter are disclosed including a two-dimensional pyramid filter architecture of an order 2N?1, where N is a positive integer greater than three. The two-dimensional pyramid filter architecture of order 2N?1 may include one-dimensional pyramid filters of order 2N?1, a first summer circuit; and a second summer circuit. The two dimensional pyramid filter architecture of order 2N?1 may produce, in operation on respective clock cycles, at least a pyramid filtered output signal corresponding to the summation by the first summer circuit of output signals produced by four one-dimensional pyramid filters of order 2N?1, and a pyramid filtered output signal corresponding to an output signal produced by summing signal sample matrices of order [2(N?1)?1] in the second summer circuit. The respective pyramid filtered output signals of the two dimensional pyramid filter architecture may be summed by the third summer circuit on respective clock cycles.

Abstract: An architecture for a multiply and accumulate two-dimensional separable symmetric filter. The architecture includes a binary tree adder producing sums of samples of an incoming signal. A multiplier then multiplies sums from the binary tree adder with filter coefficients producing filtered products. An accumulation adder to sums the filtered products and produce a filtered output.

Abstract: An integrated circuit has a two-dimensional pyramid filter architecture of an order 2N−1, where N is a positive integer greater than five. The two dimensional pyramid filter, in operation, capable of producing, on respective clock cycles, pyramid filtered output signals corresponding to output signals produced by fourteen one-dimensional pyramid filters of order 2N−1, and pyramid filtered output signals corresponding to output signals produced either by four two-dimensional pyramid filters or one two-dimensional pyramid filter of order [2(N−1)−1] using signal sample matrices of order [2(N−1)−1]. The respective output signals in said two-dimensional pyramid filter architecture are summed on respective clock cycles of said two dimensional pyramid filter architecture.

Abstract: A method of conjoint detection of a set of CDMA codes received at a plurality of antennas of a receiver like a mobile telephone receiver. The codes are transmitted via a transmission channel with transfer matrix A satisfying the equation e=A.d+n, where d is the set of symbols of the codes transmitted, n is an additional noise vector and e is the set of received samples.

Abstract: A symmetric digital filter. The filter has the dimensions N rows by N columns. There are a predetermined number of 8-input adders, and a predetermined number of 4-input adders each able to receive inputs from samples of an incoming signal. In addition, there are a predetermined number of parallel multipliers. The parallel multipliers receive output signals from the 8-input adders and the 4-input adders, and multiply the partial sums by coefficients of the digital filter, applying the digital filter to the input signal.

Abstract: A pipelined parallel processor (PPP) integrated circuit includes a filtering unit, internal routing circuitry such as a crosspoint switch, an internal frame store controller, and one or more function circuits. The function circuits include, for example, arithmetic units, lookup tables, timing compensators, adders/subtractors, statistics modules, image shifting circuitry, and other useful processing devices. The components of the PPP are interconnected with the crosspoint switch that routes data among the frame store controller, filtering unit, function circuits, external input channels, and external output channels. The internal frame store controller includes a plurality of programmable video line store memories that are coupled to an external field or frame store memory. Each line store memory may be programmed to provide data to, or receive data from one of the PPP components by a controller and to transfer the data from or to the memory, respectively.

Abstract: A system and method for multi-level iterative filtering of a data structure, e.g., an image, wherein elements of the data structure form the zero layer in the zero level and the data layer in each subsequent level is given by the results of one iteration. First, the method of the present system includes subdividing each level into a plurality of regions, there being data dependency between the data in one data layer in one level and the data layers in any other level of a region. Second, the method includes filtering each level by lapped-region processing. Lastly., the method includes scheduling the data processing of each level to provide substantially regional synchronization of the filtering at each level. In one embodiment, the sequence for traversing the regions is selected so that outputs from processing the regions are scheduled to occur at substantially equal time intervals.

Abstract: In connection with blind source separation, proposed herein, inter alia, are: expectation-maximization equations to iteratively estimate unmixing filters and source density parameters in the context of convolutive independent component analysis where the sources are modeled with mixtures of Gaussians; a scheme to estimate the length of unmixing filters; and two alternative initialization schemes.

Abstract: In a method of integrating one or more l-dimensional filters into a digital image stream interface a single digital video input is processed by multiple 1-dimensional digital image filters, especially recursive filters, and combined into a single digital image stream which can be transmitted via a high-speed interface to a host computer's memory such that each 1-dimensional filter output can be automatically extracted and placed into its own separate memory buffer for subsequent processing by a secondary image processing device. This additional processing can include the second pass of a two-pass separable filter implemented in software on a general-purpose CPU, and in particular can result in the generation of an image pyramid. This combined hardware and software approach can produce low-cost 2-D digital image filter implementations small enough to be added to existing standard ASIC's while still retaining high performance.

Abstract: A pipelined parallel processor (PPP) integrated circuit includes a filtering unit, internal routing circuitry such as a crosspoint switch, an internal frame store controller, and one or more function circuits. The function circuits include, for example, arithmetic units, lookup tables, timing compensators, adders/subtractors, statistics modules, image shifting circuitry, and other useful processing devices. The components of the PPP are interconnected with the crosspoint switch that routes data among the frame store controller, filtering unit, function circuits, external input channels, and external output channels. The internal frame store controller includes a plurality of programmable video line store memories that are coupled to an external field or frame store memory. Each line store memory may be programmed to provide data to, or receive data from one of the PPP components by a controller and to transfer the data from or to the memory, respectively.

Abstract: A digital signal transformation method, in which the original samples (x2i; y12i) of the digital signal are transformed into output samples (y12i, x2i). Any output sample being calculated by a function of original samples, and/or of intermediate samples (t2i+1, v2i, t12i, v12i+1), and/or of output samples is characterized in that each function is broken down into elementary operations, and the elementary operations of all the functions are ordered so as to minimize the number of samples that are simultaneously necessary. The invention makes it possible to minimize the memory space necessary to calculate the transformation.