Vector Resolver Patents (Class 708/441)
  • Publication number: 20090276169
    Abstract: Methods and systems for a universally applicable, linear, signal processing framework for optimal detection, localization, and feature extraction of dipolar magnetic and electromagnetic (EM) targets. Such methods and systems provide the ability to, for example, simultaneously and optimally solve the problems of detection, localization and estimation of the dipole vector or target response matrix; be applicable to different types of magnetic or EMI sensor system; and be applicable to arbitrary combinations of sensor locations and orientations, and arbitrary spatial sampling. Such functionality is provided, in various aspects of the disclosure, with a quadrature matched filter algorithm for detecting and imaging magnetic dipoles to the more complex realm of single- and multi-channel EMI sensors.
    Type: Application
    Filed: April 3, 2009
    Publication date: November 5, 2009
    Applicant: VISTA CLARA, INC.
    Inventors: David O. Walsh, William F. Avrin
  • Patent number: 7606852
    Abstract: A CORDIC unit for the iterative approximation of a vector rotation through a rotary angle ? by a number of elementary rotations through elementary angles ?i, including elementary rotation stages for respectively affecting an elementary rotation through an elementary angle ?i as an iteration step in the iterative approximation. After such an elementary rotation there remains a residual angle through which rotation is still to be affected. The elementary rotation stages of the CORDIC unit are adapted for rotation through elementary angles ?i given by powers of two with a negative integral exponent. The CORDIC unit can also include a triggering device for triggering the elementary rotations, a triggering device which is adapted prior to each iteration step to compare the residual angle to at least one of the elementary angles and to omit those elementary rotation stages whose elementary angles are greater than the residual angle.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: October 20, 2009
    Assignee: IHP-GmbH-Innovations for High Performance Microelectronics/Institut fur Innovative Mikroelectronik
    Inventors: Koushik Maharatna, Eckhard Grass, Banerjee Swapna, Dhar Anindya Sundar
  • Publication number: 20090172063
    Abstract: A multi-threaded codeless user-defined function (UDF) may be provided. First, at least one input value may be received from a calculation thread corresponding to a spreadsheet calling the codeless UDF. Then, the at least one input value may be saved in a thread storage area outside of a UDF storage area containing the codeless UDF. Next, the codeless UDF may be performed comprising performing at least one calculation using at least one formula in the codeless UDF and the at least one input value from the thread storage area. At least one output value produced in response to performing the codeless UDF may then be returned to the calculation thread corresponding to the spreadsheet calling the codeless UDF.
    Type: Application
    Filed: December 26, 2007
    Publication date: July 2, 2009
    Applicant: Microsoft Corporation
    Inventors: Joseph M. Chirilov, Jeffrey J. Duzak, Andrew J. Becker, Charles D. Ellis
  • Publication number: 20090094307
    Abstract: Performing a calculation using a coordinate rotation digital computer (CORDIC) algorithm. Execution of the CORDIC algorithm is begun. An error introduced by a truncated vector as a result of executing the CORDIC algorithm is pre-computed. The error is incorporated into a subsequent iteration of the CORDIC algorithm. Execution of the CORDIC algorithm is completed. The result of the CORDIC algorithm is stored.
    Type: Application
    Filed: October 9, 2007
    Publication date: April 9, 2009
    Inventors: David N. Ault, Emiliano Lozano, Bao G. Truong, Samuel I. Ward
  • Publication number: 20090037507
    Abstract: A method for multidimensional scaling (MDS) of a data set comprising a plurality of data elements is provided, wherein each data element is identified by its coordinates, the method comprising the steps of: (i) applying an iterative optimization technique, such as SMACOF, a predetermined amount of times on a coordinates vector, said coordinates vector representing the coordinates of a plurality of said data elements, and obtaining a modified coordinates vector; (ii) applying a vector extrapolation technique, such as Minimal Polynomial Extrapolation (MPE) or reduced Rank Extrapolation (RRE) on said modified coordinates vector obtaining a further modified coordinates vector; and (iii) repeating steps (i) and (ii) until one or more predefined conditions are met.
    Type: Application
    Filed: June 10, 2008
    Publication date: February 5, 2009
    Applicant: Technion Research and Development Foundation Ltd.
    Inventors: Guy Rosman, Alexander Bronstein, Michael Bronstein, Ron Kimmel
  • Publication number: 20080313252
    Abstract: A sphere decoder sets a Euclidean distance between a lattice vector obtained by using an MMSE or ZF estimate and a received signal as an initial radius, further reduces the initial radius, and searches lattices points included inside a hypersphere with the further reduced initial radius. In addition, one lattice vector having a minimum Euclidean distance is output. One dimension is selected to reduce an initial radius, and estimates in other dimensions are kept fixed, excluding the selected dimension. Then candidate lattice points are searched in the selected dimension, excluding a current estimate, such that a minimum Euclidean distance and a lattice point estimate corresponding to the minimum Euclidean distance are obtained. The initial radius is updated by the minimum Euclidean distance, and a final lattice vector is constructed by combining a lattice point estimate corresponding to the initial radius and the lattice point estimates in other dimensions.
    Type: Application
    Filed: December 21, 2005
    Publication date: December 18, 2008
    Inventors: Seong-Rag Kim, Seung-Joon Lee, Dong-Seung Kwon, Seong-Keun Oh, Hee-Goo Han
  • Publication number: 20080215657
    Abstract: This invention relates to a short message format that captures useful information embedded in a data vector of a sequence of symbols or numbers. The data vector may represent many different forms of information generated by various electronic and information systems. This short message format is particularly useful when bandwidth limited communication links are used to transmit a data set that can be represented as a set of data vectors that is true for essentially all types of data. Described herein is an algorithm formulated to be useful for data communications problems associated with bandwidth limited communications links.
    Type: Application
    Filed: June 5, 2006
    Publication date: September 4, 2008
    Applicant: The CommonWealth of Australia
    Inventor: Jimmy Xiaoji Wang
  • Publication number: 20080181322
    Abstract: Embodiments provide systems and methods for a novel multiple-input multiple-output (MIMO) equalization technique that produces a channel matrix that contains partly real coefficients and partly complex coefficients, referred to herein as a hybrid-MIMO equalization. MIMO detectors can exploit the hybrid-MIMO equalization to reduce complexity. Some embodiments provide systems and methods for equalizing a communication channel comprising receiving as an input a channel output vector, dividing the input into two vectors, a first vector that remains a complex number and a second vector that contains only real numbers, separating the second vector into its real and imaginary components, and regrouping the first and second vectors into a hybrid channel output vector that contains both real and complex coefficients.
    Type: Application
    Filed: January 30, 2008
    Publication date: July 31, 2008
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Deric W. Waters, Anuj Batra, Srinath Hosur
  • Publication number: 20080172384
    Abstract: Described is fast motion estimation based upon epipolar geometry, which can be used in compressing multi-view video. An epipolar line is computed based on a point (e.g., a centroid point) in a macroblock to be predicted, and a temporary starting point in an image is determined, such as a median predicted search center. A search starting point is further determined based on the temporary starting point and the epipolar line, e.g., a point on the epipolar line corresponding to an intersecting line that is projected orthogonally from the temporary point to the epipolar line. A motion estimation mechanism searches the search space to produce a motion vector. The search may be conducted starting at the search starting point in a reduced search area located around the epipolar line, e.g., a local diamond search and/or rotated unsymmetrical rood-pattern search.
    Type: Application
    Filed: January 16, 2007
    Publication date: July 17, 2008
    Applicant: Microsoft Corporation
    Inventors: Hua Cai, Jian-guang Lou, Jiang Li
  • Publication number: 20080126463
    Abstract: A CORDIC circuit capable of performing precise vector rotation, including a pre-rotation stage configured to selectively rotate an input vector by 90 degrees and to produce a pre-rotated vector. A first stage is configured to perform a first set of iterative CORDIC calculations on the pre-rotated vector and to produce a first rotated vector and a remaining rotation value. A second stage configured to perform a second set of iterative CORDIC calculations on the first rotated vector and to produce a second rotated vector, the second rotated vector corresponding to the input vector.
    Type: Application
    Filed: September 21, 2006
    Publication date: May 29, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: William Milton Hurley
  • Patent number: 7049626
    Abstract: A nanoscale or partial nanoscale interface within an electronic device, and a method for producing such interfaces without the need for precise nanoscale alignment of nanoscale elements of a first circuit layer to elements of a second circuit layer, is disclosed. In one embodiment, dimensions of conductive windows fabricated on microelectronic elements are carefully specified, and redundant nanoscale elements are introduced, in order to produce functional nanoscale-to-microscale interfaces despite imprecise nanoscale alignment of nanoscale elements to microscale elements.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: May 23, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Yong Chen
  • Publication number: 20030097388
    Abstract: A CORDIC method and a CORDIC architecture applied in vector rotation are disclosed. An elementary angles set is extended by representing the elementary angles as the arctangent of the sum of two single signed-power-of-two terms to an extended elementary angles set. A combination of elementary angles is found from the extended elementary angles set such that the residue angle error can be minimized. A quantized scaling factor is used to scale the combination of elementary angles after being micro-rotated.
    Type: Application
    Filed: May 6, 2002
    Publication date: May 22, 2003
    Applicant: Industrial Technology Research Institute
    Inventors: Cheng-Shing Wu, Chia-Ho Pan, An-Yeu Wu
  • Patent number: 6567833
    Abstract: An apparatus and method allow receivers to quickly acquire a pseudorandom noise signal. A receiver advantageously detects frequency shifts using a compact parallel process hardware implementation of a Discrete Fourier Transform (DFT). The simultaneous detection of multiple frequencies allows the receiver to search the frequency range of the transmitted signal in larger increments of frequency, thereby increasing the speed of acquisition. One receiver does not use coherent integration before computation of the transform and advantageously maintains a flat frequency response. The flat frequency response of the DFT circuit enables searching of multiple frequency offsets without CPU intensive processing to compensate for frequency response variations. A receiver can include a Doppler correction circuit, which permits correlation data with frequency shift in the code to be non-coherently integrated among relatively fewer addresses or tap positions in memory.
    Type: Grant
    Filed: July 26, 2002
    Date of Patent: May 20, 2003
    Assignee: Interstate Electronics Corporation, a division of L3 Communications Corp.
    Inventors: Robert J. Van Wechel, Michael F. McKenney
  • Patent number: 6385633
    Abstract: The phase of a complex number I+jQ is computed using a hybrid lookup table and computation approach suitable for DSP implementation and useful in remote access/networking and wireless applications. An approximate phase &thgr;˜ for an approximation complex number I˜+jQ˜ is determined through memory table lookup. This is added to a correction phase &Dgr;&thgr; which is determined by calculation of a correction term C=(I˜*Q−Q˜*I)/(I*I˜+Q*Q˜) which represents the imaginary part divided by the real part of the complex multiplication of the complex number and the conjugate of the approximate complex number.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: May 7, 2002
    Assignee: Texas Instruments Incorporated
    Inventor: Timothy M. Schmidl
  • Patent number: 6349317
    Abstract: An improved radix-4 CORDIC rotator iteration stage, using answer digits {−3, −1, 1, 3} instead of the conventional choices of {−3, −2, −1, 0,1, 2, 3} or {−2, −1, 0, 1, 2}, thereby achieving constant magnitude amplification. The invention includes an answer digit decision module, which normally examines only a few digits of the remainder angle &thgr;i−1, thereby saving time when compared to full-length comparison. Very rarely does the answer digit decision process involves examining close to all the digits of the remainder angle. When examining only a few digits of the remainder angle, the circuit takes only approximately 20% longer than a radix-2 CORDIC stage. The invented rotator stage is usable either as a pipeline stage or as a single-stage iterative circuit. For use in a pipeline, the invented stage is to be used only when only a few remainder angle bits need to be examined.
    Type: Grant
    Filed: March 13, 1999
    Date of Patent: February 19, 2002
    Inventor: Vitit Kantabutra
  • Patent number: 6058465
    Abstract: A vector processor architecture provides vector registers of fixed size having data elements of programmable size and type. The type and size for data elements are defined by instructions which manipulate operands associated with the vector registers. The data size defined by an instruction determines the number of the data elements in a vector register and the number of parallel operations performed to complete the instruction. One embodiment of the invention supports 8-bit, 9-bit, 16-bit, and 32-bit data element sizes of integer type for all sizes and floating point data type for the 32-bit data elements.
    Type: Grant
    Filed: August 19, 1996
    Date of Patent: May 2, 2000
    Inventor: Le Trong Nguyen