Solving Equation Patents (Class 708/446)
  • Patent number: 8805912
    Abstract: When a Cholesky decomposition or a modified Cholesky decomposition is performed on a sparse symmetric positive definite matrix using a shared memory parallel computer, the discrete space in a problem presented by the linear simultaneous equations expressed by the sparse matrix is recursively sectioned into two sectioned areas and a sectional plane between the areas. The sectioning operation is stopped when the number of nodes configuring the sectional plane reaches the width of a super node. Each time the recursively halving process is performed, a number is sequentially assigned to the node in the sectioned area in order from a farther node from the sectional plane. The node in the sectional plane is numbered after assigning a number to the sectioned area each time the recursively halving process is performed.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: August 12, 2014
    Assignee: Fujitsu Limited
    Inventor: Makoto Nakanishi
  • Patent number: 8805910
    Abstract: Method and apparatus for processing continuous-time models (CTM) in a digital processing architecture is disclosed. The discrete state-space technique maps the CTM into the discrete-time model (DTM) and stores the states of the system in a sample time independent discrete state space set of matrices. The resulting state-space matrices can be processed in software or directly in hardware. The method disclosed is particularly suited to be used in automatic synthesis algorithms where a digital circuit is generated from an algorithm described in a high level language or model representation such as, for example, data flow or bond graph into a hardware description language (HDL), and the HDL model can be synthesized using system specific tools to generate an application specific integrated circuit (ASIC) or an FPGA configuration.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: August 12, 2014
    Assignee: Kylowave Inc.
    Inventors: Julio C. G. Pimentel, Emad Gad
  • Patent number: 8805911
    Abstract: Efficient and scalable circuitry for performing Cholesky decomposition is based on two types of processing elements. A first type of processing element provides inverse square root and multiplication operations. A second type of processing element includes a first computation path for outputting an inner product difference element and a second computation path for outputting an inner product element. Processing elements of the first and second type may be cascaded to achieve a decomposition of a matrix of an arbitrary size. The circuitry is flexible to allow different throughput requirements, and can be optimized to reduce latency and resource consumption.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: August 12, 2014
    Assignee: Altera Corporation
    Inventors: Lei Xu, Martin Langhammer
  • Patent number: 8788559
    Abstract: Techniques are generally described for generating an identification number for an integrated circuit (IC). In some examples, methods for generating an identification for an IC may comprise selecting circuit elements of the IC, evaluating measurements of an attribute of the IC for the selected circuit elements, wherein individual measurements are associated with corresponding input vectors previously applied to the IC, solving a plurality of equations formulated based at least in part on the measurements taken of the attribute of the IC for the selected circuit elements to determine scaling factors for the selected circuit elements, and transforming the determined scaling factors for the selected circuit elements to generate an identification number of the IC. Additional variants and embodiments may also be disclosed.
    Type: Grant
    Filed: December 3, 2013
    Date of Patent: July 22, 2014
    Assignee: Empire Technology Development LLC
    Inventors: Miodrag Potkonjak, Farinaz Koushanfar
  • Patent number: 8775147
    Abstract: An algorithm and architecture are disclosed for performing multi-argument associative operations. The algorithm and architecture can be used to schedule operations on multiple facilities for computations or can be used in the development of a model in a modeling environment. The algorithm and architecture resulting from the algorithm use the latency of the components that are used to process the associative operations. The algorithm minimizes the number of components necessary to produce an output of multi-argument associative operations and also can minimize the number of inputs each component receives.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: July 8, 2014
    Assignee: The MathWorks, Inc.
    Inventors: Alireza Pakyari, Brian K. Ogilvie
  • Patent number: 8762442
    Abstract: A system and method are provided for a parallel processing of the Hamilton-Jacobi equation. A numerical method is provided to solve the Hamilton-Jacobi equation that can be used with various parallel architectures and an improved Godunov Hamiltonian computation.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: June 24, 2014
    Assignee: University of Utah Research Foundation
    Inventors: Won-ki Jeong, Ross Whitaker
  • Patent number: 8719303
    Abstract: This invention proposed a new algorithm. By multiply the proposed weight coefficients of this invention, CSP and CSS can be computed without computing for the mean(s) of the data. After the proposed weight coefficients of this invention undergo factorization, it can promote a new recursive and real time updatable computation method. To test the accuracy of the new invention, the StRD data were separately tested using SAS ver 9.0, SPSS ver15.0 and EXCEL 2007 for comparison. The results showed that the accuracy of the results of the proposed invention exceeds the level of accuracy of SAS ver9.0, SPSS ver15.0 and EXCEL 2007. Aside from an accurate computation, this new invented algorithm can also produce efficient computations.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: May 6, 2014
    Inventors: Juei-Chao Chen, Kuo-Hung Lo, Tien-Lung Sun
  • Patent number: 8711146
    Abstract: Methods and apparatuses for constructing a multi-level solver, comprising decomposing a graph into a plurality of pieces, wherein each of the pieces has a plurality of edges and a plurality of interface nodes, and wherein the interface nodes in the graph are fewer in number than the edges in the graph; producing a local preconditioner for each of the pieces; and aggregating the local preconditioners to form a global preconditioner.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: April 29, 2014
    Assignee: Carnegie Mellon University
    Inventors: Gary Lee Miller, Ioannis Koutis
  • Patent number: 8700686
    Abstract: A computer-implemented method for estimating a time-varying parameter of a nonlinear system includes receiving input data for the nonlinear system, the input data including a desired state and a desired state derivative of the nonlinear system for a number of time points, generating for one of the plurality of time points an approximate time-varying parameter based on at least the desired state, the desired state derivative, an approximate state of the nonlinear system, and a Lyapunov function, and providing the approximate time-varying parameter for the one of the plurality of time points.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: April 15, 2014
    Assignee: The MathWorks, Inc.
    Inventor: Shrikant V. Savant
  • Patent number: 8682950
    Abstract: An input polynomial, in symbolic form, is received, classified, pre-processed, and factored. The input polynomial is classified as a constant, a univariate polynomial, or a multivariate polynomial. Various pre-processing is performed depending on the classification. After the input polynomial is pre-processed, the remaining polynomial is factored using a polynomial factoring algorithm. By pre-processing the input polynomial, the complexity of the polynomial to be factored is reduced, which reduces the computational expense of the polynomial factoring algorithm.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: March 25, 2014
    Assignee: Microsoft Corporation
    Inventors: Xu Yang, Xiaolin Quan, Zhihui Ba, Dongmei Zhang
  • Publication number: 20140067892
    Abstract: Methods for finding (i) the parameter var(?2), representing the variance of a prior historical distribution ?C (?2) of hidden error variances ?2; (ii) the parameter “a” defining the rate of change of the mean ensemble variance response to changes in true error variance; (iii) the parameter ?min2 representing a prior historical minimum of true error variance; (iv) the parameter k?1, representing the relative variance of the stochastic component of variance prediction error; and (v) the parameter M, representing the effective ensemble size.
    Type: Application
    Filed: August 30, 2013
    Publication date: March 6, 2014
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Craig H. Bishop, Elizabeth Ann Satterfield
  • Publication number: 20140046993
    Abstract: A system and method for preconditioning or smoothing (e.g., multi-color DILU preconditioning) for iterative solving of a system of equations. The method includes accessing a matrix comprising a plurality of coefficients of a system of equations and accessing coloring information corresponding to the matrix. The method further includes determining a diagonal matrix based on the matrix and the coloring information corresponding to the matrix. The determining of the diagonal matrix may be determined in parallel on a per color basis. The method may further include determining an updated solution to the system of equations where the updated solution is determined in parallel on a per color basis using the diagonal matrix.
    Type: Application
    Filed: August 13, 2012
    Publication date: February 13, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Patrice Castonguay, Robert Strzodka
  • Patent number: 8649508
    Abstract: A system and method for implementing the Elliptic Curve scalar multiplication method in cryptography, where the Double Base Number System is expressed in decreasing order of exponents and further on using it to determine Elliptic curve scalar multiplication over a finite elliptic curve.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: February 11, 2014
    Assignee: Tata Consultancy Services Ltd.
    Inventor: Natarajan Vijayarangan
  • Publication number: 20140025720
    Abstract: One embodiment sets forth a method for solving linear equation systems that include the same matrix A coupled with multiple right-hand-side vectors. For each new right-hand-side vector, a solver expands an existing Krylov subspace based on the Krylov subspace and data associated with the previous right-hand-side vector. The solver then uses the expanded Krylov subspace to approximately solve the linear equation system for the new right-hand-side vector. By expanding the Krylov subspace for each new right-hand-side vector, the solver continually leverages the information from the preceding right-hand-side vectors. Advantageously, expanding the Krylov subspace is typically computationally quicker than prior art-techniques, such as creating a new Krylov subspace or transforming an existing Krylov subspace. Consequently, by implementing the disclosed techniques, the likelihood of exceeding time constraints associated with algorithms that include solving certain classes of linear equation systems may be decreased.
    Type: Application
    Filed: June 28, 2013
    Publication date: January 23, 2014
    Inventor: Robert STRZODKA
  • Patent number: 8626815
    Abstract: In a matrix multiplication in which each element of the resultant matrix is the dot product of a row of a first matrix and a column of a second matrix, each row and column can be broken into manageable blocks, with each block loaded in turn to compute a smaller dot product, and then the results can be added together to obtain the desired row-column dot product. The earliest results for each dot product are saved for a number of clock cycles equal to the number of portions into which each row or column is divided. The results are then added to provide an element of the resultant matrix. To avoid repeated loading and unloading of the same data, all multiplications involving a particular row-block can be performed upon loading that row-block, with the results cached until other multiplications for the resultant elements that use the cached results are complete.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: January 7, 2014
    Assignee: Altera Corporation
    Inventor: Martin Langhammer
  • Patent number: 8620982
    Abstract: Techniques are generally described for generating an identification number for an integrated circuit (IC). In some examples, methods for generating an identification of an IC may comprise selecting circuit elements of the IC, evaluating measurements of an attribute of the IC for the selected circuit elements, wherein individual measurements are associated with corresponding input vectors previously applied to the IC, solving a plurality of equations formulated based at least in part on the measurements taken of the attribute of the IC for the selected circuit elements to determine scaling factors for the selected circuit elements, and transforming the determined scaling factors for the selected circuit elements to generate an identification number of the IC. Additional variants and embodiments may also be disclosed.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: December 31, 2013
    Assignee: Empire Technology Development, LLC
    Inventors: Miodrag Potkonjak, Farinaz Koushanfar
  • Patent number: 8583720
    Abstract: A method for using a system to compute a solution to a partial differential equation (PDE) broadly comprises the steps of determining the true accuracy required (TAR) to solve the PDE, determining an architecture according to the TAR that performs a plurality of calculations to solve the PDE, determining a time allowed (TA) and a time required (TR) based on the architecture to solve the PDE, rejecting the PDE if the TR is less than or equal to the TA, configuring a plurality of programmable devices with the architecture, initiating the calculations, and ceasing the calculations when an accuracy criteria is met or when the TA expires. The system broadly comprises a plurality of programmable devices, a plurality of storage elements, a device bus, a plurality of printed circuit (PC) boards, and a board to board bus.
    Type: Grant
    Filed: February 10, 2010
    Date of Patent: November 12, 2013
    Assignee: L3 Communications Integrated Systems, L.P.
    Inventors: Antone Kusmanoff, Matthew P. DeLaquil, Deepak Prasanna, Jerry W. Yancey
  • Patent number: 8583719
    Abstract: An arithmetic operation apparatus includes: a branch node set detection unit to detect a set of branch nodes for each parallel level; a subtree memory storage area allocation unit to allocate an arithmetic result of a column vector to a memory storage area selected on a basis of a predetermined selection rule from a plurality of memory storage areas; and a node memory storage area allocation unit to allocate an arithmetic result of a column vector to a memory storage area selected on a basis of a predetermined selecting rule from a plurality of memory storage areas.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: November 12, 2013
    Assignee: Fujitsu Limited
    Inventor: Makoto Nakanishi
  • Patent number: 8577947
    Abstract: The present invention relates to a solution-finding method, which finds an approximate solution of an equation having difficulty in obtaining an actual solution and a complicated equation in numerical analysis. The method obtains an approximate solution of an equation having a solution in a predetermined interval. Initial values are calculated based on upper and lower limits of the interval. The initial values are applied to a solution-finding equation, including a sign function and the upper and lower limits, and the solution-finding equation is arranged so that a definite integral formula for the sign function is included in the equation. The definite integral formula in the solution-finding equation is calculated using numerical integration, and results of the definite integral formula are applied to the solution-finding equation, thus obtaining an approximate solution. This performance is iterated until the approximate solution satisfies an allowable error.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: November 5, 2013
    Assignee: Kunsan National University Industry-Academic Cooperation Foundation
    Inventor: Beong-in Yun
  • Patent number: 8577949
    Abstract: A system for a conjugate gradient iterative linear solver that calculates the solution to a matrix equation comprises a plurality of gamma processing elements, a plurality of direction vector processing elements, a plurality of x-vector processing elements, an alpha processing element, and a beta processing element. The gamma processing elements may receive an A-matrix and a direction vector, and may calculate a q-vector and a gamma scalar. The direction vector processing elements may receive a beta scalar and a residual vector, and may calculate the direction vector. The x-vector processing elements may receive an alpha scalar, the direction vector, and the q-vector, and may calculate an x-vector and the residual vector. The alpha processing element may receive the gamma scalar and a delta scalar, and may calculate the alpha scalar. The beta processing element may receive the residual vector, and may calculate the delta scalar and the beta scalar.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: November 5, 2013
    Assignee: L-3 Communications Integrated Systems, L.P.
    Inventors: Matthew P. DeLaquil, Deepak Prasanna, Antone L. Kusmanoff
  • Patent number: 8554421
    Abstract: A vehicle having a dynamics control system, the vehicle comprising: a first set comprising multiple adjustable sub-systems that affect the performance of the vehicle's powertrain; a second set comprising multiple adjustable sub-systems that affect the vehicle's handling; a dynamics user interface including a first input device and a second input device; and a dynamics controller coupled to the user interface and configured to adjust the operation of the sub-systems of the first set in dependence on the first input device and to adjust the operation of the sub-systems of the second set in dependence on the second input device.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: October 8, 2013
    Assignee: McLaren Automotive Limited
    Inventors: Antony Sheriff, Mark Vinnels, Richard Felton
  • Publication number: 20130251248
    Abstract: Multimodal data mining in a multimedia database is addressed as a structured prediction problem, wherein mapping from input to the structured and interdependent output variables is learned.
    Type: Application
    Filed: May 28, 2013
    Publication date: September 26, 2013
    Inventors: Zhen Guo, Zhongfei Zhang
  • Patent number: 8543626
    Abstract: A method and apparatus for QR-factorizing matrix on a multiprocessor system, wherein the multiprocessor system comprises at least one core processor and a plurality of accelerators, comprises the steps of: iteratively factorizing each panel in the matrix until the whole matrix is factorized; wherein in each iteration, the method comprises: partitioning an unprocessed matrix part in the matrix into a plurality of blocks according to a predetermined block size; partitioning a current processed panel in the unprocessed matrix part into at least two sub panels, wherein the current processed panel is composed of a plurality of blocks; and performing QR factorization one by one on the at least two sub panels with the plurality of accelerators, and updating the data of the sub panel(s) on which no QR factorization has been performed among the at least two sub panels by using the factorization result.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: September 24, 2013
    Assignee: International Business Machines Corporation
    Inventors: Hui Li, Bai Ling Wang
  • Publication number: 20130240643
    Abstract: A method for determining irrigation time across an area with a predetermined size S and based on desired precipitation quantity Q and precipitation rate P. The irrigation setup has a fluid output LPH?S*P. The new irrigation time TNEW is defined as TNEW=Q/PDRY. PDRY is a representative sampling precipitation average based on an indicative percentage PR of lowermost precipitation measurements selected out of a plurality of precipitation measurements taken across the area S.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 19, 2013
    Applicant: NaanDanJain Irrigation Ltd.
    Inventor: Hassan KHATEB
  • Patent number: 8539014
    Abstract: Circuitry for solving linear matrix equations involving a resultant matrix, an unknown matrix and a product matrix that is a product of the resultant matrix and the unknown matrix includes matrix decomposition circuitry for triangulating an input matrix to create a resultant matrix having a plurality of resultant matrix elements on a diagonal, and having a further plurality of resultant matrix elements arranged in columns below the resultant matrix elements on the diagonal. The matrix decomposition circuitry includes an inverse square root multiplication path that computes diagonal elements of the resultant matrix having an inverse square root module, and the said inverse square root module computes inverses of the diagonal elements to be used in multiplication in place of division by a diagonal element. Latency is hidden by operating on each nth row of a plurality of matrices prior to any (n+1)th row.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: September 17, 2013
    Assignee: Altera Corporation
    Inventors: Martin Langhammer, Kulwinder Dhanoa
  • Patent number: 8539013
    Abstract: A system and method for solving a decision problem having Boolean combinations of linear and non-linear operations includes translating the non-linear real operations using a COordinate Rotation DIgital Computer (CORDIC) method programmed on a computer device into linear operations maintaining a given accuracy. Linear and translated linear operations are combined into a formula. Satisfiability of the formula is solved using a decision procedure for Boolean combinations of linear operations over integers and reals.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: September 17, 2013
    Assignee: NEC Laboratories America, Inc.
    Inventors: Malay K. Ganai, Franjo Ivancic
  • Patent number: 8527569
    Abstract: When a real symmetric matrix is tridiagonalized using a shared memory scalar parallel computer, the matrix is divided into threads to be updated. In the updating, the data of the lower triangular portion is for the calculation utilizing the symmetry in the matrix. The lower triangular matrix portion is divided into columns, and the resultant pieces are assigned to respective CPUs so that an equal number of elements are assigned to each of the CPUs. Also, the computation is performed simultaneously in the column and row directions once for each loading of the data in order to reduce the number of times data is loaded into memory. The lower triangular matrix portion of the diagonal block matrix portion is divided into one small square matrix and two small triangular matrices recursively so that they are updated.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: September 3, 2013
    Assignee: Fujitsu Limited
    Inventor: Makoto Nakanishi
  • Patent number: 8527571
    Abstract: A method (and structure) for performing a matrix subroutine, includes storing data for a matrix subroutine call in a computer memory in an increment block size that is based on a cache size.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: September 3, 2013
    Assignee: International Business Machines Corporation
    Inventors: Fred Gehrung Gustavson, John A. Gunnels
  • Publication number: 20130226980
    Abstract: A calculation computer includes a calculator-solver receiving a working matrix representation corresponding to a system of equations, as well as residue data, and for providing a solution to the system of equations from residue data, an adapter receiving an initial matrix representation corresponding to a system of equations to be processed, as well as a filtering matrix representation, the working matrix representation forced to meet with the initial matrix representation, the adapter iteratively calculates blockwise an intermediate matrix from the initial matrix representation and from said numerical representation of a filtering matrix representation, the calculator-solver works on this intermediate matrix, blockwise, so as to provide a solution of the system of equations of the initial matrix representation, without completely inverting the latter,
    Type: Application
    Filed: August 2, 2011
    Publication date: August 29, 2013
    Applicants: INRIA INSTITUT NATIONAL DE RECHERCHE EN INFORMATIQUE ET EN AUTOMATIQUE, UNIVERSITE PIERRE ET MARIE CURIE (PARIS 6), CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (C.N.R.S.)
    Inventors: Laura Grigori, Frederic Nataf
  • Patent number: 8516029
    Abstract: Methods and apparatuses for solving a system on a symmetric diagonally dominant matrix. The method includes constructing an equivalent symmetric diagonally dominant linear system Ax=b from the system on a symmetric diagonally dominant matrix, wherein the matrix A of the equivalent linear system Ax=b has negative off-diagonal entries and zero row sums; constructing a graph of the matrix A of the equivalent linear system; constructing a decomposition of the graph; constructing a two-level process using the decomposition of the graph, wherein the two-level process includes reducing the equivalent linear system Ax=b to a linear system By=c; and extending the two-level process to a multi-level process having more than two levels.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: August 20, 2013
    Assignee: Carnegie Mellon University
    Inventors: Ioannis Koutis, Gary Lee Miller
  • Patent number: 8495120
    Abstract: Methods for increasing the processing speed of computational electromagnetic methods, such as the Method of Moments (MoM), may involve using efficient mapping of algorithms onto a Graphics Processing Unit (GPU) architecture. Various methods may provide speed/complexity improvements to either or both of: (1) direct solution via Lower-Upper (LU) factorization; and (2) iterative methods (e.g., Generalized Minimal Residual (GMRES) method).
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: July 23, 2013
    Assignee: EM Photonics, Inc.
    Inventors: John R. Humphrey, Daniel Price, Eric Kelmelis
  • Patent number: 8468189
    Abstract: The present invention relates to a solution for solving an ill-posed inverse problem in image analysis, e.g. in an electron tomography application in order to recover a structure of a sample. The solution is provided for instance as a method comprising steps of determining reliable prior knowledge about the solution, determining initial guess for the solution and determining the corresponding forward operator, deciding upon model of stochasticity, deciding on suitable regularization method, deciding on updating scheme, and producing a sequence using the set configuration.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: June 18, 2013
    Assignee: Okinawa Institute of Science and Technology Promotion Corporation
    Inventors: Ozan Öktem, Hans Rullgàrd, Johan Lagerros, Lars-Göran Öfverstedt, Anders Edin
  • Publication number: 20130144923
    Abstract: Methods of computer-implemented data assimilation are presented which permit more accurately finding a posterior distribution and estimating the mean xa of the posterior distribution for applications in which the prior distribution is not Gaussian, i.e., is “skewed.” The invention provides an improved Kalman filter, referred to herein as a “Quadratic Ensemble Filter,” which takes the conventional Kalman filter and adds a correction term that makes use of the third and fourth moment matrices of the probability density function ?(x).
    Type: Application
    Filed: November 30, 2012
    Publication date: June 6, 2013
    Inventor: Daniel Hodyss
  • Patent number: 8443034
    Abstract: Techniques are generally described for selecting input vectors that reduce or minimize leakage current for a plurality of integrated circuits (ICs) with the same design, but that differ due to manufacturing variability. In various embodiments, the techniques include determining at least one starting input vector that reduces leakage current in a respective one of N instances of the ICs, and selecting from the determined at least one starting input vector of each respective one of the N instances, a set R of representative input vectors. Some of the embodiments then use each of the representative input vectors in the set R to determine at least a particular input vector to apply to input terminals of an IC in the plurality of ICs to reduce or minimize leakage current in the IC. Additional variants and embodiments may also be disclosed.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: May 14, 2013
    Assignee: Empire Technology Development, LLC
    Inventors: Farinaz Koushanfar, Miodrag Potkonjak
  • Publication number: 20130115371
    Abstract: The present disclosure relates to a method for improving optical qualities of transparent conductive films including a multilayer optical stack and conductive nanowires embedded therein.
    Type: Application
    Filed: November 2, 2012
    Publication date: May 9, 2013
    Applicant: CAMBRIOS TECHNOLOGIES CORPORATION
    Inventor: CAMBRIOS TECHNOLOGIES CORPORATION
  • Patent number: 8417755
    Abstract: A system and methods for reducing memory traffic and power consumption when solving systems of linear equations. Certain embodiments provide several aspects for improved performance in solving a consistent system of linear equations and in computing a generalized inverse. One aspect involves performing row transformations on AX=B, so that the transformed A contains row vectors that are either zero or are part of an orthonormal set. Another aspect involves performing column transformations on A, so that A contains column vectors that are either zero or are part of an orthonormal set. Another aspect involves performing row eliminations differently so that a variation of an LU factorization is obtained that is in a more directly useful form.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: April 9, 2013
    Inventor: Michael F. Zimmer
  • Patent number: 8417754
    Abstract: Techniques are generally described for generating an identification number for an integrated circuit (IC). In some examples, methods for generating an identification of an IC may comprise selecting circuit elements of the IC, evaluating measurements of an attribute of the IC for the selected circuit elements, wherein individual measurements are associated with corresponding input vectors previously applied to the IC, solving a plurality of equations formulated based at least in part on the measurements taken of the attribute of the IC for the selected circuit elements to determine scaling factors for the selected circuit elements, and transforming the determined scaling factors for the selected circuit elements to generate an identification number of the IC. Additional variants and embodiments may also be disclosed.
    Type: Grant
    Filed: May 11, 2009
    Date of Patent: April 9, 2013
    Assignee: Empire Technology Development, LLC
    Inventors: Miodrag Potkonjak, Farinaz Koushanfar
  • Publication number: 20130086137
    Abstract: Systems and methods for parallel incomplete LU (ILU) factorization in distributed sparse linear systems, which order nodes underlying the equations in the system(s) by dividing nodes into interior nodes and boundary nodes and assigning no more than three codes to distinguish the boundary nodes. Each code determines an ordering of the nodes, which in turn determines the order in which the equations will be factored and the solution performed.
    Type: Application
    Filed: September 25, 2012
    Publication date: April 4, 2013
    Applicant: Landmark Graphics Corporation
    Inventor: Landmark Graphics Corporation
  • Patent number: 8412757
    Abstract: Non-negative matrix factorization, NMF, is combined with identification of a maximum margin classifier by minimizing a cost function that contains a generative component and the discriminative component. The relative weighting between the generative component and the discriminative component are adjusting during subsequent iterations such that initially, when confidence is low, the generative model is favored. But as the iterations proceed, confidence increases and the weight of the discriminative component is steadily increased until it is of equal weight as the generative model. Preferably, the cost function to be minimized is: min F , G ? 0 ? ? X - FG ? 2 + ? ? ( ? w ? 2 + C ? ? i = 1 n ? L ? ( y i , w · g i + b ) ) .
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: April 2, 2013
    Assignee: Seiko Epson Corporation
    Inventors: Mithun Das Gupta, Jing Xiao
  • Patent number: 8406334
    Abstract: In one embodiment, a circuit for matrix decomposition is provided. The circuit includes an input circuit for receiving a first matrix. A permutation circuit is coupled to the input circuit and configured to interchange columns of the first matrix according to a selected permutation to produce a second matrix. A systolic array is coupled to the permutation circuit and configured to perform QR decomposition of the second matrix to produce a third matrix and a fourth matrix. A reverse permutation circuit is coupled to the systolic array and configured to interchange rows of the third matrix according to an inverse of the selected permutation to produce a first factor matrix and interchange rows of the fourth matrix according to the inverse of the selected permutation to produce a second factor matrix.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: March 26, 2013
    Assignee: Xilinx, Inc.
    Inventors: Raghavendar M. Rao, Raied N. Mazahreh, Hai-Jo Tarn
  • Patent number: 8407272
    Abstract: A topological categorization method, based on inclusive intervals, provides a general method of analyzing escape topologies for discrete dynamic systems, in complex and higher dimensions, including the calculation of both potential for complex and hypercomplex and field lines for complex iterations
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: March 26, 2013
    Inventor: Michael T. Everest
  • Patent number: 8407269
    Abstract: A computer executable method of processing a representation of a modal interval spherical projection is provided. A representation of a vector comprised of modal intervals X, Y, and Z is provided wherein each modal interval of the modal intervals are delimited by first and second marks of a digital scale. An analytical expression of an azimuthal spherical projection is partitioned into terms of a pair of independent functions wherein a function of the pair exhibits a monotonicity over piecewise domains of the function. A modal interval analysis is performed upon the function wherein arguments of said piecewise domains are modal intervals.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: March 26, 2013
    Assignee: Sunfish Studio, LLC
    Inventor: Nathan T. Hayes
  • Patent number: 8402076
    Abstract: A topological categorization method, based on inclusive intervals, provides a general method of analyzing escape topologies for discrete dynamic systems, in complex and higher dimensions, including the calculation of both potential for complex and hypercomplex and field lines for complex iterations.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: March 19, 2013
    Inventor: Michael T. Everest
  • Patent number: 8401038
    Abstract: Systems, devices, processors, and methods are described which may be used for the reception of a wireless broadband signal at a user terminal from a gateway via a satellite. A wireless signal may include a series of physical layer frames, each frame including a physical layer header and payload. The received signal is digitized and processed using various novel physical layer headers and related techniques to synchronize the physical layer frames and recover data from physical layer headers for purposes of demodulation and decoding.
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: March 19, 2013
    Assignee: ViaSat, Inc.
    Inventors: Donald W. Becker, Matthew D. Nimon, William H. Thesling
  • Patent number: 8380776
    Abstract: The overall material constant of a composite material is computed where the composite material includes multiple kinds of material components in a matrix phase, each of the material constants of the material components and the matrix phase being known. First, for the composite material, an equation, having the material constant of a virtual composite material as an unknown, is prepared by defining the virtual composite material in which each of the material components is dispersed in a form of spherical particles in the matrix phase at a known volume fractions. Next, the overall material constant of the virtual composite material is found as the overall material constant of the composite material by solving the equation. In this case, the equation is a recursive equation which is obtained using the self-consistent method. The volume fraction of a material component in the composite material is computed using the equation.
    Type: Grant
    Filed: March 2, 2009
    Date of Patent: February 19, 2013
    Assignee: The Yokohama Rubber Co., Ltd.
    Inventors: Nobuo Suzuki, Kazuyuki Kabe, Seiichi Nomura
  • Publication number: 20120323985
    Abstract: The problem of aligning multiple liquid chromatography mass spectrometry (LC-MS) runs to a common reference time frame is solved to facilitate comparison among LC-MS runs. The alignment of multiple LCMS can be achieved by solving a sparse system of linear equations to optimally stretch or compress local retention times for maximal similarity among the multiple runs. The multiple LCMS runs can be aligned simultaneously, thereby providing the advantage of efficient use of data by employing a sparse solver. A method of quality control in retention time alignment is also provided.
    Type: Application
    Filed: August 30, 2012
    Publication date: December 20, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Peicheng Du, Frank Suits
  • Patent number: 8332185
    Abstract: A method and system that calculate elementary symmetric functions of subsets of a set {Z} comprising a total of m numerical elements in an m2 time-frame.
    Type: Grant
    Filed: August 17, 2009
    Date of Patent: December 11, 2012
    Assignee: Lockheed Martin Corporation
    Inventor: Jerry A. Guern
  • Patent number: 8314793
    Abstract: Solving for output variable(s) of a model that includes multiple analytically related model variables. The identity of the output model variables and the analytical relationships between the model variables are separately designated. Regardless of the identity of the output variable(s), a solver framework interprets the analytical relationships and solves for the designated output variable(s). The output model variable(s) may be designated separately than the analytical relationships themselves. By simply changing the designation of the output model variable(s), the analytical relationships are reevaluated, and the output variable(s) are solved for. The solver framework itself stays the same regardless of the identity of the output model variable(s).
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: November 20, 2012
    Assignee: Microsoft Corporation
    Inventors: Brian C. Beckman, Henricus Johannes Maria Meijer, Vijay Mital, Darryl E. Rubin
  • Patent number: 8296350
    Abstract: The present invention provides a method and apparatus for QR-factorizing matrix on a multiprocessor system, wherein the multiprocessor system comprises at least one core processor and a plurality of accelerators, the method comprises the steps of: iteratively factorizing each panel in the matrix until the whole matrix is factorized; wherein in each iteration, the method comprises: partitioning an unprocessed matrix part in the matrix into a plurality of blocks according to a predetermined block size; partitioning a current processed panel in the unprocessed matrix part into at least two sub panels, wherein the current processed panel is composed of a plurality of blocks; and performing QR factorization one by one on the at least two sub panels with the plurality of accelerators, and updating the data of the sub panel(s) on which no QR factorization has been performed among the at least two sub panels by using the factorization result.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: October 23, 2012
    Assignee: International Business Machines Corporation
    Inventors: Hui Li, Bai Ling Wang
  • Patent number: 8290145
    Abstract: In a method for the transition from a first masked representation of a value to be kept secret to a second masked representation of the value, according to a first aspect of the invention at least one previously calculated table with a plurality of entries is used, and the calculation is carried out depending on at least one veiling parameter, in order to prevent the value to be kept secret from being spied out. According to a second aspect of the invention, at least one comparison table is used, which, for each table index, provides the result of a comparison between a value dependent on the table index and a value dependent on at least one masking value. A computer program product and a device have corresponding features. The invention provides a technique for protecting the transition between masked representations of a value from being spied out, wherein the masked representations are based on different masking rules.
    Type: Grant
    Filed: September 3, 2004
    Date of Patent: October 16, 2012
    Assignee: Giesecke & Devrient GmbH
    Inventors: Olaf Neisse, Jürgen Pulkus