Abstract: Methods and systems providing for the generation, sending, updating, and monitoring of electronic documents (eDocuments) based on source documents created in Enterprise Resource Planning (ERP) software. An eDocument is generated based on existing source documents, external data, or from other eDocuments. The method and systems ensure that the generated eDocument is compliant with any technical requirements. The eDocument is generated using a document process which transforms a non-compliant source document into a compliant eDocument. An eDocument Framework system can include a mapping application, application interface framework (AIF), an eDocument interface, and a process manager. The AIF is configured to interact with a cloud services provider to create a highly automated process of generating, sending, updating, and monitoring the eDocuments. The cloud service provider is also configured to interact with local authorities.

Abstract: Provided is an information processing apparatus including a first reception unit that receives modification to a translation result of at least one first document from a user, a generation unit that generates a translation rule corresponding to the modification received by the first reception unit, a second reception unit that receives original texts of at least one second document, and a utilization unit that utilizes the translation rule generated by the generation unit at the time of translating the original texts received by the second reception unit, depending on relevance between the at least one first document and the second document.

Abstract: A full subtractor cell is disclosed including an XNOR gate having first and second inputs coupled to first and second bits; an XOR gate having first and second inputs coupled to an XNOR gate output and a carry input bit; a first AND gate having first and second inputs coupled to an XNOR gate output and the carry input bit; an inverter gate having an input coupled to the second bit to generate a complemented second bit; a second AND gate having first and second inputs coupled to the first bit and an inverter output to receive the complemented second bit; and an OR gate having first and second inputs coupled to a first AND gate output and a second AND gate output. An XOR gate output and an OR gate output generate the sum output bit and the carry output bit.

Abstract: A method and apparatus for accumulating arbitrary length strings of input values, such as floating point values, in a layered tree structure such that the order of adds at each layer is maintained. The accumulating utilizes a shared adder, and includes means for directing initial inputs and intermediate result values.

Abstract: A circuit element includes a plurality of computation blocks connected at least partially in series for processing multi-bit numbers. Each of the computation blocks includes a plurality of transistors having characteristic threshold voltages. The circuit element is configured so that the transistors will each operate at a voltage below its threshold voltage. The circuit element includes a plurality of circuit sub-elements each having an output. The circuit sub-element outputs are connected together.

Abstract: An arithmetic unit of arbitrary-precision, including: a main processing unit, which splits up the first and the second arbitrary-precision values into N-bit (where N is a natural number) operands respectively in the-least-significant-bit-first order for computing with the arbitrary-precision data and consecutively outputting a series of pairs of the first and second N-bit operands; and an N-bit arithmetic unit, which performs computing with the N-bit operands, while requesting the main processing unit to feed the next N-bit operands each time the computation completes. The carry bit generated by the operation is fed to the next N-bit operation.

Abstract: Generating a digital signature of an entire embedded code project is provided while maintaining certain exclusion areas so that a productivity application can incorporate application-specific information into the embedded code project without hampering the digital signature. A tree structure of data may be serialized into a data stream. The tree structure may include multiple branches and one or more elements identified as an exclusion area. A digital signature of the data stream may be created and included in a document associated with the tree structure.

Abstract: There is provided a semiconductor circuit for arithmetic processing and an arithmetic processing method that can increase the rate of processing data and reduces the area of a circuit by suppressing wasteful processing. There is provided a computing unit for computing input data within a computation time unit and outputs a computation result representing a result obtained by the computation, and if a carry is generated in the computation a computation circuit (adders 1-3) for outputting carry data representing this carry, and delay means (memory 4) for delaying the computation result from the computation circuit by one computation time unit, are provided.

Abstract: An output-processing circuit for a neural network, which may be implemented on an integrated circuit, comprises at least one latch and at least one adder. Outputs from a plurality of neurons are sequentially received by the output-processing circuit. The output-processing circuit uses gating functions to determine which neuron outputs are summed together to produce neural network outputs.