Abstract: An array circuit includes a plurality of vector-matrix multiplication (VMM) elements arranged in rows and columns. The VMM elements are configured to collectively perform multiplication of an input vector by a programmed input matrix to generate a plurality of output values that are representative of a result matrix that is the result of multiplication of the input vector and the input matrix. The VMM elements store states of the input matrix. Input voltages to the array are representative of elements of the input vector. A VMM element draws charge from a column read line based upon charging of a capacitor in the VMM. An integrator circuit connected to the column read line outputs a voltage that is indicative of a total charge drawn from the column read line by elements connected to the read line, which voltage is further indicative of an element of a result matrix.
Type:
Grant
Filed:
September 24, 2020
Date of Patent:
November 8, 2022
Assignee:
National Technology & Engineering Solutions of Sandia, LLC
Abstract: A display that displays a graph corresponding to a function expression, an input unit that specifies a plurality of point positions on the graph displayed on the display unit, a processor that performs display control of a graph corresponding to a function expression on the display unit, does a specific calculation on the basis of positional information on a plurality of pointers displayed on the display unit and the function expression of the graph and performs display control of a result of calculation on the display unit, performs movement display control on the graph of an arbitrary one of the plurality of pointers displayed on the display unit according to an input from the input unit, and does the calculation again, updates the result of calculation, and performs display control of the updated result on the display unit, an storage area, and a work storage area, are provided.
Abstract: A wireless communication device uses a time-invariant delay-Doppler channel response estimate for received signal demodulation. The device provides coherent signal demodulation by accounting for frequency and time selectivity in a land-based mobile communication environment, which arise mainly because of delay and Doppler shifts, respectively. In one embodiment, the wireless communication device includes a channel estimator that estimates channel response in a wireless communication network by estimating a delay-Doppler response of a wireless communication channel to obtain a delay-Doppler channel response estimate and converting the delay-Doppler channel response estimate to a time-varying channel response estimate, e.g., a time-varying frequency or impulse response. The delay-Doppler response may be estimated in a continuous or discrete domain.
Type:
Grant
Filed:
May 11, 2006
Date of Patent:
June 28, 2011
Assignee:
Telefonaktiebolaget LM Ericsson (publ)
Inventors:
Jiann-Ching Guey, Abdulrauf Hafeez, Dennis Hul
Abstract: A current integration circuit includes an operational amplifier having a capacitor connected between its output and inverting input which integrates an input current. To prevent the op amp's output from becoming saturated, a charge dumping circuit dumps a known charge of the opposite polarity to that stored on the capacitor to the op amp's inverting input, thus reducing the charge on the capacitor and preventing the op amp's output from becoming saturated. A charge dump is triggered whenever the op amp's output exceeds a predetermined trip voltage. Counting the number of charge dumps performed during a given integration period provides a coarse indication of the magnitude of the integrated input current, and the output of the op amp provides a fine indication.
Abstract: An arbitrary function generating circuit incorporating an analog multiplier, amplifier, and frequency multiplier to construct a nonlinear analog circuit equivalent to a generalized Lotka-Volterra equation for performing high-speed calculations.
Type:
Grant
Filed:
January 18, 2001
Date of Patent:
May 24, 2005
Assignee:
National Agriculture and Bio-oriented Research Organization
Abstract: Various components of the present invention are collectively designated as Adaptive Real-Time Embodiments for Multivariate Investigation of Signals (ARTEMIS). It is a method, processes, and apparatus for measurement and analysis of variables of different type and origin. In this invention, different features of a variable can be quantified either locally as individual events, or on an arbitrary spatio-temporal scale as scalar fields in properly chosen threshold space. The method proposed herein overcomes limitations of the prior art by directly processing the data in real-time in the analog domain, identifying the events of interest so that continuous digitization and digital processing is not required, performing direct, noise-resistant measurements of salient signal characteristics, and outputting a signal proportional to these characteristics that can be digitized without the need for high-speed front-end sampling.
Abstract: A method and system for calibrating analog integrated circuits. Initially, a single calibration circuit is formed integral with a group of analog integrated circuits. A control signal and a calibration signal are generated from the calibration circuit. Next, the control signal and the calibration signal are selectively coupled to an input of a particular analog integrated circuit among the group of analog integrated circuits. The particular analog integrated circuit is then selected for calibration via the control signal.
Type:
Grant
Filed:
September 10, 1998
Date of Patent:
May 1, 2001
Assignee:
International Business Machines Corporation