Abstract: A data acquisition system is provided that in one example comprises a sensor electrically coupled to a data acquisition unit via a signal splitter. In use, the sensor senses one or more signals transmitted over a “live” power cable carrying, for example, 50 Hz or 60 Hz, medium voltage power. The one or more signals are then transmitted to the data acquisition unit to be stored, displayed, and/or analyzed. The data acquisition system includes a synchronizer that allows the data acquisition unit to synchronize the storage of the sensed signals to the frequency of the power transmitted over the tested power cable or system. In one embodiment, the synchronizer provides an accurate phase angle reference or trigger signal for accurate phase resolved data acquisition and testing.

Abstract: A method for device level simulation of a circuit modeled by a set of CCR graphs, a computer system programmed to perform such a method, and a computer readable medium which stores code for implementing such a method. Typically, the circuit includes MOS transistors having unknown gate potentials, each CCR graph includes a top rail, and a bottom rail, and variable nodes, each of the transistors having unknown gate potential is modeled in the CCR graphs as a selectable resistor having a selected one of a first resistance and a much larger second resistance, and the method includes the steps of determining potentials at variable nodes of one of the CCR graphs with each selectable resistor of the graph having its first resistance (and also with each selectable resistor of the graph having its second resistance) without determining effective resistances between the variable nodes of the graph and the top rail or bottom rail.