Abstract: Improved performance of analog computers is obtained by utilizing a deliberate reduction in gain of the gain elements present in the analog computer. While a prior output of the circuit (if any) is present, the gain of the gain elements is reduced to a level that is low enough that the input signal cannot propagate through the circuit. The input signal is then changed to a new value, or set of values, while the gain of the gain elements remains reduced. Finally, the gain of the gain elements is increased to a level that is high enough to allow the input signal to propagate through the circuit, resulting in an output that is a solution to the problem represented by the analog computer.

Abstract: A voltage-to-time converter circuit receives a first voltage signal and produces a PWM-modulated signal having a duty-cycle proportional to the first voltage signal. A current integrator circuit receives the PWM-modulated signal from the voltage-to-time converter circuit block and produces an output signal by integrating a current signal from a current source over integration time intervals having a duration which is a function of the duty-cycle of the PWM-modulated signal. The current signal is proportional to a second voltage signal. The output signal is accordingly proportional to a product of the first voltage signal and the current signal, which is furthermore proportional to a product of the first voltage signal and the second voltage signal.

Abstract: A Multi-Input Multi-Output base station includes a plurality of transmitter blocks. Each block includes a time-domain base band signal source circuit that generates an output, a low pass filter circuit coupled to the base band source circuit that filters the output of the base band source circuit, and a signal level adjuster circuit coupled to the base band signal source circuit and the low pass filter and that adjusts the output of the base band signal source circuit based on an output of the low pass filter.

Abstract: A multiplier-divider capable of offsetting errors includes a plurality of multiplication and division units to perform processes and arrangements so that errors generated by signals passing through the multiplier-divider are offset. As a result impact of the errors is reduced. More than one processing signal can be obtained from the same power supply to reduce loss of external sampling.