Abstract: An electrical load management system for controlling first, second, and third electrical loads is provided. A load management computer determines a demand threshold indicating a threshold amount of demanded power from a utility company power grid. The computer determines whether a time interval has an associated non-peak energy charge. And if so, then the computer determines whether a first total load request from the first, second, and third electrical loads will exceed the demand threshold. And if so, then the computer determines whether a second total load request from the first and second electrical loads having high and medium load priorities, respectively, will exceed the demand threshold. And if not, then the computer commands the first and second electrical loads to be energized for the predetermined time interval.

Abstract: One example method may be performed in an operating environment including distributed and/or disaggregated compute nodes that communicate with each other and with a shared computing resource by way of an RDMA fabric. The method may include obtaining, by a first one of the compute nodes, ownership of an atomic synchronization object that controls access to the shared computing resource, using, by the first compute node, the shared computing resource until the shared computing resource is no longer needed by the first compute node, and when the shared computing resource is no longer needed by the first compute node, relinquishing, by the first compute node, the ownership of the atomic synchronization object.

Abstract: A method includes sending, from the master controller to the slave controller, a follow up message in response to a pull of a predefined pin, wherein the follow up message includes a global time of the master controller when the predefined pin was pulled; sending, from the slave controller to the master controller, a validation message in response to the received follow up message, wherein the validation message includes a global time of the slave controller when the pull of the predefined pin is detected by the slave controller; and validating the time synchronization by checking, at the master controller and/or the slave controller, if a difference between the global time of the master controller when the predefined pin was pulled and the global time of the slave controller when the pull of the predefined pin is detected by the slave controller is smaller than a predefined first threshold.

Abstract: A system for transmitting data based on serial communication, which allows the number of slave apparatuses connectable to one master apparatus to be increased, includes a master apparatus configured to generate an input data packet including first data, second data, and control data, and a slave apparatus group consisting of a plurality of slave apparatuses connected in a daisy-chain manner to the master apparatus, wherein each of the slave apparatuses determines first identification information (ID) using bits included in the first data, extracts second ID from the second data, and controls a target device using the control data when the first ID and the second ID match.

Abstract: In an example, a logic circuit comprising a communications interface including a data contact to communicate via a communications bus, an enablement contact, separate from the communication interface, to receive an input to enable the logic circuit, and at least one memory register, comprising at least one reconfigurable address register. The logic circuit may be configured, such that, when enabled, it responds to communications sent via the communication bus which are addressed to the address held in a reconfigurable address register.

Abstract: An electronic device may include: at least one camera; an encoder connected to the at least one camera through a first interface having a first number of signal lines; and a decoder connected to the encoder through a second interface having a second number of signal lines that is less than the first number. The encoder can provide, to the decoder through the second interface, data acquired from the at least one camera through the first interface and data encoded on the basis of identification information indicating each of the first number of signal lines.

Abstract: A control system includes a control unit, a transmission unit, an application execution unit, and an arbitration unit that arbitrates a data set exchanged between the transmission unit and the application execution unit. The arbitration means includes a first acquisition unit that acquires information about pieces of process data managed by the control unit, a second acquisition unit that acquires information about an application executed by the application execution unit, a determination unit that determines process data to be included in a data set based on the information about the pieces of process data acquired by the first acquisition unit and the information about the application executed acquired by the second acquisition unit, and a notification unit that notifies each of the transmission unit and the application execution unit of a content of the process data to be included in the data set determined by the determination unit.

Abstract: A modular system is described which can provide high frequency monitoring of power use and responsive control as well as enabling network connectivity for centralised monitoring and operation. One modular system consists of a communications bus, end caps, and a combination of the modules providing communications, power metering, relay control and battery backup. Each modular system can be configured with a combination of modular units as needed for the application. A combination of bus communication monitoring and tilt detection provides security against external tampering after installation.

Abstract: A method and system for high-speed caching of data writing, a device and a storage medium. The method includes: in response to receiving a data-writing operating instruction emitted by a host, creating a controlling page table and filling sequentially a plurality of control blocks into the controlling page table; submitting an entry pointer of a first instance of the control blocks to a work-queue scheduling engine, to execute tasks corresponding to the plurality of control blocks alternately in the work-queue scheduling engine; sending in advance a completion response to the host and notifying a firmware to perform subsequent processing and falling-into-disk of data; and in response to ending of execution of a task corresponding to a last one instance of the control blocks, releasing a used resource of the controlling page table.

Abstract: Systems and techniques are provided for communicating using an automotive audio bus. An example method can include receiving, by a first automotive audio bus manager, a request from a first automotive audio bus client for a first data transmission to a second automotive audio bus client, wherein a first size of the first data transmission exceeds a maximum data frame size; parsing the first data transmission into a first plurality of data frames based on the first size of the first data transmission and the maximum data frame size; sending a first header frame to a second automotive audio bus manager associated with the second automotive audio bus client, wherein the first header frame includes a first indication of a first incoming long message transmission and the first size of the first data transmission; and sending the first plurality of data frames to the second automotive audio bus manager.

Abstract: The present application relates to a network-on-chip data processing method. The method is applied to a network-on-chip processing system, the network-on-chip processing system is used for executing machine learning calculation, and the network-on-chip processing system comprises a storage device and a calculation device. The method comprises: accessing the storage device in the network-on-chip processing system by means of a first calculation device in the network-on-chip processing system, and obtaining first operation data; performing an operation on the first operation data by means of the first calculation device to obtain a first operation result; and sending the first operation result to a second calculation device in the network-on-chip processing system. According to the method, operation overhead can be reduced and data read/write efficiency can be improved.

Abstract: An electric truck steer-by-wire system and a net-work uncertainty control method therefor. Said system comprises: a master control electric power module (14), a slave control electric power module (18), a road-sensing motor module (4), a steering wheel (1), an upper steering column (3), a lower steering column (10), a rack and pinion steering mechanism (12), wheels (13), a first steering angle sensor (2), a second steering angle sensor (11), a steering domain controller (8), and a vehicle-mounted CAN network (9). By means of the design of the master and slave controllers and actuating mechanisms, the system combines the advantages of steering angle tracking, torque tracking and current tracking, there-by satisfying the steering response requirements and power requirements of the electric truck, and further enhancing the robustness and fault-tolerant performance of the system under a random network time lag.

Abstract: Systems and methods are provided to improve system performance when multiple transaction retry events associated with transaction requests from requester nodes to completer nodes are detected. A retry monitor can monitor the transaction retry events associated with the transaction requests to provide retry information. An intervention level generator can receive information about the transaction retry events and determine an intervention level from a plurality of intervention levels based on the retry information and a retry configuration. Each requester node can be coupled to a regulator to regulate the transactions being requested by that requester node based on the intervention level and a regulator configuration, which can allow the corresponding completer nodes to complete the outstanding transactions and reduce the occurrence of retry events.

Abstract: Provided is a Bluetooth Low Energy (BLE) communication module that supports a dynamic multi-link to configure a wireless ad hoc network. The BLE communication module includes a master configured to scan an advertising message transmitted from a slave of another BLE communication module and a slave connected to the master through an internal interface and configured to receive a scan message transmitted from a master of the other BLE communication module and transmit an advertising message corresponding to the scan message. Each of the master and the slave has a predetermined multi-port and a routing table for processing transmitted or received data.

Abstract: An event trigger master coupled to a first peripheral device and including an event receiving interface, a storage element, a state machine, and a master interface is provided. The event receiving interface is configured to receive an event request. The storage element includes a command queue to store a set command. The state machine performs the set command to access the first peripheral device or a second peripheral device in response to the event request being triggered. The master interface is coupled to the state machine, the first peripheral device, and the second peripheral device. The state machine accesses the first or second peripheral device via the master interface.

Abstract: Methods, systems, and devices for drive strength calibration for multi-level signaling are described. A driver may be configured to have an initial drive strength and to drive an output pin of a transmitting device toward an intermediate voltage level of a multi-level modulation scheme, where the output pin is coupled with a receiving device via a channel. The receiving device may generate, and the transmitting device may receive, a feedback signal indicating a relationship between the resulting voltage of the channel and an value for the intermediate voltage level. The transmitting device may determine and configure the driver to use an adjusted drive strength for the intermediate voltage level based on the feedback signal. The driver may be calibrated (e.g., independently) for each intermediate voltage level of the multi-level modulation scheme. Further, the driver may be calibrated for the associated channel.

Abstract: A communication system includes a controller, a plurality of devices, and a communication channel to which the controller and the plurality of devices are connected in a ring, and over which a communication frame including a plurality of packets is transmitted as differential signals. Each device monitors a data transmission amount per unit time, and is configured to determine whether or not the monitored data transmission amount exceeds a threshold value, and insert data into one of the packets in the communication frame when the monitored data transmission amount is equal to or less than the threshold value.

Abstract: A symmetric multiprocessor includes with a hierarchical ring-based interconnection network is disclosed. The symmetric processor includes a plurality of buses comprised on the symmetric multiprocessor, wherein each of the buses are configured in a circular topology. The symmetric multiprocessor also includes a plurality of multi-processing nodes interconnected by the buses to make a hierarchical ring-based interconnection network for conveying commands between the multi-processing nodes. The interconnection network includes a command network configured to transport commands based on command tokens, wherein the tokens dictate a destination of the command, a partial response network configured to transport partial responses generated by the multi-processing nodes, and a combined response network configured to combine the partial responses generated by the multi-processing nodes using combined response tokens.

Abstract: A method for searching for an interrupted device, a slave device, a master device, and a storage medium. The method includes: connecting slave devices to a master device through a connection device; receiving, by the slave devices, task process information sent by the master device, where the task process information includes: task process information recorded by the master device and the corresponding slave devices when executing tasks; and when the receiving of task process information sent by the master device is interrupted, finding an interrupted slave device according to the interrupted task process information.

Abstract: A memory chip having a first set of pins configured to allow the memory chip to be coupled to a first microchip or device via first wiring. The memory chip also having a second set of pins configured to allow the memory chip to be coupled to a second microchip or device via second wiring that is separate from the first wiring. The memory chip also having a data mover configured to facilitate access to the second microchip or device, via the second set of pins, to read data from the second microchip or device and write data to the second microchip or device. Also, a system having the memory chip, the first microchip or device, and the second microchip or device.

Abstract: To increase an overall access speed and a performance of a bus system, in the present disclosure, a master device is designed to use a clock signal with different clock frequencies to address slave devices and read/write data from/to the slave devices. In an address phase, a first operating frequency which the master device can successfully address the slave devices is used as a clock frequency of the clock signal for addressing. In a read/write phase, a minimum one (i.e., a second operating frequency) of multiple working frequencies of the slave devices is used as the clock frequency of the clock signal for reading/writing, wherein the master device is connected to the slave devices via a bus. The working frequency of the slave device means a maximum clock frequency supported by the slave device.

Abstract: A device includes a master device, a set of slave devices and a bus. The master device is configured to transmit first messages carrying a set of operation data message portions indicative of operations for implementation by slave devices of the set of slave devices, and second messages addressed to slave devices in the set of slave devices. The second messages convey identifiers identifying respective ones of the slave devices to which the second messages are addressed requesting respective reactions towards the master device within respective expected reaction intervals. The slave devices are configured to receive the first messages transmitted from the master device, read respective operation data message portions in the set of operation data message portions, implement respective operations as a function of the respective operation data message portions read, and receive the second messages transmitted from the master device.

Abstract: A power stage configured for assigning each phase a unique address is disclosed. In particular, the disclosed power stage includes temporarily using a dedicated pulse width modulation (PWM) connection between a controller and a phase to assign a unique address to the phase. Then, after the assignment, the PWM connection may be returned to use for regulation, while the phases can communicate over a common communication bus using their assigned addresses. This addressed communication can be used to control a power state of all phases, all phases of a particular rail, or a particular phase. Controlling the power state with addressed commands communicated over a communication bus can help reduce the current consumed by the power stage during light load conditions or sleep states.

Abstract: A storage device sharing system and a storage device sharing method are provided. The storage device sharing system includes a storage device, a first chip and a second chip. The first chip and the second chip are configured to enter a toggle mode and an arbitration mode. In the toggle mode, the first chip that acts as the master controls the arbitration potential to a first control potential and a second control potential, and communicates with the storage device in response to the arbitration potential being the first control potential, and the second chip that acts as a slave communicates with the storage device in response to the arbitration potential being the second control potential.

Abstract: Provided is a drive apparatus including: a first drive unit group including first drive units, each for generating a magnetic field to drive a first object provided with a first lens and magnet in an optical axis direction; and a second drive unit group including second drive units, each for generating a magnetic field to drive a second object provided with a second lens and magnet in the direction. Each of the first and second drive units includes a first and second terminal connected via a clock and data signal line to a master controlling the drive unit as a slave. In at least one of the first drive units, the first and second terminals are respectively forward-connected to the clock and data signal lines. In at least one of the second drive units, the second and first terminals are respectively reverse-connected to the clock and data signal lines.

Abstract: A processing device includes: a receiving module for receiving a configuration from a control device, wherein the configuration includes a destination address, a length, a filled value and a function type; a control module for (A) configuring an access state for accessing a slave device according to the function type and (B) comparing a counting value with the length to generate a comparison result according to the function type, determining whether data received from the slave device reaches an end to generate a determination result, or both; a reading module for reading the data according to the access state; a writing module for writing the filled value to the destination address according to information of the access state, the determination result and the comparison result; and a transmitting module for transmitting an interrupt signal to the control device according to result(s) of the determination result and the comparison result.

Abstract: Described herein are embodiments for dual-port communication and power delivery for one-wire applications. Embodiments of one-wire bridge devices are disclosed to provide a dual-port link for two one-wire masters to communicate with one another in a multi-voltage system while intermittently allowing charging voltage. The configuration may be used to set a bidirectional pass through mode that allows level shifted fast logic signals to pass through the two one-wire links. A timer may also be configurable to time-out the pass through mode from edge in-activity. Power may be derived for operation directly from one of the links, eliminating the need for an external power supply when local power is not available. When local power is available, the other one-wire link provides local access and the pass through mode. Such configurations make it easy for a two-contact solution to be both a communication channel and a power supply for battery charging.

Abstract: A method of analyzing molecules using a nanopore array including a plurality of cells included on a chip is disclosed. Nanopores are caused to be formed in at least a portion of the plurality of the cells. A first physical measurement of the nanopores is evaluated. It is determined whether to cause the molecules to interact with the nanopores. At least a portion of the nanopores is caused to interact with the molecules. A second physical measurement of the nanopores that indicates a property of the molecules is evaluated. It is determined whether to cause the nanopores to be reformed so that the cells may be reused to interact with additional molecules.

Abstract: Provided herein is a digital communications bus suitable for automotive applications, along with bus controllers and sensors that use the bus and its associated communication methods. One illustrative sensor includes: a clock signal generator; a bus interface coupled to differential signal conductors to detect periodic synchronization pulses from a bus controller; and a controller that aligns a clock signal from the clock signal generator with the periodic synchronization pulses. The bus interface sends digital data between the periodic synchronization pulses to the bus controller using the clock signal to control symbol transitions.

Abstract: A controller enumerates a plurality of devices while operating in a daisy-chain mode of operation and then causes the devices to operate in a parallel mode of operation in which the devices are individually addressed.

Abstract: A communication system includes a first device, second devices, and a communication line providing a serial connection from the first device to the second devices to establish a communication connection. An address setting device of the communication system is configured to set addresses of the second devices. The address setting device includes a communication controller. The communication controller is configured to transmit a transmission signal toward the second devices through the communication line and change at least one of an amplitude or a frequency of the transmission signal, and associate the addresses of the second devices with connection precedence of the second devices to the first device based on a reception signal received through the communication line.

Abstract: A master communication device of this communication system comprises: a generation unit that generates transmission data consisting of consecutive data to all slave communication devices following one header; and a transmission unit that transmits the transmission data generated by the generation unit at the fastest cycle, among communication cycles requested by the plurality of slave communication devices. Each of the plurality of slave communication devices of the communication system comprises: a storage unit that adds information indicating reliability to data received from the master communication device and stores the same; a comparison unit that compares the reliability of subsequently received data and the reliability of the data stored in the storage unit; and a selection unit that selects the data stored in the storage unit if the reliability of the data stored in the storage unit is higher than the reliability of the data subsequently received by the comparison unit.

Abstract: A first configurable address decoder can be coupled between a source node and a first interconnect fabric, and a second address decoder can be coupled between the first interconnect fabric and a second interconnect fabric. The first address decoder can be configured with a first address mapping table that can map a first set of address ranges to a first set of target nodes connected to the first interconnect fabric. The second address decoder can be configured with a second address mapping table that can map a second set of address ranges to a second set of target nodes connected to the second interconnect fabric. The second address decoder can be part of the first set of target nodes. The first address decoder and the second address decoder can be configured or re-configured to determine different routes for a transaction from the source node to a target node in the second set of target nodes via the first and second interconnect fabrics.

Abstract: A method for programming and controlling of a plurality of slave devices serially connected in a daisy chain configuration using a master device includes assigning a unique slave address to each slave device in the plurality of slave devices by sending an initialization data packet from the master device serially through the plurality of slave devices; storing, in each of the plurality of slave devices, the assigned slave address; defining a data packet; and transmitting the data packet serially to one or more of the plurality of slave devices. The data packet has a target slave address, a read/write command, a start address, and optionally a register address and an increment value.

Abstract: A universal serial bus (USB) hub with a host bridge function and a control method thereof are provided. The USB hub utilizes a host bridge controller to connect two upstream ports so that two host devices connected to the two upstream ports are capable of transmitting/receiving data each other synchronously, thereby increasing usage convenience and flexibility and making full use of the tow upstream ports.

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed. An example apparatus includes interface circuitry to receive an analog signal. The example apparatus also includes sequencer circuitry to: determine whether the apparatus is to operate in a single transfer state or a multiple transfer state; access a configuration from a control register in a plurality of control registers; initiate a conversion of the analog signal to a digital value based on the configuration; and write the digital value to a result register in a plurality of result registers based on the determination.

Abstract: A device for coupling a fieldbus to a local bus for connection to at least one data bus subscriber, the device comprising a first unit that is connectable to the fieldbus and is adapted for sending and receiving data via the fieldbus; a second unit that is connectable to the local bus and is adapted for sending and receiving data via the local bus in at least one data packet; a data management unit that is connected to the first unit and the second unit, wherein the data management unit is adapted for transferring first symbols from data received via said first unit to said second unit in a sequence-dependent manner; and wherein the second unit is adapted to send at least one data packet including the first symbols on the local bus. In addition, a corresponding method for transferring data is described.

Abstract: In a digital communication system, a master device and a number of slave devices are coupled in communication with the master device over a shared data communication bus. A selection line for each one of the slave devices couples the master device with a respective slave device and is dedicated to selection by the master device of the respective slave device for communication over the shared data communication bus. Each of the slave devices is able to send an interrupt request to the master device over the respective selection line to be served by the master device initiating a communication over the shared data communication bus, each selection line thereby being a bidirectional communication line between the respective slave device and the master device.

Abstract: The present invention relates to a bridge device operable between a master device and a slave device of a communication system, said master device and said slave device arranged for communicating with each other via a parent I2C bus and a child I2C bus and using the I2C protocol, said bridge device comprising—a parent module arranged for connecting said parent I2C bus and comprising a parent I2C transmitter/receiver device and a parent module state machine, —a child module arranged for connecting said child I2C bus and comprising a child I2C transmitter/receiver device and a child module state machine, whereby said parent module and said child module each comprise an internal bridge interface to exchange messages between said parent module and said child module, said messages being generated by said parent module state machine or said child module state machine in response to a change of state caused by an event on their respective I2C buses, whereby said parent module and said child module are each arranged

Abstract: A self-detection mechanism for an IC is disclosed that determines whether the IC's internal bus is in a hanging state. An initialization sequence can be modified after a soft reset by reading data from an internal DRAM of the IC using a Direct Memory Access (DMA) controller as part of the initialization sequence. The read command is issued over the internal bus and, if the bus is hanging, the read command is not completed. Monitoring can be performed by waiting a predetermined period of time (e.g., 100 ms) to determine if the read was properly completed. If so, no further action is needed. If the read was not completed, then a hard reset is requested to be performed. Thus, an initialization sequence can be modified to run dummy transactions through the internal bus, and validate that all paths are functional.

Abstract: A method includes detecting, by a coexistence controller of a system on a chip (SoC), an occurrence of a coexistence event of an SoC component; providing, by the coexistence controller, an indication of the occurrence of the coexistence event to a coexistence coordinator; and changing, by the coexistence controller, an operating point of the SoC from a current operating point to a new operating point responsive to receiving an operating point change request from the coexistence coordinator.

Abstract: A mobile terminal of an electronic device, according to the present invention, comprises a terminal body coupled to a case, and a first display unit coupled to the case, wherein the case comprises: a first body formed to accommodate at least a portion of the terminal body; a second body in which a second display unit is arranged; a wiring part electrically connecting the first body to the second body so that data received from the mobile terminal is transmitted to the second display unit; and a wireless communication unit connected to the wiring part so as to transmit/receive a signal to/from the mobile terminal.

Abstract: A data transfer system includes a bus system; a master unit; at least one slave unit, which is allocated to the master unit and is designed to send interrupt requests directed to the master unit; and a monitor unit, which is connected between the master unit and the bus system. The monitor unit receives messages sent by the master unit and the interrupt requests sent by each slave unit allocated to the master unit. Polling messages directed by the master unit to an allocated slave unit are not forwarded by the monitor unit to the bus system until the slave unit sends an interrupt request via an interrupt request line.

Abstract: Methods and apparatus can be used to turn an existing 240 VAC or 480 VAC/600 VAC outlet into two or more time-sharing, i.e., one operating at a time, outlets. An AC switch box with two time-sharing outlets can be made with either a mechanical switch for switching which load receives power, or automatically, by a microcomputer system, for example. In the automatic AC switch box, the non-favored outlet may be typically powered on unless a load is detected at the favored/default outlet, when power to the non-favored outlet is automatically disconnected until the load is reduced or eliminated.

Abstract: In a method of group control and management among electronic devices, wherein the electronic devices is in communication with a control device, a projectable space instance is provided for the control device to create a workspace, wherein a control and management tool and a plurality of unified tools for driving respective electronic devices are selectively added to the projectable space instance. The projectable space instance is then parsed with a projector by the control device to automatically generate a projected workspace corresponding to the workspace to be created via the projectable space instance. The control and management tool realizes at least one status information of at least a first one of the electronic devices by way of the unified tools, and controls at least a second one of the electronic devices to execute at least one task corresponding to the at least one status information.

Abstract: The disclosure provides a daisy-chain serial peripheral interface (SPI) integrated circuit (IC) and an operation method thereof. The daisy-chain SPI IC includes a first MISO interface circuit, a second MISO interface circuit, a first data enable (DE) interface circuit, and a second DE interface circuit. When the daisy-chain SPI IC is a target slave circuit selected by a master IC for reading target data, the first DE interface circuit outputs a DE signal to the master IC, and the first MISO interface circuit sends back the target data to the master IC based on the timing of the DE signal. When the daisy-chain SPI IC is not the target slave circuit, the signal received by the second DE interface circuit is transmitted to the first DE interface circuit, and the data received by the second MISO interface circuit is transmitted to the first MISO interface circuit.

Abstract: A reporting device communicates with a master device by a first component and a daisy-chained second component. The reporting device receives a signal from the master device via the first component. The signal triggers the reporting device to transmit synchronously a telemetry data packet on the daisy-chained second component when a downstream device is coupled to the second component. The reporting device receives a first header packet having an address of the reporting device, transmits the telemetry data packet to the downstream device, and transmits a second header packet having an address of the downstream device.

Abstract: A bus arrangement includes a coordinator, a first subscriber having a first optical display, a second subscriber having a second optical display, a third subscriber having a third optical display, and a bus that couples the coordinator to the first, second, and third subscribers. In a standard operating phase, the first subscriber is configured to display first local information of the first subscriber on the first optical display, the second subscriber is configured to display second local information of the second subscriber on the second optical display, and the third subscriber is configured to display third local information of the third subscriber on the third optical display. The coordinator is configured to switch from a standard operating phase to a display operating phase based on detecting a fault in the first subscriber.

Abstract: Systems and methods for determining a location of one or more user equipment (UE) in a wireless system can comprise receiving reference signals via a location management unit having two or more co-located channels, wherein the two or more co-located channels are tightly synchronized with each other and utilizing the received reference signals to calculate a location of at least one UE among the one or more UE. Embodiments include multichannel synchronization with a standard deviation of less than or equal 10 ns. Embodiments can include two LMUs, with each LMU having internal synchronization, or one LMU with tightly synchronized signals.

Abstract: A handshake protocol circuit, a chip and a computer device. In the present handshake protocol circuit, according to level signals of a first protocol signal input end, a first protocol signal output end, a second protocol signal input end and a second protocol signal output end, a control circuit controls a data storage circuit to store and output operation data, which is equivalent to caching the operation data by the storage circuit. Therefore, when the number of functional module circuits is relatively large, the continuity of combination logic of handshake protocols between the module circuits is relatively reduced, thereby relatively ensuring the normal communication of data between the functional module circuits. In addition, the present disclosure further provides a handshake protocol chip and a computer device.