Hot Insertion Patents (Class 710/302)
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Patent number: 11520530Abstract: A peripheral device includes one or more processors and a memory storing program instructions that when executed implement virtualization offloading components of a virtualized computing service, including a storage manager. The offloading components establish network connectivity with a control plane of the service. Based on detecting that a hardware server, in a separate enclosure, has been linked to the peripheral device, the hardware server is presented as a virtualization host of the service. The offloading components initiate compute instance configuration operations at the server in response to commands issued to the control plane, including at least one configuration operation initiated by the storage manager to enable access to a logical storage device from a compute instance.Type: GrantFiled: September 24, 2019Date of Patent: December 6, 2022Assignee: Amazon Technologies, Inc.Inventors: Anthony Nicholas Liguori, Eric Jason Brandwine
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Patent number: 11516883Abstract: A modular fixed wireless access (FWA) radio dock system is provided that allows docking of a single radio module that can be installed in multiple, different locations by connecting to any one of a plurality of docks and/or communication accessories. The radio module can be paired with different types/configurations of docking stations that include various connectivity ports that provide connectivity to a local network, a wired/wireless router, or other networking equipment. The docking stations can comprise both indoor and outdoor docking stations usable with the same radio module, and may include heat sink assemblies and/or fans that work in conjunction with heat sink assemblies of the radio module, as well as effectuate environmental sealing.Type: GrantFiled: August 3, 2020Date of Patent: November 29, 2022Assignee: Inseego Corp.Inventors: Vishal Donthireddy, Ashish Sharma, Pedro Gutierrez, Bill Babbitt, Todd Conklin, Sean Kim
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Patent number: 11507421Abstract: Information handling systems (IHSs) and methods are provided herein to allocate Peripheral Component Interconnect Express (PCIe) bus resources to a plurality of PCIe slots according to various PCIe bus resource allocation option settings. At least one host processor is included within the IHS for executing program instructions to detect a PCIe bus allocation option setting selected from a plurality of options provided in a boot firmware setup menu; determine if the PCIe bus allocation option setting has changed since the IHS was last booted; and allocate PCIe bus resources to the plurality of PCIe slots according to the detected PCIe bus allocation option setting. The plurality of options provided in the boot firmware setup menu include at least an auto detect option, which when selected, enables the at least one host processor to automatically detect unused PCIe slots and reallocate PCIe bus resources to used PCIe slots.Type: GrantFiled: June 11, 2019Date of Patent: November 22, 2022Assignee: Dell Products L.P.Inventors: Chih-Yu Chan, Terry Matula
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Patent number: 11494079Abstract: A method includes steps of: assigning a value of a setting variable to a memory allocation variable; allocating address space to peripheral devices based on the memory allocation variable; determining whether allocated address space is sufficient; acquiring a system-wise greatest demand size value when allotted address space is insufficient; determining whether the memory allocation variable exceeds the system-wise greatest demand size value; updating the memory allocation variable to have a larger value when the memory allocation variable does not exceed the system-wise greatest demand size value; and assigning the value of the memory allocation variable to the setting variable when the memory allocation variable exceeds the system-wise greatest demand size value.Type: GrantFiled: June 28, 2021Date of Patent: November 8, 2022Assignee: MITAC COMPUTING TECHNOLOGY CORPORATIONInventor: Ching-Hsiang Lu
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Patent number: 11477319Abstract: An apparatus for preventing use of a mobile device while operating a motor vehicle includes a housing for connection to the motor vehicle, a processor and memory contained within the housing for storing and executing mobile device locking software and communication circuits contained within the housing and connected to the processor for sending and receiving locking signals to the mobile device. When the vehicle power is turned on the locking signals are sent to the mobile device and a locking application installed on the mobile device locks the mobile device and prevents the sending or receiving of calls or text messages.Type: GrantFiled: September 8, 2017Date of Patent: October 18, 2022Assignee: Drivecare Technologies Inc.Inventors: Angus Poulain, Josh Poulain
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Patent number: 11422965Abstract: A computing system includes a component, a hot-swap controller that is coupled to the component, and a hot-swap controller monitoring configuration subsystem that is coupled to the hot-swap controller. The hot-swap controller monitoring subsystem receives a hot-swap controller monitoring configuration for the hot-swap controller that defines at least one monitoring characteristic for monitoring the component, uses it during an initialization of the computing system to generate hot-swap controller monitoring configuration commands, and transmits the hot-swap controller monitoring configuration commands to the hot-swap controller to configure the hot-swap controller to monitor the component according to at least one monitoring characteristic defined by the hot-swap controller monitoring configuration.Type: GrantFiled: June 17, 2021Date of Patent: August 23, 2022Assignee: Dell Products L.P.Inventors: Chandrasekhar Mugunda, Rui An, Akshata Sheshagiri Naik
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Patent number: 11409649Abstract: A data storage interconnect system has a network controller with a first expansion bus switch connected to a central processor over an expansion bus interface thereof, and a first transceiver connected to the first expansion bus switch. A directly attachable storage host with a second transceiver is communicatively linked to the first transceiver of the network controller. A second expansion bus switch is connected to the second transceiver, and is connectable to a removable storage device over an expansion bus interface. The removable storage device communicates with the second expansion bus switch over an expansion bus protocol. A data transmission link interconnects the first transceiver and the second transceiver, with expansion bus protocol data traffic between the first expansion bus switch and the second expansion bus switch being carried thereon.Type: GrantFiled: January 22, 2018Date of Patent: August 9, 2022Assignee: PANASONIC AVIONICS CORPORATIONInventors: Peter Braun, Melvin Lahip
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Patent number: 11399084Abstract: A MIPI CSI-2/D-PHY receiving device is configured to handle being hot plugged to MIPI CSI-2/D-PHY transmitting device. During a hot plugging event, the MIPI CSI-2/D-PHY receiving device has not been initialized by receipt from the MIPI CSI-2/D-PHY transmitting device of a Stop State signal of duration TINIT. Though the MIPI CSI-2/D-PHY transmitting device is already transmitting data associated with a partial frame, the MIPI CSI-2/D-PHY receiving device will not enter into an error or unknown state, and will ignore line start/end and frame end events and drop the data packets associated with the partial frame until a frame start event corresponding to a full frame is received from the MIPI CSI-2/D-PHY transmitting device.Type: GrantFiled: May 12, 2020Date of Patent: July 26, 2022Assignee: NXP USA, Inc.Inventors: Joachim Fader, Naveen Kumar Jain, Shreya Singh, Thomas John Rodriguez, Shivali Jain
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Patent number: 11379026Abstract: The present application provides an electronic device for preventing a universal serial bus (USB) device from being damaged, and an operating method therefor. The electronic device includes a universal serial bus (USB) connector connectable to at least one of a charging device and a USB device through a dual gender, and at least one processor electrically coupled to the USB connector. The at least one processor is configured to detect a connection of the charging device and the USB device to the electronic device through the USB connector, in response to the connection of the charging device and the USB device to the electronic device, determine a charging voltage satisfying a designated condition, and request the charging device to provide the determined charging voltage through the USB connector.Type: GrantFiled: July 29, 2020Date of Patent: July 5, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Wookwang Lee, Dongrak Shin, Kyoungwon Kim, Sungjoon Cho, Kyounghoon Kim
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Patent number: 11354137Abstract: In one example in accordance with the present disclosure, a modular computing component is described. The modular computing component includes a first terminal to connect the modular computing component to at least one of a host computing device and another modular computing component. Controller memory of the modular computing component stores information relating to at least one of build level information, revision level information, and generation level information. A controller of the modular computing component transmits the at least one of build level information, revision level information, and generation level information to the host computing device.Type: GrantFiled: July 10, 2018Date of Patent: June 7, 2022Assignee: Hewlett-Packard Development Company, L.P.Inventors: Chi So, Nam H. Nguyen, Robert C. Brooks
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Patent number: 11348620Abstract: An information handling system may include a memory comprising a plurality of memory modules, each memory module comprising a plurality of memory chips, a host system comprising a host system processor configured to, during a boot of the information handling system, execute a basic input/output system of the information handling system configured to monitor for one or more faults of one or more memory modules of the plurality of memory modules, and control circuitry. The control circuitry may be configured to, in response to the one or more faults, determine if, all of one or more memory modules associated with a power control signal of such one or more memory modules have experienced faults, and if all of the one or more memory modules associated with the power control signal have experienced faults, de-assert the power control signal such that the one or more memory modules are de-energized.Type: GrantFiled: January 26, 2021Date of Patent: May 31, 2022Assignee: Dell Products L.P.Inventors: Timothy M. Lambert, Jordan Chin, Nihit S. Bhavsar
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Patent number: 11316308Abstract: The present disclosure provides an adapter, a multi-device detection system and a detection method. The adapter includes a circuit board, a male connector, a first female connector and a second female connector arranged on the circuit board. The male connector is electrically connected to the first female connector and the second female connector. The male connector is provided with two independent D+ pins and two independent D? pins. One of the two independent D+ pins is electrically connected to a D+ pin of the first female connector, and the other one of the two independent D+ pins is electrically connected to a D+ pin of the second female connector. One of the two independent D? pins is electrically connected to a D? pin of the first female connector, and the other one of the two independent D? pins is electrically connected to a D? pin of the second female connector. The present disclosure further provides a multi-device detection system and a detection method thereof.Type: GrantFiled: December 5, 2018Date of Patent: April 26, 2022Assignee: JRD COMMUNICATON (SHENZHEN) LTD.Inventors: Junlan Lin, Maolin Gong
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Patent number: 11288224Abstract: A semiconductor system capable of reducing processing time in connection processing to a USB port is provided. The semiconductor system comprises TCPM and TCPC. The TCPM and the TCPC are communicably connected via the I2C bus. The TCPM has a connection detector. The TCPC in a CC logic and a controller. The CC logic embodies a state machine. The controller controls transitions in the state machine. The controller outputs a connected state transition notification when the connected state transitions to the connected state. The connection detector receives the connected state transition notification and detects the connection of the USB port. The TCPM performs a process corresponding to the connection detection by the connection detector.Type: GrantFiled: April 28, 2020Date of Patent: March 29, 2022Assignee: RENESAS ELECTRONICS CORPORATIONInventor: Dan Aoki
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Patent number: 11275817Abstract: An information handling system may include a processor, and a cryptoprocessor comprising at least one storage location. The information handling system may be configured to: store, in the at least one storage location, cryptographic data regarding secure boot of the information handling system; receive an indication that a lockdown is to be initiated; in response to the indication, overwrite the at least one storage location with invalid data; and initiate the lockdown by triggering a reboot of the information handling system.Type: GrantFiled: September 25, 2019Date of Patent: March 15, 2022Assignee: Dell Products L.P.Inventors: Thomas Cantwell, Mark W. Shutt
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Patent number: 11226670Abstract: An information processing apparatus includes: an interface; a battery; and a controller. The controller is configured to: determine whether a reduction notification indicating reduction in the electric power is received from an external device when the interface is receiving the electric power of a first power amount from the external device; and request the external device via the interface to supply the electric power of a second power amount that is less than the first power amount and greater than or equal to an amount of the electric power consumed in self-discharge of the battery.Type: GrantFiled: December 21, 2018Date of Patent: January 18, 2022Assignee: BROTHER KOGYO KABUSHIKI KAISHAInventor: Yasuhiro Shimamura
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Patent number: 11226918Abstract: In some examples, a system includes a memory resource, a communication channel to allow a bus mastering capable device to access the memory resource, and a controller to block the system from responding to a request from the bus mastering capable device for accessing the memory resource until the controller has authorized the bus mastering capable device.Type: GrantFiled: December 8, 2017Date of Patent: January 18, 2022Assignee: Hewlett-Packard Development Company, L.P.Inventors: Monji G Jabori, Wei Ze Liu
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Patent number: 11226757Abstract: A method for hot plug memory device data protection is provided. Removal of a hot plug memory device from a connection interface is determined by a status of an interface plug-in detection signal, wherein the hot plug memory device is electrically coupled to a host through the connection interface. A command for moving data is transmitted to the hot plug memory device by the host. Temporary data is moved from a cache module of the hot plug memory device to a flash memory module of the hot plug memory device by the hot plug memory device in response to the command for moving data.Type: GrantFiled: November 5, 2019Date of Patent: January 18, 2022Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventor: Guo-Bing Jiang
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Patent number: 11153164Abstract: Various embodiments for performing hardware upgrades in a disaggregated computing environment. A workload is run on a disaggregated computing system while providing a new component to at least one of a plurality of component pools used by the disaggregated computing system. Point-to-point circuit wire level switching is used to switch the disaggregated system from an assigned component residing in a first of the plurality of component pools to the new component residing in a second of the plurality of component pools without interrupting the running workload.Type: GrantFiled: January 4, 2017Date of Patent: October 19, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John A. Bivens, Min Li, Ruchi Mahindru, HariGovind V. Ramasamy, Yaoping Ruan, Valentina Salapura, Eugen Schenfeld
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Patent number: 11106573Abstract: A first execution plan for a first version of a structured query language statement can be requested from a database management system. The first execution plan for the first version of the structured query language statement can be loaded into a first directed graph tree structure comprising a plurality of nodes. The first directed graph tree structure can be scanned to determine whether a full table scan for accessing requested data is represented by at least a one of the plurality of nodes of the directed graph tree structure. Responsive to determining that the full table scan for accessing the requested data is represented by the at least one of the plurality of nodes of the directed graph tree structure, a first indicator that indicates a fault condition can be output.Type: GrantFiled: July 31, 2019Date of Patent: August 31, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Jonathan M. Harding
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Patent number: 11100603Abstract: A controller is attached to a back face of a display device. The controller includes: a housing; a control unit removably accommodated in a slot formed in the housing and configured to control the display device; a backboard provided inside the housing on the interior side with respect to the direction of insertion of the control unit and connected to the control unit; and a second connector connected to a first connector provided for the display device to establish connection between the backboard and the display device.Type: GrantFiled: October 29, 2018Date of Patent: August 24, 2021Assignee: FANUC CORPORATIONInventors: Kouhei Yoshida, Hideo Kobayashi, Hiroyuki Suwa, Junichi Sakamoto
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Patent number: 11086780Abstract: An aspect includes providing a scratchpad memory to at least one persistent storage device of a plurality of persistent storage devices in a storage array. The scratchpad memory includes non-volatile storage. An aspect also includes designating the scratchpad memory for storing data corresponding to write operations implemented by a storage system, apportioning the scratchpad memory among each storage controller of a plurality of storage controllers in the storage system, and receiving, at the scratchpad memory, a write request from one of the storage controllers. An aspect further includes writing data of the write request to a location in the scratchpad memory based on the apportioning and corresponding to the one of the storage controllers.Type: GrantFiled: March 23, 2020Date of Patent: August 10, 2021Assignee: EMC IP Holding Company LLCInventors: Boris Glimcher, Amitai Alkalay
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Patent number: 11023140Abstract: Several embodiments of memory devices and systems with removable storage are disclosed herein. In one embodiment, a non-volatile dual in-line memory module (NVDIMM) includes a controller and a non-volatile memory slot configured to operatively connect a removable non-volatile memory device to the controller. The NVDIMM further comprises one or more volatile memories operatively connected to the controller. The controller is configured to backup content on the one or more volatile memories onto a removable non-volatile memory device operatively connected to the controller via the non-volatile memory slot. In some embodiments, the NVDIMM further comprises dedicated hardware configured to direct the controller to backup content on the one or more volatile memories onto a removable non-volatile memory device operatively connected to the controller via the non-volatile memory slot.Type: GrantFiled: December 21, 2017Date of Patent: June 1, 2021Assignee: Micron Technology, Inc.Inventor: William A. Lendvay
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Patent number: 10990303Abstract: A memory allocation method and apparatus is disclosed. The method includes: obtaining unoccupied mirrored memory in an initial mirrored memory, where the initial mirrored memory is indicated by a mirrored memory address range that is provided by an BIOS of a computer system to the an OS of the computer system during initialization of the OS; performing detection on data requiring memory allocation; and when detecting that the data is data to be stored in mirrored memory, allocating, from the unoccupied mirrored memory, the mirrored memory to the data to be stored in the mirrored memory. The memory allocation method can accurately find the mirrored memory, and allocating the mirrored memory to the data that needs to be stored in the mirrored memory. Therefore, this method ensures usage efficiency of the limited mirrored memory.Type: GrantFiled: May 29, 2019Date of Patent: April 27, 2021Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Xiuqi Xie, Xishi Qiu
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Patent number: 10983825Abstract: This application provide a method of processing a process in a container. The method is used in a physical machine, multiple containers are deployed on the physical machine, the physical machine includes a watchdog drive, and the method includes: receiving, by the watchdog drive, a first operation instruction of a first container by using a dev which is a device file, where the first operation instruction includes a first process identification PID, and the first PID represents that the first operation instruction is delivered by a first process in the first container; determining, according to the first PID, first namespace corresponding to the first container; and deleting all processes in the first container according to the first namespace.Type: GrantFiled: February 27, 2019Date of Patent: April 20, 2021Assignee: Huawei Technologies Co., Ltd.Inventors: Yufang Du, Yangyang Jiang
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Patent number: 10928601Abstract: An apparatus and system that includes a plurality of data devices, a network module, and a chassis. The network module may include an interface defining couplings and channels extending between the couplings defining a network topology for interconnecting data devices. The chassis may be configured to receive data devices and the network module to operably couple the received data devices via the interconnect topology defined by the network module.Type: GrantFiled: February 19, 2018Date of Patent: February 23, 2021Assignee: Seagate Technology LLCInventors: Richard C. A. Pitwon, Alexander C. Worrall
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Patent number: 10884816Abstract: A resource management method, system, and computer program product for creating a dummy virtual machine (VM) in a Virtual Machine (VM) hypervisor and a dummy container in a container engine for a resource management purpose, adding hooks for each of the VM and the container, and calling the container engine to update a resource allocation in the dummy container when the hook of the VM is started and the VM hypervisor to update a resource allocation in the dummy VM when the hook of the container is started.Type: GrantFiled: March 28, 2017Date of Patent: January 5, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Yanyan Hu, Guang Cheng Li, Yubo Li, Chao Zhu
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Patent number: 10860514Abstract: Implementations of the subject matter described herein provide an input/output (I/O) card for storage device and a storage device. The I/O card and the disk drive for the storage device have the same form factor and comply with the same protocol, to enable the I/O card and the disk drive can be arranged at the same end of the storage device.Type: GrantFiled: June 15, 2017Date of Patent: December 8, 2020Assignee: EMC IP Holding Company LLCInventors: Haifang Zhai, Jing Chen, Yujie Zhou, Hendry Xiaoping Wu, David Wei Dong
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Patent number: 10824499Abstract: An embodiment includes a memory module, comprising: a module error interface; and a plurality of memory devices, each memory device coupled to the module error interface, including a data interface and an device error interface, and configured to communicate error information through the device error interface and the module error interface.Type: GrantFiled: January 8, 2018Date of Patent: November 3, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Chaohong Hu, Hongzhong Zheng, Uksong Kang, Zhan Ping
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Patent number: 10795424Abstract: A server power saving system includes a motherboard and a backplane. The motherboard includes a CPLD, a basic I/O control chip electrically connected with the CPLD, and a clock chip electrically connected with the CPLD. The basic I/O control chip includes a basic I/O control program The backplane includes a HD microcontroller electrically connected with the CPLD and a HD connection port electrically connected with the HD microcontroller and the clock chip. The HD microcontroller sends clock enable signal to the CPLD when a HD is electrically connected with the HD connection port. The CPLD transmits clock enable signal to the basic I/O control chip. The basic I/O control chip sends confirmation signal to the CPLD according to clock enable signal, and the CPLD determines whether to drive the clock chip to send clock signal to the HD connection port according to a content of confirmation signal.Type: GrantFiled: September 19, 2018Date of Patent: October 6, 2020Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATIONInventor: Ying-Xian Han
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Patent number: 10733120Abstract: A bus arrangement includes a coordinator; a first subscriber; a first subscriber arrangement with a second subscriber; and a bus. The bus couples the coordinator with the first subscriber and the second subscriber. The first subscriber is arranged between the coordinator and the second subscriber on the bus. The bus arrangement is configured such that the first subscriber arrangement can be decoupled from the bus in an operating phase, and such that the first subscriber cannot be decoupled from the bus in the operating phase.Type: GrantFiled: December 6, 2016Date of Patent: August 4, 2020Assignee: EATON INTELLIGENT POWER LIMITEDInventors: Matthias Hansing, Franz Heller, Peter Thiessmeier
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Patent number: 10732991Abstract: Concurrent maintenance of an input/output (I/O) adapter backing a virtual network interface connection (VNIC) including receiving, by a hardware management console (HMC), a request to disconnect the I/O adapter from a computing system, wherein the computing system comprises a logical partition and virtual I/O server; instructing, by the HMC over a communications link, the virtual I/O server to deconfigure and remove the server VNIC driver; determining, by the HMC, that a replacement I/O adapter is installed on the computing system; and in response to determining that the replacement I/O adapter is installed on the computing system, instructing, by the HMC over the communications link, the virtual I/O server to add and configure a replacement server VNIC driver.Type: GrantFiled: October 25, 2019Date of Patent: August 4, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Curtis S. Eide, Dwayne G. McConnell, Xiaohan Qin
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Patent number: 10726809Abstract: An image display apparatus includes a display unit that displays an image, a connection unit connected to a replaceable interface board and communicating with an external apparatus via the interface board; and a control unit that determines a type of the interface board connected to the connection unit and restricts power supply to the interface board based on the type of the interface board.Type: GrantFiled: October 26, 2018Date of Patent: July 28, 2020Assignee: SEIKO EPSON CORPORATIONInventors: Daisuke Kasahara, Takeshi Furihata
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Patent number: 10621133Abstract: Managing flexible adapter configurations in a computer system including assigning an initial amount of resources to a set of empty expansion bus slots of the computer system; detecting an adapter has been attached to one of the set of empty expansion bus slots; receiving, by a hypervisor, a request for additional resources for use by the detected adapter, wherein the additional resources are in addition to the initial amount of resources assigned to the expansion bus slot occupied by the detected adapter; determining, by the hypervisor, an availability of the additional resources for the detected adapter; in response to determining that the additional resources are available for the detected adapter, assigning, by the hypervisor at runtime, the requested additional resources to the detected adapter.Type: GrantFiled: February 8, 2017Date of Patent: April 14, 2020Assignee: International Business Machines CorporationInventors: Jesse P. Arroyo, Charles S. Graham, Daniel J. Larson, Timothy J. Schimke
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Patent number: 10623166Abstract: Systems and methods for remotely resetting networked devices is disclosed. The system can comprise a primary network connection and a secondary network connection to provide communications redundancy. The system can also include physical connections between networked devices to enable devices to be reset regardless of the type of error. The method can include monitoring one or more parameters of a device to determine what type of error is occurring and what action to take. The system can enable a first computer (or other electronic device) to restart applications, adapters, and services on a second computer (or other electronic device). The system can also enable the first computer to reset or restart the second computer. The system can enable networked computers to monitor and restore operation to other computers on the same network without human intervention.Type: GrantFiled: August 26, 2016Date of Patent: April 14, 2020Assignee: T-Mobile USA, Inc.Inventors: Michael Mitchell, Peter P. Myron
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Patent number: 10565150Abstract: An example peripheral device includes a module interface to receive power and data communication from a computing device. The peripheral device also includes an attachment tab to affix the peripheral device to a lower side of the computing device. The peripheral device further includes a latch to control an engagement of the attachment tab with the computing device. The peripheral device further includes a sensing circuit to detect a change in position of the latch. The peripheral device further includes a controller to, in response to detecting the latch moving from a locked position to an unlocked position, indicate a hot unplug prediction to the computing device via the module interface.Type: GrantFiled: July 13, 2016Date of Patent: February 18, 2020Assignee: Hewlett-Packard Development Company, L.P.Inventors: Chi So, Nam H Nguyen, Ted T Nguy
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Patent number: 10564986Abstract: A disclosed example method to suspend and resume a device includes: after detecting a low-power suspend mode request, determining a storage performance of the device to store suspend state data; based on the storage performance of the device, setting a suspend flag to indicate a low-power suspend mode to a processor platform; when resuming from the low-power suspend mode, confirming a setting of a resume flag from the processor platform, the resume flag to notify an operating system to resume from the low-power suspend mode; and when the resume flag is set, restoring state data corresponding to an operating system context from a non-volatile dual-purpose system and storage memory.Type: GrantFiled: December 22, 2016Date of Patent: February 18, 2020Assignee: Intel CorporationInventors: Michael A. Rothman, Vincent J. Zimmer, Glenn J. Hinton, Barnes Cooper, Leena K. Puthiyedath
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Patent number: 10540127Abstract: A communication processor of a user PC establishes a connection with a relay server to receive remote support by an operator PC, and installs in the user PC a printer driver for performing a print instruction to a printer driver of the operator PC from the user PC. The communication processor of the user PC transmits, via the relay server, print data generated by the printer driver of the user PC to the operator PC, for printing by the printer driver of the operator PC. The communication processor of the user PC uninstalls the printer driver from the user PC in accordance with the connection with the relay server being disconnected.Type: GrantFiled: August 27, 2018Date of Patent: January 21, 2020Assignee: CANON KABUSHIKI KAISHAInventor: Kenta Fukushima
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Patent number: 10523436Abstract: The present disclosure relates to a security locking device of computers having separate key pairs, and including an encryption board inserted between a main board and a hard disk, and an encryption board being inserted into the encryption board to perform a real-time authentication process. The electronic key and the encryption board performs the real-time authentication process and hardware anti-copy self-testing process, and encrypt the data communicated between the encryption board and the electronic key. After passing the authentication process and the hardware anti-copy self-testing process, the electronic key combines an internally stored key list with the key list on the encryption board, and selects a user key to encrypt/decrypt the data on the disk according to the partition of the hard disk where the encrypted data is written to. The security locking device can assure the safety of the data, and the hardware is prevented from being copied.Type: GrantFiled: December 18, 2015Date of Patent: December 31, 2019Assignees: SHENZHEN ZHENHUA MICROELECTRONICS CO., LTD, CHINA ZHENHUA (GROUP) SCIENCE & TECHNOLOGY CO., LTDInventors: Jianguo Zhang, Zilin Yi
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Patent number: 10509751Abstract: In cases where local devices (6, 6a) support a master transfer function, a portion of the memory space, of each of local devices (6, 6a), to be controlled from system host (2) is mapped onto a memory space on system host (2) side and a plurality of local devices (6, 6a) are reconfigured as one virtual local device. This provides information processing apparatus (4) which, in cases of connection with the plurality of local devices (6, 6a), resolves resource shortage on system host (2) side by appropriately mapping necessary registers of local devices (6, 6a) onto a memory space for system host (2).Type: GrantFiled: March 8, 2017Date of Patent: December 17, 2019Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Hideaki Yamashita, Takeshi Ootsuka
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Patent number: 10503491Abstract: A method includes receiving, at a first processing device of an input/output module (IOM), new firmware data for the IOM. The method also includes sending an output hold command from the first processing device to a second processing device of the IOM. The method further includes upgrading firmware of the IOM with the new firmware data using the first processing device and attempting a reboot of the first processing device. In addition, the method includes, in response to the output hold command and during the upgrading of the firmware and the rebooting of the first processing device, using the second processing device to cause a field circuit of the IOM to hold at least one previous output signal for one or more external devices.Type: GrantFiled: September 16, 2016Date of Patent: December 10, 2019Assignee: Honeywell International Inc.Inventors: Nagaraja Sundaresh, Michael D. Carney, Shripad Pande, Shankar Pendyala, Meraj Jabri
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Patent number: 10496068Abstract: An electronic device includes a main module and sub modules. The sub modules includes a first sub module and a second sub module. The electronic device searches for a communication address for the main module and the first sub module to communicate, and changes a connection route between the first sub module and the second sub module from a disconnected state to a connected state, after the communication address is found.Type: GrantFiled: March 23, 2018Date of Patent: December 3, 2019Assignee: CANON KABUSHIKI KAISHAInventor: Hiroki Ota
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Patent number: 10489546Abstract: A system-on-a-chip (SoC) includes a master module and a first adapter module. The master module includes an upstream interface and a downstream interface. The upstream interface is coupled to a host unit for receiving a write burst or a read burst therefrom. The master module is configured to convert the write burst or the read burst into a series of access requests to the downstream interface. The first adapter module includes an input interface, an output interface, and an endpoint interface, and an address Base Address Register (BAR). The input interface is coupled to the downstream interface of the master module. The output interface is coupled to a second adapter module or to a termination module. The endpoint interface is coupled to a first functional unit or to a third adapter module. The first adapter module is configured to detect a respective access request corresponding to the address BAR.Type: GrantFiled: June 29, 2018Date of Patent: November 26, 2019Assignee: Amazon Technologies, Inc.Inventor: Gil Stoler
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Patent number: 10489257Abstract: The present disclosure includes apparatuses comprising replaceable memory. An example apparatus may include a controller and a memory package coupled to the controller and including a plurality of memory dies. At least one of the memory package and the controller may be a replaceable unit that is removable from the apparatus and replaceable with a different replaceable unit while maintaining operation of the apparatus.Type: GrantFiled: August 8, 2017Date of Patent: November 26, 2019Assignee: Micron Technology, Inc.Inventors: Ananda C. S. Mahesh, Gregory P. Shogan
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Patent number: 10466923Abstract: Embodiments of the inventive concept include Open Cloud Server (OCS)-compliant and other enterprise servers having high-density modular non-volatile flash memory blades and associated multi-card modules. A modular non-volatile flash memory blade can be seated within a 1 U tray. The flash memory blade can include a server motherboard and multiple non-volatile flash memory blade multi-card modules. Each of the multi-card modules can include a printed circuit board, a switch coupled to the printed circuit board, a module power port, an input/output port, and riser card slots to receive solid state drive riser cards. The solid state drive riser cards can be seated within a corresponding riser card slot of the multi-card modules, and can each include multiple solid state drive chips. The server motherboard can communicate with the solid state drive chips via the cable connector riser cards and associated cables.Type: GrantFiled: October 20, 2015Date of Patent: November 5, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Zhan Ping, Harry Rogers
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Patent number: 10452602Abstract: Embodiments of the present disclosure provide for an apparatus for facilitating a connection with an external sensor module, in accordance with some embodiments. In one instance, the apparatus may include a processor and a sensor hub coupled with the processor, wherein the sensor hub may include a bus to provide a connection between the apparatus and the external sensor module. The apparatus may further include signal pattern generation circuitry coupled with the sensor hub to generate a signal pattern in response to a connection of the external sensor module to the apparatus via the bus or disconnect of the external sensor module from the bus, to indicate an insert or remove event to the apparatus, and facilitate the connection of the apparatus with the external sensor module. Other embodiments may be described and/or claimed.Type: GrantFiled: December 30, 2016Date of Patent: October 22, 2019Assignee: Intel CorporationInventors: Qiuhua Hu, Jie Chen, Hua He, Ke Han, Arvind Kumar
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Patent number: 10437751Abstract: A device hot-plug system includes a chassis. A connector is included in the chassis. A reset pin is included on the connector. A hot-plug device is configured, in response to being hot-plugged to the connector, to enter a device reset state. While in the device reset state, the hot-plug device monitors a reference clock and determines that the reference clock has been stable for a predetermined time period. In response to determining that the reference clock has been stable for a predetermined time period, the hot-plug device exits the device reset state and provides a de-assertion signal on the reset pin.Type: GrantFiled: April 13, 2018Date of Patent: October 8, 2019Assignee: Dell Products L.P.Inventors: Hahn Norden, Christopher Arzola, Austin Bolen
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Patent number: 10423547Abstract: Systems, methods, apparatuses, and software for data storage systems are provided herein. In one example, a data storage platform includes data storage assemblies each comprising one or more storage drives that service data storage operations over associated storage interfaces. A control processor is coupled to ones of the data storage assemblies over at least two types of sideband communication interfaces different than the storage interfaces of the storage drives. During an initialization process for the one or more storage drives, the control processor configured to transfer initialization data to each of the data storage assemblies over a first type of sideband communication interface and transfer further initialization data to at least one of the data storage assemblies over a second type of sideband communication interface when the at least one of the data storage assemblies does not respond to the initialization data over the first type of sideband communication interface.Type: GrantFiled: July 9, 2018Date of Patent: September 24, 2019Assignee: Liqid Inc.Inventors: Christopher R. Long, Jason Breakstone
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Patent number: 10423560Abstract: A hot plug method, a host controller, a host, and a PCIe bridge device. The method includes: generating, by a host controller, a first notification packet, where the first notification packet includes hot plug interruption information, and the hot plug interruption information indicates that a first PCIe device is to be hot-plugged; sending, by the host controller, the first notification packet to a host, so that the host performs, according to the first notification packet, a hot plug operation corresponding to the PCIe device; and receiving, by the host controller, a second notification packet sent by the host, and sending the second notification packet to a user equipment controller, to facilitate the user equipment controller to instruct a user to insert or remove the PCIe device, where the second notification packet is for indicating that the hot plug operation corresponding to the PCIe device is completed.Type: GrantFiled: January 2, 2018Date of Patent: September 24, 2019Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Benhua Peng, Fu Wang, Pei Wu, Huaifeng Xiao, Xiaoping Zhu
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Patent number: 10353609Abstract: A memory allocation method and apparatus is disclosed. The method includes: obtaining unoccupied mirrored memory in an initial mirrored memory, where the initial mirrored memory is indicated by a mirrored memory address range that is provided by an BIOS of a computer system to the an OS of the computer system during initialization of the OS (101); performing detection on data requiring memory allocation (102); and when detecting that the data is data to be stored in mirrored memory, allocating, from the unoccupied mirrored memory, the mirrored memory to the data to be stored in the mirrored memory (103). The memory allocation method can accurately find the mirrored memory, and allocating the mirrored memory to the data that needs to be stored in the mirrored memory. Therefore, this method ensures usage efficiency of the limited mirrored memory.Type: GrantFiled: March 15, 2017Date of Patent: July 16, 2019Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Xiuqi Xie, Xishi Qiu
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Patent number: RE49124Abstract: A portable and mobile deployable data center (DDC) is disclosed, which includes various components that enables the DDC to have multiple functions including, computing, data storage and retrieval, communications and routing. A DDC includes a rugged case that suitable for harsh environments, an interconnection mechanism, a plurality of hot swappable readers, a plurality of hot swappable portable computing devices, and a plurality of hot swappable power supplies.Type: GrantFiled: April 27, 2018Date of Patent: July 5, 2022Assignee: Arnouse Digital Devices Corp.Inventor: Michael Arnouse