Bus Expansion Or Extension Patents (Class 710/300)
  • Patent number: 10764212
    Abstract: A modular switching network node for a communications network, i.e., an industrial communications network, where the modular switching network node comprises a switching network node base unit and at least one port module, the at least one port module comprises at least one connection interface for coupling to the communications network, and where the modular switching network node is configured to forward communication data over one of the connection interfaces of the modular switching network node to at least one additional connection interface of the modular switching network node. The switching network node base unit is configured such that at least one of the port modules is swappable for a functional module to expand the functionality of the switching network node.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: September 1, 2020
    Assignee: Siemens Aktiengesellschaft
    Inventors: Heiko Hack, Timo Kistner, Urs Schweizer, Andreas Schäffler, Michael Wagner
  • Patent number: 10747267
    Abstract: In some examples, an electronic device is to receive a configuration setting that is configurable to a first setting to indicate a first mode of operation, and a second setting to indicate a second mode of operation, wherein a feature supported by the first mode of operation is disabled in the second mode of operation; and configure a dock to which the electronic device is connected to operate according to a mode indicated by the configuration setting.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: August 18, 2020
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffrey Kevin Jeansonne, Rahul V. Lakdawala, Roger D. Benson
  • Patent number: 10664029
    Abstract: A power supply apparatus supports USB-PD (Universal Serial Bus-Power Delivery) specification. A bus voltage VBUS is transmitted via a bus line. A first power supply circuit generates a first bus voltage having a first voltage level. A second power supply circuit generates a second bus voltage having a second voltage level that is higher than the first voltage level. A first switch is arranged between the bus line and an output terminal of the first power supply circuit. A second switch is arranged between the bus line and an output terminal of the second power supply circuit. A control circuit receives a control signal S1 via the bus line from a power receiving apparatus, which is a power supply target. The control circuit is structured to control the first switch and the second switch based on the control signal S1.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: May 26, 2020
    Assignee: ROHM CO., LTD.
    Inventor: Fuminori Koga
  • Patent number: 10635590
    Abstract: Apparatus, method, and system for implementing a software-transparent hardware predictor for core-to-core data communication optimization are described herein. An embodiment of the apparatus includes a plurality of hardware processor cores each including a private cache; a shared cache that is communicatively coupled to and shared by the plurality of hardware processor cores; and a predictor circuit. The predictor circuit is to track activities relating to a plurality of monitored cache lines in the private cache of a producer hardware processor core (producer core) and to enable a cache line push operation upon determining a target hardware processor core (target core) based on the tracked activities. An execution of the cache line push operation is to cause a plurality of unmonitored cache lines in the private cache of the producer core to be moved to the private cache of the target core.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: April 28, 2020
    Assignee: Intel Corporation
    Inventors: Ren Wang, Joseph Nuzman, Samantika S. Sury, Andrew J. Herdrich, Namakkal N. Venkatesan, Anil Vasudevan, Tsung-Yuan C. Tai, Niall D. McDonnell
  • Patent number: 10565264
    Abstract: The present invention is a method, system and apparatus for dynamically binding principal services to activities in a business process in a cross-enterprise business process management system. In a preferred aspect of the invention, the system can include a business process specification document processing engine configured to process business process specification documents in which each of the documents defines a business process. A deployment service can be coupled to the engine and programmed to generate and deploy partner link instances for corresponding partner links specified in the documents. Finally, a link base authority can be configured to notify each partner link instance when an endpoint reference to a principal service has changed. Notably, the business process specification documents can include BPEL documents. As such, the business process specification document processing engine can include a BPEL4WS run-time engine.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: February 18, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Derek W. Carr, Peter P. Eacmen, Ronny A. Pena, Ajamu A. Wesley
  • Patent number: 10535322
    Abstract: Example implementations relate to a system for enabling compression of a video output. For example, the system can include a circuit board including a plurality of slots, each slot to receive a module, a multiplexor coupled between the plurality of slots, and a management controller, among other components. The management controller can detect a respective type of module coupled to each of the plurality of slots and instruct the multiplexor to transmit signals between a first slot among the plurality of slots and a second slot among the plurality of slots in response to detection of a graphics coprocessor module coupled to the first slot and an accelerator module coupled to the second slot. Similarly, the management controller can compress a video output from the first slot using the second slot.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: January 14, 2020
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Chanh V Hua, Mujeeb Ur Rehman, Yuchen Xu
  • Patent number: 10503228
    Abstract: A passive cable adaptor for connecting a data source device with a display device is described. The adaptor has a packet-based interface connector at one end, the connector having a positive main link pin, a negative main link pin, a positive auxiliary channel pin, and a negative auxiliary channel pin. At the other end is a micro serial interface connector, wherein multimedia content is transmitted over the cable adaptor and electrical power is supplied over the cable adaptor simultaneously. The cable adaptor has an auxiliary and hot plug detect (HPD) controller utilized to map the auxiliary channel and HPD signals of the packet-based digital display to the micro serial interface ID signal.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: December 10, 2019
    Assignee: STMICROELECTRONICS, INC.
    Inventor: Alan Osamu Kobayashi
  • Patent number: 10482017
    Abstract: Processor, method, and system for tracking partition-specific statistics across cache partitions that apply different cache management policies is described herein. One embodiment of a processor includes: a cache; a cache controller circuitry to partition the cache into a plurality of cache partitions based on one or more control addresses; a cache policy assignment circuitry to apply different cache policies to different subsets of the plurality of cache partitions; and a cache performance monitoring circuitry to track cache events separately for each of the cache partitions and to provide partition-specific statistics to allow comparison between the plurality of cache partitions as a result of applying the different cache policies in a same time period.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: November 19, 2019
    Assignee: Intel Corporation
    Inventors: Karl I. Taht, Christopher B. Wilkerson, Ren Wang, James J. Greensky
  • Patent number: 10467173
    Abstract: Some examples can enable virtual bridges to be hot plugged into a virtual Peripheral Component Interconnect (vPCI) system. For example, a number of subordinate buses that are connected to a vPCI bridge in the vPCI system can be determined. The vPCI system can be for a virtual machine. A parameter value can then be generated by adding an integer to the number of subordinate buses that are connected to the vPCI bridge. The integer can be a predefined number of additional subordinate buses to enable to be connected to the vPCI bridge. The parameter value can then be assigned to the vPCI bridge. This may enable additional virtual bridges to be hot plugged into the vPCI system at a later time. For example, a new virtual bridge can be added to the vPCI system using the parameter value for the vPCI bridge.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: November 5, 2019
    Assignee: Red Hat Israel, Ltd.
    Inventors: Gal Hammer, Marcel Apfelbaum
  • Patent number: 10467178
    Abstract: Embodiments of a peripheral component are described herein. Embodiments provide alternatives to the use of an external bridge integrated circuit (IC) architecture. For example, an embodiment multiplexes a peripheral bus such that multiple processors in one peripheral component can use one peripheral interface slot without requiring an external bridge IC. Embodiments are usable with known bus protocols.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: November 5, 2019
    Assignees: ADVANCED MICRO DEVICES, INC., ATI TECHNOLOGIES ULC.
    Inventors: Shahin Solki, Stephen Morein, Mark S. Grossman
  • Patent number: 10460772
    Abstract: According to one embodiment, there is provided a semiconductor device comprising: a control circuit connected to a bus; a first circuit operating under control of the control circuit; a bus access detection circuit that detects bus access from the control circuit to the first circuit without going through the bus; a switch element connected between the first circuit and a power supply; and a second circuit connected between the first circuit and the bus, the second circuit controlling, when the bus access to the first circuit is detected by the bus access detection circuit, the switch element such that power from the power supply is supplied to the first circuit.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: October 29, 2019
    Assignees: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage Corporation
    Inventors: Takayuki Mori, Tatsuya Tokue, Haruya Iwata, Sohei Kushida, Satoshi Kamiya
  • Patent number: 10452593
    Abstract: A data processing network and method of operation thereof are provided for efficient transfer of ordered data from a Request Node to a target node. The Request Node send write requests to a Home Node and the Home Node responds to a first write request when resources have been allocated the Home Node. The Request Node then sends the data to the written. The Home Node also responds with a completion message when a coherency action has been performed at the Home Node. The Request Node acknowledges receipt of the completion message with a completion acknowledgement message that is not sent until completion messages have been received for all write requests older than the first write request for the ordered data, thereby maintaining data order. Following receipt of the completion acknowledgement for the first write request, the Home Node sends the data to be written to the target node.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: October 22, 2019
    Assignee: Arm Limited
    Inventors: Jamshed Jalal, Tushar P. Ringe, Ashok Kumar Tummala, Gurunath Ramagiri
  • Patent number: 10402105
    Abstract: Systems and methods for replicating data from a first site to a second site remote from said first site are described. An embodiment includes storing compressed data on a hard disk appliance, reading said data without decompressing said data, sending said data over a wide-area-network (WAN) in a compressed state, and storing said data on a second hard disk appliance remote from said first hard disk appliance in its compressed state without performing an additional compression operation.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: September 3, 2019
    Assignee: Overland Storage, Inc.
    Inventors: Dennis Desimone, Michael H. Reider, Kenneth Geist, Victoria Gonzalez
  • Patent number: 10366023
    Abstract: An operation method performed at a nonvolatile memory device may include receiving a program command and an address from an external device through a data signal (DQ), receiving a specific pattern from the external device through the data signal and a data strobe signal (DQS) synchronized with the data signal in a pattern period, receiving user data from the external device through the data signal and the data strobe signal in a data period, and selectively performing a program operation on the user data or a recovery operation based on a determination of whether the specific pattern matches with a particular pattern. A rising edge or a falling edge of the data strobe signal may be aligned with a left edge or a right edge of a window of the data signal in the pattern period.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: July 30, 2019
    Inventors: YoungWook Kim, Hyung-jin Kim, Soong-Man Shin, Keun-Hwan Lee
  • Patent number: 10255210
    Abstract: A master device transmits a transaction to a target device. The transaction includes a transaction identifier. An ordering message is sent to the target device over a bus that is different than a communication channel that the transaction is transmitted over. The ordering message includes the transaction identifier. The target device adjusts an order of execution of the transaction by the target device based at least in part on receiving the ordering message.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: April 9, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Nafea Bshara, Guy Nakibly, Adi Habusha
  • Patent number: 10250690
    Abstract: The present invention relates generally to a system and method of networking and interconnecting a large number of various types of sensors to a remote location in an efficient manner. Specifically, the invention utilizes a flexible, configurable, scalable and power-efficient sensor interface relay architecture to gather sensor data from various locations and then relay it to a remote location via the internet.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: April 2, 2019
    Assignee: Camgian Microsystems Corp.
    Inventors: Gary Butler, Derrick J. Savage, David Lindley, Muthukumar Nagarajan, Jeffery Hunt
  • Patent number: 10234894
    Abstract: A signal generation circuit for producing an identification signal at a defined frequency. A frequency calibration circuit is electrically coupled to the signal generation circuit and is configured to set the defined frequency. The frequency calibration circuit includes a first calibration portion positioned on a first electrical subsystem and a second calibration portion positioned on a second electrical subsystem. An identification circuit is configured to process the identification signal to generate an identification result.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: March 19, 2019
    Assignee: EMC IP Holding Company LLC
    Inventor: Daniel Dufresne
  • Patent number: 10225290
    Abstract: Systems and methods are disclosed for extending digital signal processor (DSP) capability of existing media gateway devices. A system includes a media gateway device, which has a first plurality of voice server cards. Each voice server card comprises a first controller, a first communications interface, and at least one first DSP configured to implement at least one first coder/decoder (codec). The system further includes a communications switch and at least one external DSP server. The external DSP server comprises a second plurality of voice server cards, which each comprise a second controller, a second communications interface, and at least one second DSP configured to implement at least one second codec. The at least one external DSP server is in communication with the media gateway device via the communications switch.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: March 5, 2019
    Assignee: GENBAND US LLC
    Inventors: Weisheng Chen, Hao Hou, David Z. Lu
  • Patent number: 10198391
    Abstract: An active input/output connector includes a first printed circuit board and a second printed circuit board enclosed within a housing. A first plug is in electronic communication with the first printed circuit board. A second plug is in electronic communication with the second printed circuit board. The first and second printed circuit boards are connected for communication of sensor signals from the first plug to the second plug.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: February 5, 2019
    Assignee: Hamilton Sunstrand Corporation
    Inventors: Jason C. Duffy, Kenneth J. Trotman
  • Patent number: 10135263
    Abstract: A method is provided comprising: detecting a connection between an electronic device and a battery charger; transmitting to the battery charger a first request for at least one of a first voltage level and a first current level; receiving from the battery charger a signal; and charging a battery of the electronic device with the signal.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: November 20, 2018
    Assignees: Samsung Electronics Co., Ltd, Fairchild Korea Semiconductor Ltd.
    Inventors: Ku-Chul Jung, Erik Wilson Maier, Oscar Freitas, Kisun Lee, Chul-Eun Yun, Kwang-Sub Lee
  • Patent number: 10055298
    Abstract: A method, article of manufacture, and apparatus for accessing data during data recovery. In some embodiments, this includes sending an I/O request from an application to an object, wherein the object is being recovered, establishing an I/O intercept, intercepting the application's I/O request with the I/O intercept, and redirecting the I/O request based on the status of the object's sub-objects.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: August 21, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Michael John Dutch, Christopher Hercules Claudatos, Mandavilli Navneeth Rao
  • Patent number: 10021217
    Abstract: Universal serial bus (USB) mass storage devices may be redirected to a server to create USB virtual mass storage devices. For characteristics of the redirected device to be propagated to other users (accessing the redirected device via the virtual device) it is necessary to alter the Mode Sense data. In one embodiment, certain users may be given only read-only access to the redirected device. In another embodiment only some of the redirected devices are write-protected. By saving characteristics of a redirected device in the server registry or active directory, the USB virtual bus driver may impose, for example, write-protection on one or more devices connected by one or more users.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: July 10, 2018
    Assignee: Dell Products L.P.
    Inventor: Gokul Thiruchengode Vajravel
  • Patent number: 9991657
    Abstract: Connector adapters that may have a MagSafe connector receptacle and a Universal Serial Bus Type-C connector insert. This may allow MagSafe chargers to be used to charge devices having Universal Serial Bus Type-C connector receptacles. This also may provide the breakaway characteristic of a MagSafe connector system for a device that does not include a MagSafe connector receptacle. Other adapters may have other types of magnetic connector receptacles and connector inserts.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: June 5, 2018
    Assignee: APPLE INC.
    Inventors: Ronald G. Powers, Kevin M. Keeler
  • Patent number: 9965370
    Abstract: A port of a first device includes remote device detection logic to detect, on a link, a remote second device, determine, from a voltage generated at the port, whether the second device is direct current (DC)-coupled or alternating current (AC)-coupled to the link, and select one of first settings or second settings to be applied at the port in communications over the link with the second device based on whether the second device is DC-coupled or AC-coupled.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: May 8, 2018
    Assignee: Intel Corporation
    Inventors: Venkatraman Iyer, Zuoguo Wu, Jeffrey Ou, Sitaraman Iyer
  • Patent number: 9952791
    Abstract: A memory card includes a first signal terminal configured to output a first signal; a second signal terminal configured to output a second signal, the first and second signals being complementary to each other; and a controller configured to drive the first and second signal terminals to have a negative state until a link connection is performed after power is supplied to the memory card. When a level of the first signal is greater than a level of the second signal, the first and second signal terminals are in a positive state, whereas when a level of the first signal is smaller than a level of the second signal, the first and second signal terminals are in the negative state.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: April 24, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soonbok Jang, Sungho Seo, Sang-Hoon Lee
  • Patent number: 9949047
    Abstract: An electronic device is provided including a housing, an opening formed on a side of the housing, a hole connected to the opening, a receptacle disposed inside the hole, having a structure for receiving an external connector, and comprising a plurality of pins, a memory, a processor electrically coupled to the memory, and a circuit electrically coupled to the processor and the receptacle. When the external connector is inserted into the receptacle, the circuit may receive at least one of a signal and a current through at least one of the pins, and selects one of a plurality of audio signal processing methods provided to the external connector through the receptacle based on at least one of the received signal and the current.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: April 17, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Heejun Ryu
  • Patent number: 9910420
    Abstract: An expansion module for a PLC, used in such a manner that at least one expansion module is sequentially connected to a basic unit in order to exchange massive data at high speed by using USB communication, is provided. Each of the expansion module includes a USB hub and a USB device, and is allocated with an exchange number from a USB host of the basic unit by activating the USB device according to input of a trigger signal. In addition, whether the USB hub is to be used is determined by deciding whether the expansion through the USB hub is required according to the allocated exchange number. Thus, a user needs only to arrange each of the expansion modules by a designation.
    Type: Grant
    Filed: May 1, 2015
    Date of Patent: March 6, 2018
    Assignee: LSIS CO., LTD.
    Inventor: Hyun Woo Jang
  • Patent number: 9870333
    Abstract: A peripheral component interconnect express (PCIe) eXtensions for instrumentation (PXIe) chassis includes a backplane, multiple peripheral slots, a mezzanine card and an integrated accelerator module. The peripheral slots are located on the backplane and configured to receive insertable PXIe peripheral modules, respectively. The mezzanine card is on the backplane and configured to accommodate at least one of connectors, integrated circuits (ICs) and signal lines incorporated in the PXIe chassis. The integrated accelerator module is on the mezzanine card within the PXIe chassis and configured to accelerate processing of signals received from the PXIe peripheral modules.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: January 16, 2018
    Assignee: Keysight Technologies, Inc.
    Inventors: Kuen Yew Lam, Jared Richard, Chris R. Jacobsen, James Benson
  • Patent number: 9858236
    Abstract: It is inter alia disclosed to determine a type of a second apparatus being connected to a data interface of the first apparatus based on a state of an identification pin of the data interface, the data interface further comprising at least one data pin, wherein the type of the second apparatus relates to a communication via the at least one data pin, to check whether the second apparatus is configured to perform a further communication via the identification pin, and if said checking yields a positive result, to enable the further communication via the identification pin.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: January 2, 2018
    Assignee: Nokia Technologies Oy
    Inventors: Timo Juhani Toivanen, Jarmo Ilkka Saari, Timo Tapani Toivola
  • Patent number: 9837136
    Abstract: A memory module, including a plurality of memory cells and a plurality of signal lines for communicating with a processing device. The memory module is configured such that following reception of a command and upon encountering a first condition while processing the command, the memory module limits a voltage on a first signal line of the plurality of signal lines to be no more than an intermediate voltage greater than voltage levels corresponding to a binary zero state and less than voltage levels corresponding to a binary one state for a period of time for indicating an occurrence of the first condition.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: December 5, 2017
    Assignee: Lexmark International, Inc.
    Inventor: James Ronald Booth
  • Patent number: 9804883
    Abstract: Described herein is an apparatus and method for remote scoped synchronization, which is a new semantic that allows a work-item to order memory accesses with a scope instance outside of its scope hierarchy. More precisely, remote synchronization expands visibility at a particular scope to all scope-instances encompassed by that scope. Remote scoped synchronization operation allows smaller scopes to be used more frequently and defers added cost to only when larger scoped synchronization is required. This enables programmers to optimize the scope that memory operations are performed at for important communication patterns like work stealing. Executing memory operations at the optimum scope reduces both execution time and energy. In particular, remote synchronization allows a work-item to communicate with a scope that it otherwise would not be able to access. Specifically, work-items can pull valid data from and push updates to scopes that do not (hierarchically) contain them.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: October 31, 2017
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Marc S. Orr, Bradford M. Beckmann, Ayse Yilmazer, Shuai Che, David A. Wood, Mark D. Hill
  • Patent number: 9792249
    Abstract: A system and method for provisioning of modular compute resources within a system design are provided. In one embodiment, a node card or a system board may be used.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: October 17, 2017
    Assignee: III HOLDINGS 2, LLC
    Inventors: David Borland, Arnold Thomas Schnell, Mark Davis
  • Patent number: 9769062
    Abstract: Methods, apparatus and computer program products implement embodiments of the present invention that include identifying, by a first computer, multiple network paths to a second computer, and splitting an input/output (I/O) request for a logical volume stored on the second computer into sub-requests. A probe request defining an association between the I/O request and the sub-requests is conveyed to the second computer, and each of the sub-requests is assigned to a respective one of the multiple network paths. Each of the sub-requests are conveyed to the second computer via the assigned respective one of the multiple network paths, and the sub-requests are received by the second computer via the multiple network paths. The second computer performs the sub-requests in response to the association, and a result of each of the sub-requests is conveyed to the first computer via the assigned respective one of the multiple network paths.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: September 19, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Oren Li-On, Orit Nissan-Messing, Eyal Perek
  • Patent number: 9755304
    Abstract: A grounding structure is described in an embodiment of the present disclosure, which is applied to a rotary wireless access terminal, the wireless access terminal at least includes that: a structural part, as well as a main board and metal rotating shaft, which are arranged in the structural part, of the wireless access terminal, the metal rotating shaft is connected with an external interface of the wireless access terminal, wherein the grounding structure includes a metal dome and an insulating film; and one end of the metal dome is connected with the metal rotating shaft, while the other end is coupled to ground on the main board through the insulating film. A rotary wireless network card based on the above grounding structure is also described in an embodiment of the present disclosure.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: September 5, 2017
    Assignee: ZTE Corporation
    Inventors: Yang Liu, Chaofan Shu
  • Patent number: 9749319
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating signed addresses. One of the methods includes receiving, by a component from a device, a plurality of first requests, each first request for a physical address and including a virtual address, determining, by the component, a first physical address using the virtual address, generating a first signature for the first physical address, and providing, to the device, a response that includes the first signature, receiving, from the device, a plurality of second requests, each second request for access to a second physical address and including a second signature, determining, by the component for each of the plurality of second requests, whether the second physical address is valid using the second signature, and for each second request for which the second physical address is determined to be valid, servicing the corresponding second request.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: August 29, 2017
    Assignee: Google Inc.
    Inventor: Benjamin C. Serebrin
  • Patent number: 9727109
    Abstract: Embodiments of the present disclosure provide systems and/or methods for managing power distribution over a USB topology. In some embodiments, a host device is coupled to an upstream facing port device (UFP device) via a USB compliant connection, and a USB device is coupled to a downstream facing port device (DFP device) via a USB compliant connection. The UFP device and DFP device are connected via a non-USB compliant extension medium. In various embodiments, the UFP device and DFP device may be individually powered by different types of sources (such as external power sources, power distributed over the extension medium, batteries, USB bus power, and/or the like). The UFP device and DFP device cooperate to provide USB power distribution functionality throughout the USB topology despite the presence of the non-USB compliant extension medium.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: August 8, 2017
    Assignee: Icron Technologies Corporation
    Inventors: Sukhdeep Singh Hundal, Thomas Aaron Schultz, Ardeshir Saghafi
  • Patent number: 9727507
    Abstract: The USB device remote control method in a remote control system including a first device connected with a terminal through USB and a second device connected with the first device via a network includes installing, at the first device, a USB driver of the terminal, providing, at the first device, a remote terminal control module to the terminal using the USB driver, transmitting, at the second device, a control command for controlling the terminal to the first device and providing, at the first device, the control command to the terminal using the USB driver, executing, at the remote terminal control module, a command corresponding to the received control command and capturing and providing a display image showing the execution result to the first device through the USB driver, transmitting, at the first device, the display image to the second device.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: August 8, 2017
    Assignee: RSUPPORT Co., Ltd.
    Inventor: Hyung Su Seo
  • Patent number: 9699100
    Abstract: Systems and methods for mapping an iterative time-based data acquisition (DAQ) operation to an isochronous data transfer channel of a network. A time-sensitive buffer (TSB) associated with the isochronous data transfer channel of the network may be configured. A data rate clock may and a local buffer may be configured. A functional unit may be configured to initiate continuous performance of the iterative time-based DAQ operation, transfer data to the local buffer, initiate transfer of the data between the local buffer and the TSB at a configured start time, and repeat the transferring and initiating transfer in an iterative manner, thereby transferring data between the local buffer and the TSB. The TSB may be configured to communicate data over the isochronous data transfer channel of the network, thereby mapping the iterative time-based DAQ operation to the isochronous data transfer channel of the network.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: July 4, 2017
    Assignee: NATIONAL INSTRUMENTS CORPORATION
    Inventors: Sundeep Chandhoke, Brian Keith Odom
  • Patent number: 9697157
    Abstract: Aspects of transmit and receive connectivity devices are described. In one embodiment, a transmit connectivity device includes a first high definition multimedia interface (HDMI) port, signal processing circuitry configured to receive a media signal and to convert the media signal to a converged media signal, a multi-position multi-contact port, and a second HDMI port. The multi-position multi-contact port may include a first plurality of contacts coupled to the signal processing circuitry to transmit the converged media signal to at least one sink device, and a subset of a second plurality of contacts of the HDMI port may be coupled to the first plurality of contacts. Using the connectivity devices described herein, HDMI cables may be relied upon to communicate combinations of media signals, including full uncompressed high definition video, audio, 100BaseT Ethernet, and various control signals.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: July 4, 2017
    Assignee: Vanco International, LLC
    Inventor: Joseph Allen Whitaker
  • Patent number: 9630099
    Abstract: A game device according to the present embodiment includes a camera as image pick-up means. An inner camera is accommodated in an upper housing. In addition, a microphone hole is provided in an inner surface of the upper housing so as to sense external sound through a microphone.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: April 25, 2017
    Assignee: NINTENDO CO., LTD.
    Inventors: Masato Kuwahara, Kazunori Koshiishi, Yui Ehara, Ryo Fukasawa
  • Patent number: 9588918
    Abstract: A storage control device comprises storage control and memory modules coupled with each other. The memory module keeps a first Serial Attached SCSI (SAS) address. In one embodiment the memory module further keeps a firmware which the storage control module executes to invoke the first SAS address to facilitate data communication. To invoke the first SAS address, in one embodiment the storage control module fetches a bit string from the memory module. The bit string is written into a data structure that is returned to the storage control module when it is determined that the bit string is a SAS address. In one embodiment the memory module further keeps a configuration file which the storage control module invokes to operate. The configuration file comprises a second SAS address, which is not invoked by the storage control module unless the bit string is not a SAS address.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: March 7, 2017
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventor: Wei-Guo Zhao
  • Patent number: 9575767
    Abstract: An electronic system includes a central processing unit (CPU) expansion apparatus and a portable electronic apparatus. The CPU expansion apparatus has a first CPU connector and a first CPU. The portable electronic apparatus has a second CPU connector and a second CPU. When the first CPU connector is connected to the second CPU connector, a data transmission is implemented between the first CPU and the second CPU. A CPU expansion apparatus, portable electronic apparatus and processing method are also disclosed. With the electronic system, CPU expansion apparatus, portable electronic apparatus and processing method according to the invention, the portable electronic apparatus can be connected to an additional CPU externally and is thereby improved in efficiency of processing and computing.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: February 21, 2017
    Assignee: National Cheng Kung University
    Inventor: Sen-Yung Lee
  • Patent number: 9552267
    Abstract: Apparatuses, methods and storage medium associated with automatic SATA receiver equalization margin determination and setting, are disclosed. In embodiments, an apparatus may comprise a BIOS configured to determine, during POST, whether a device is attached to one of the SATA ports, and on determination that a device is attached to one of the SATA ports, further determine whether a receiver equalization margin has been set for the device. Additionally, the BIOS may be configured to perform a DTLE training to dynamically determine and set the receiver equalization margin for the device, on determination that a receiver equalization margin has not been set for the device. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: January 24, 2017
    Assignee: Intel Corporation
    Inventors: Chee Keong Sim, Kai Chong Ng, Tze Ming Hau
  • Patent number: 9541976
    Abstract: In accordance with embodiments of the present disclosure, a method may include powering on a management controller for providing out-of-band management to an information handling system using electrical energy provided by an external device via an external port, receiving a management task from the external device via the external port for coupling an external device to the management controller for communication of data between the external device and the management controller, calculating an additional amount of power required to perform the management task, instructing a controller coupled between the management controller and the external port to negotiate for the additional amount of power from the external device, and responsive to the controller successfully negotiating for the additional amount of power, performing the management task.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: January 10, 2017
    Assignee: Dell Products L.P.
    Inventors: Timothy M. Lambert, Dinesh Kunnathur Ragupathi
  • Patent number: 9489136
    Abstract: Some embodiments includes an interrupt-driven data transport architecture utilizing a memory channel bus. For example, a first logic component at a first computing device can initiate a data access request involving a second logic component at a second computing device. The first logic component can store request information associated with the data access request in a predefined memory space of a memory module connected via a memory channel bus to the first logic component and the second logic component. The first logic component can then generate a request-ready interrupt signal through one or more redundant pins of the memory channel bus. The second logic component can be triggered by the interrupt signal to read the request information from the predefined memory space. The second logic component can use that information to complete the request.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: November 8, 2016
    Assignee: Facebook, Inc.
    Inventors: Narsing Vijayrao, Jason Taylor
  • Patent number: 9433095
    Abstract: A method and apparatus are provided for implementing simultaneously connecting of multiple devices in a multi-tiered, multi-directional, enhanced tolerance system with mechanical support structures. A main system planar assembly and an elevated planar assembly share a direct connection provided by a plurality of connectors with no cables. A mechanical support bracket is attached to a top surface of the main system planar assembly positioning and supporting the elevated planar assembly spaced appropriately for accurately connecting respective connectors with respective chassis connectors. The elevated planar assembly includes a stiffening component to facilitate proper spacing between upper and lower levels of respective connectors and tool-less insertion and extraction of the elevated planar assembly.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: August 30, 2016
    Assignee: International Business Machines Corporation
    Inventors: Aaron M. Hegrenes, Nathan D. Karl, Robert J. Monahan, Stephen P. Mroz, Christopher L. Tuma
  • Patent number: 9430431
    Abstract: Embodiments of the present invention relate to electronic devices and data transmission methods. The electronic device includes: a first part including a first main board, a first processor connected to the first main board, at least one sharable hardware component and a first connector; and a second part including a second main board, a second processor connected to the second main board and a second connector corresponding to the first connector. The first part and the second part are connectable to each other via the first connector and the second connector. The first connector is configured to receive, from a first driving module of the hardware component, a first data sent from the hardware component via a first connector driving module, and transmit the first data to the second connector such that a second connector driving module can provide the first data from the second connector to a first application running in the second part via a second driving module of the hardware component.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: August 30, 2016
    Assignees: LENOVO (BEIJING) LIMITED, Beijing Lenovo Software Ltd.
    Inventor: Haibin Ke
  • Patent number: 9304876
    Abstract: Methods and structure for migrating logical volumes are provided. The system includes a Redundant Array of Independent Disks controller, which includes a Peripheral Component Interconnect Express interface, a Serial Attached Small Computer System Interface port operable to communicate with another Redundant Array of Independent Disks controller, and a command unit. The command unit is able to direct the interface to access another Peripheral Component Interconnect Express interface at the other controller, to synchronize with Disk Data Format information from a Peripheral Component Interconnect Express Inbound Map of the other interface, to detect that the other controller has failed, and to utilize the Disk Data Format information to migrate a logical volume from the other controller to the controller.
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: April 5, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Naresh Madhusudana, Naveen Krishnamurthy, Sridhar Rao Veerla
  • Patent number: 9268501
    Abstract: A high performance computer data storage array stores data across a plurality of disk drives. The disk drives may be solid-state drives (SSDs). The storage array may utilize the Serial Attached Small Computer Systems Interface (SAS) protocol, meaning that the disk drives may have high data throughput capabilities. Circuitry within the storage array may leverage the individual capabilities of the high-performance SAS SSDs to increase the overall performance of the storage array. The storage array can function as a network-attached system and/or as a component of a storage area network.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: February 23, 2016
    Assignee: Nimbus Data Systems, Inc.
    Inventor: Thomas Z. Isakovich
  • Patent number: 9263000
    Abstract: A graphics system includes an integrated graphics processor and a discrete graphics processing unit. An intra-system bus coupled data from the discrete graphics processing unit to the integrated graphics processor. In a high performance mode the discrete graphics processing unit is used to render frames. Compression techniques are used to aid in the data transfer over an intra-system bus interface.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: February 16, 2016
    Assignee: NVIDIA Corporation
    Inventor: Emmett M. Kilgariff