Abstract: A Network Interface (NI) includes a host interface, which is configured to receive from a host processor of a node one or more cross-channel work requests that are derived from an operation to be executed by the node. The NI includes a plurality of work queues for carrying out transport channels to one or more peer nodes over a network. The NI further includes control circuitry, which is configured to accept the cross-channel work requests via the host interface, and to execute the cross-channel work requests using the work queues by controlling an advance of at least a given work queue according to an advancing condition, which depends on a completion status of one or more other work queues, so as to carry out the operation.

Abstract: A computer system includes a processor configured for detecting initial command response times of a plurality of paths for transmitting signals from the processor to one or more external devices via a plurality of channels, assigning weighted values to the plurality of paths based on the detected initial command response times, and modifying a frequency at which respective paths among the plurality of paths are selected for transmitting the signals based on the weighted values assigned to the respective paths.

Abstract: A hybrid drive includes multiple parts: a performance part (e.g., a flash memory device) and a base part (e.g., a magnetic or other rotational disk drive). A drive access system, which is typically part of an operating system of a computing device, issues input/output (I/O) commands to the hybrid drive to store data to and retrieve data from the hybrid drive. The drive access system assigns, based on various available information, a priority level to groups of data identified by logical block addresses (LBAs). With each I/O command, the drive access system includes an indication of the priority level of the LBA(s) associated with the I/O command. The hybrid drive determines, based on the priority level indications received from the drive access system, which LBAs are stored on which part or parts of the hybrid drive.

Abstract: An information processing apparatus that can communicate with an external apparatus includes an instruction unit configured to receive an instruction to change a parameter in the external apparatus, and a sending unit configured to send a control signal for causing the external apparatus to change the parameter in the external apparatus, to the external apparatus according to the instruction received by the instruction unit, in which the sending unit sends, when the instruction received by the instruction unit includes an instruction to change a plurality of types of parameters in the external apparatus, the control signal a plural number of times according to the types of the parameters to be changed, to cause the external apparatus to change the parameters in a predetermined order.

Abstract: A process to manage data between one or more MDIO manageable devices situated on the same bus utilizing the MDIO protocol. The data management efficiency can be increased through the use of an MDIO protocol that includes a page-write mode. The MDIO protocol including the page-write mode can reduce the overhead for a write operation by omitting various portions of the MDIO communication frame format, including the preamble, start-of-frame, operational code, port address, device address, and turn-around fields that generally precede data to be written. The MDIO protocol including the page-write mode may include a next-data code to initiate the page-write mode.

Abstract: A host apparatus, into which a card having a nonvolatile semiconductor memory is inserted, issues a check command to the card. The check command instructs to send information on whether the card supports a termination process in which the card shifts into a state ready for a stop of power supply from the host apparatus.

Abstract: A method of dispatching and transmitting data stream, which is used for a memory storage apparatus having a non-volatile memory module and a smart card chip, is provided. The method includes configuring a plurality of logical block addresses, and a plurality of specific logical block addresses are used for storing a specific file. The method also includes receiving a response data unit from the smart card chip and storing the response data unit in a buffer memory. The method also includes, when a logical block address corresponding to a read command from a host system belongs to one of the specific logical block addresses and the buffer memory stores a response data unit, transmitting the response data unit stored in the buffer memory to the host system. Accordingly, the method can make the host system to correctly receive the response data unit from the smart card chip.

Abstract: According to an exemplary embodiment of this disclosure, a computer-implemented method may include selecting a first machine to be sized. A first throughput value and a first capacity value may be obtained for the first machine. A base machine may be selected. A base throughput value and a base capacity value may be obtained for the base machine. The first throughput value may be normalized, with a computer processor, to the base throughput value to product a normalized throughput value. The first capacity value may be normalized to the base capacity value to produce a normalized capacity value. A workload weight may be determined for the first machine, based at least in part on comparing the first machine to the base machine. A workload metric may be calculated as a weighted average of the normalized throughput value and the normalized capacity value.

Abstract: A technique for user notification involves modifying a title associated with a process to include information about an event that calls for user notification. A method according to the technique may include running a process, processing an event, generating a string of characters that includes information associated with the event, and displaying the string of characters as a title associated with the process. A system constructed according to the technique may include a client, a title array, an event processing engine, and a title provisioning engine.

Abstract: A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

Abstract: A traffic manager includes an execution unit that is responsive to instructions related to queuing of data in memory. The instructions may be provided by a network processor that is programmed to generate such instructions, depending on the data. Examples of such instructions include (1) writing of data units (of fixed size or variable size) without linking to a queue, (2) re-sequencing of the data units relative to one another without moving the data units in memory, and (3) linking the previously-written data units to a queue. The network processor and traffic manager may be implemented in a single chip.

Abstract: A memory device includes a memory array, an output buffer, an initial latency register, and an output signal. Often times a host device that interfaces with the memory device is clocked at high rate such that data extraction rates of the memory device are not adequate to support a gapless data transfer. The output signal is operable to stall a transmission between the memory device and the host device when data extraction rates from the memory array are not adequate to support output rates of the output buffer.

Abstract: An computer program product, apparatus, and method for facilitating input/output (I/O) processing for an I/O operation at a host computer system configured for communication with a control unit. The computer program product is provided for performing a method including: obtaining a transport command word (TCW) for an I/O operation, the TCW specifying a location address and indicating whether the TCW directly or indirectly addresses a message for transmitting one or more commands to the control unit; extracting the specified location address from the TCW; obtaining the message from the specified location address based on the TCW indicating direct addressing, the message including one or more I/O commands; gathering one or more I/O commands from command locations specified by a list of addresses identified by the specified location address to form the message based on the TCW indicating indirect addressing; and forwarding the message to the control unit for execution.

Abstract: The present disclosure relates to a system and method for remotely operating one or more peripheral devices of a wireless device using a server and client architecture. In one aspect, the system may comprise a wireless device that includes a processor, a memory, a peripheral device, and a server adapted to communicate with the peripheral device; and a removable media device that includes a memory, a processor, and a client adapted to communicate with the server of the wireless device. In another aspect, the method may comprise the steps of emulating a hardware interface on a removable media device; mapping a peripheral device of a wireless device to the interface; mapping a processor of the media device to the peripheral device; wrapping and sending hardware commands from a client of the media device to a server of the wireless device; and executing the commands on the peripheral device.

Abstract: Embodiments of the inventive subject matter include receiving, from an interface module, status data for a memory module, wherein the memory module includes a plurality of status indicators. Embodiments further include determining, based on the status data, a set of the plurality of status indicators to illuminate. Embodiments further includes generating, in accordance with said determining the set of the plurality of status indicators based on the status data, a plurality of commands for controlling illumination of the set of the plurality of status indicators. Embodiments further include transmitting the plurality of commands to circuitry of the memory module that controls the plurality of status indicators.

Abstract: Aspects of a clock domain crossing serial interface, direct latching over the serial interface, and response codes are described. In various embodiments, a data communication command received over a serial interface is identified, and an address received over the serial interface is resolved to access a register bank. In a write operation, depending upon whether the address falls within a direct latch address range of the register bank, data may be directly latched into a direct latch register of the register bank or into a first-in-first-out register. For both read and write operations, reference may be made to a status register of the serial interface to identify or mitigate error conditions, and wait times may be relied upon to account for a clock domain crossing. After each of the read and write operations, a response code including a status indictor may be communicated.

Abstract: An approach for processing data by a pipeline of a single hardware-implemented virtual multiple instance finite state machine (VMI FSM) is presented. Based on a current state and context of an FSM instance, an input token selected from multiple input tokens to enter a pipeline of the VMI FSM, and a status of an environment, a new state of the FSM instance is determined and an output token is determined. The input token includes a reference to the FSM instance. In one embodiment, the reference is an InfiniBand QP number. After a receipt by the pipeline of the first input token and prior to determining the new state of the FSM instance and determining the output token, a logic circuit selects a second input token to enter the pipeline. The second input token includes a reference to a second FSM instance.

Abstract: An apparatus, in which a plurality of modules is connected with each other and processes a packet having information, includes a storage unit for storing first information indicating an order of processing performed by its own module and second information indicating an order of modules which perform processing, a reception unit for receiving a first packet and transmitting the first packet including information corresponding to the first information, a processing unit for processing data included in the first packet, a generation unit for generating a second packet including the processed data and the second information, and a transmission unit for comparing the information included in the first packet with the second information included in the second packet, and transmitting the packet having a latter processing order.

Abstract: A data storage architecture extension (DAX) system and method that permits multiple disk drive storage elements to be logically daisy-chained to allow a single host bus adapter (HBA) to view the storage elements as one logical disk drive is disclosed. The system/method may be broadly described as comprising a pass-thru disk drive controller (PTDDC) further comprising a HBA port, a disk drive interface port, pass-thru input port, and a pass-thru output port. The PTDDC intercepts and translates the HBA port input to the requirements of an individual disk drive connected to the drive interface port. Each PTDDC may be daisy-chained to other PTDDCs to permit a plethora of disk drives to be associated with a given HBA, with the first PTDDC providing a presentation interface to the HBA integrating all disk drive storage connected to the PTDDCs. The system/method also permits RAID configuration of disk drives using one or more PTDDCs.

Abstract: A facility is provided to enable operator message commands from multiple, distinct sources to be provided to a coupling facility of a computing environment for processing. These commands are used, for instance, to perform actions on the coupling facility, and may be received from consoles coupled to the coupling facility, as well as logical partitions or other systems coupled thereto. Responsive to performing the commands, responses are returned to the initiators of the commands.

Abstract: A peripheral device includes a file system manager, a command interpreter, and a controller. The peripheral device receives file access commands from a host device. The file system manager determines if the file access commands have embedded control commands and, if so, extracts the control commands. The file system manager sends the control commands to the command interpreter. Based on analyzing the commands, the command interpreter causes the controller to perform a selected function at the peripheral device.

Abstract: A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

Abstract: A method includes providing device management services to by defining one or more transaction control primitives and one or more transaction initiation commands for modifying a management tree of a managed device, mapping the transaction control primitives and transaction initiation commands to device management commands for the managed device, transmitting the device management commands to the managed device, determining a relevance of any of the transmitted device management commands that fail to execute, and based on the relevance determination, allowing the managed device to modify the management tree without executing the commands that fail to execute.

Abstract: This disclosure describes techniques of managing electronic documents as electronic records that do not require moving the electronic documents to a different repository. As described herein, an electronic document is stored at a first repository prior to a time when the electronic document is declared to be an electronic record. An administrator is able to configure a document management system (DMS) to manage the electronic document as an electronic record after the electronic document is declared to be an electronic record. In addition, the administrator is able to configure the DMS to store a copy of the electronic document at a second repository after the electronic document is declared to be an electronic record and to manage the copy of the electronic document as an electronic record.

Abstract: Disclosed herein is a device that includes a first terminal operatively supplied with a pulse signal, a second terminal, a set of third terminals operatively supplied with identification information, a storage unit configured to store the identification information in response to the pulse signal, and a control unit configured to electrically disconnect the first terminal from the second terminal until the storage unit stores the identification information and electrically connect the first terminal to the second terminal after the storage unit has stored the identification information. This device may be used as each of semiconductor chips that are stacked with each other.

Abstract: Exemplary system and computer program product embodiments compression blocks input/output (I/O) reduction are provided. In one embodiment, by way of example only, data blocks are arranged into groups to provide a single I/O. Lists indicating the available block space for the data blocks are organized in advance according to space size. The data blocks required for a single command are allocated as the single I/O. The data blocks are sequentially ordered. Additional system and computer program product embodiments are disclosed and provide related advantages.

Abstract: A method for sending a keycode of a non-keyboard apparatus is provided and includes the following steps. The non-keyboard apparatus determines the connection status between itself and a computer by the time required for device enumeration. Then, according to a value generated from device enumeration, the non-keyboard apparatus identifies the kind of operating system running on the computer. The non-keyboard apparatus sends to the computer a keycode corresponding to the Num Lock key and/or a keycode corresponding to the Caps Lock key such that a sending time and a feedback time are obtained. A parameter related to the efficiency of the computer is then calculated based.

Abstract: A facility is provided to enable operator message commands from multiple, distinct sources to be provided to a coupling facility of a computing environment for processing. These commands are used, for instance, to perform actions on the coupling facility, and may be received from consoles coupled to the coupling facility, as well as logical partitions or other systems coupled thereto. Responsive to performing the commands, responses are returned to the initiators of the commands.

Abstract: Exemplary method, system, and computer program product embodiments compression blocks input/output (I/O) reduction are provided. In one embodiment, by way of example only, data blocks are arranged into groups to provide a single I/O. Lists indicating the available block space for the data blocks are organized in advance according to space size. The data blocks required for a single command are allocated as the single I/O. The data blocks are sequentially ordered. Additional system and computer program product embodiments are disclosed and provide related advantages.

Abstract: Methods and devices for manipulating HDMI-CEC messages transmitted over a network including at least two HDMI-CEC display devices with their associated at least two HDMI-CEC cluster trees that at least partially overlap, and enabling each of the HDMI-CEC display devices to communicate using HDMI-CEC with its associated HDMI-CEC cluster tree according to its current HDMI-CEC network view.

Abstract: A method includes pre-configuring a hardware-implemented front-end of a storage device with multiple contexts of respective connections conducted between one or more hosts and the storage device. Storage commands, which are received in the storage device and are associated with the connections having the pre-configured contexts, are executed in a memory of the storage device using the hardware-implemented front-end. Upon identifying a storage command associated with a context that is not pre-configured in the hardware-implemented front-end, software of the storage device is triggered to configure the context in the hardware-implemented front-end, and the storage command is then executed using the hardware-implemented front-end in accordance with the context configured by the software.

Abstract: A data acquisition system includes a receptacle and a data acquisition device. The receptacle has a housing, sensor inputs to receive data signals from sensors coupled to an object, and a rib to block insertion of a standard Universal Serial Bus (USB) plug and facilitate insertion of a modified USB plug having a slot that mates with the rib. The data acquisition device includes circuitry to receive, store and process data, a USB plug having pins operatively coupled to the circuitry, a first subset of pins configured to receive data signals from the receptacle and a second subset of pins configured to support standard USB communication with USB-compliant devices, and a slot formed in the USB plug such that the slot facilitates interconnection of the USB plug both with standard USB-compliant devices and with the receptacle, the slot mating with the rib to facilitate interconnection.

Abstract: A processor and execution units providing intra-processor resource control. A processor includes a processor core and a peripheral. The processor core includes a first execution unit, and a second execution unit coupled to the first execution unit. The peripheral is coupled to the second execution unit. The second execution unit is configured to execute a complex instruction, and includes a status register and resource control logic. The status register includes a resource control field configured to store resource control information. The resource control information specifies whether the second execution unit requests access to the peripheral during execution of an instruction stream comprising a complex instruction. The resource control logic is configured to apply the resource control information to request access to the peripheral during execution of the instruction stream comprising the complex instruction.

Abstract: Methods and structure are provided for performing a rebuild using a Serial Attached SCSI (SAS) expander. The SAS expander includes an SMP target operable to receive, from a Redundant Array of Independent Disks (RAID) controller, a Serial Management Protocol (SMP) command for initiating a rebuild of a RAID volume at the SAS expander. The SAS expander also includes a control unit operable to initiate a rebuild of the RAID volume based on the received SMP command from the controller, and a Serial SCSI Protocol (SSP) initiator operable to generate SSP commands for performing the RAID rebuild based upon input from the control unit.

Abstract: The invention in particular has as an object the incremental configuration of an IMA-type module, the module comprising temporal and hardware resources as well as an operating system allowing a segregated running of at least two applications with the aid of at least one part of the resources. After having obtained (305) at least one first configuration parameter of at least one part of the resources, this parameter applying to a resource specific to the operating system or a resource common to the operating system and to at least one of the applications or to the applications, the module is configured (310) according to this parameter. A second configuration parameter of at least one part of the resources then is obtained (320), this second parameter applying to a resource specific to one of the applications. The module then is configured (330) according to the said at least one second parameter.

Abstract: A processor and execution units providing intra-processor operation control. In one embodiment, a processor includes a processor core and a peripheral device. The processor core includes a first execution unit and a second execution unit. The second execution unit is coupled to the first execution unit and the peripheral device. The second execution unit is configured to execute a complex instruction, and includes a status register and execution control logic. The status register includes an execution control information field configured to store execution control information. The execution control information specifies operational parameters of the peripheral device. The execution control logic is configured to apply the execution control information to generate execution control signals, and to control operation of the peripheral device via the execution control signals.

Abstract: A method for processing a read sub-command in a secondary storage controller is disclosed. The method includes receiving the read sub-command from a primary storage controller; retrieving data in response to the read sub-command; utilizing a write request to write the retrieved data directly to a memory accessible by a host device; issuing an additional request to the same memory after the write request; receiving an indication of completion of the additional request; and reporting a sub-completion status to the primary storage controller.

Abstract: A control unit of a USB 3.0 device controls the USB 3.0 device that has entered an SS.Disabled state to transition to an Rx.Detect state when a USB 2.0 connection is not established after a predetermined time, in which the USB 2.0 connection is one of an HS (High Speed) connection, an FS (Full Speed) connection, and an LS (Low Speed) connection. This enables quick return to the Rx.Detect state for the USB 3.0 device that entered the SS.Disabled state due to an error in the host.

Abstract: A transactional memory (TM) receives an Atomic Metering Command (AMC) across a bus from a processor. The command includes a memory address and a meter pair indicator value. In response to the AMC, the TM pulls an input value (IV). The TM uses the memory address to read a word including multiple credit values from a memory unit. Circuitry within the TM selects a pair of credit values, subtracts the IV from each of the pair of credit values thereby generating a pair of decremented credit values, compares the pair of decremented credit values with a threshold value, respectively, thereby generating a pair of indicator values, performs a lookup based upon the pair of indicator values and the meter pair indicator value, and outputs a selector value and a result value that represents a meter color. The selector value determines the credit values written back to the memory unit.

Abstract: According to one embodiment, a non-transitory medium, a controller, a memory, an extension function section, and an extension register. The controller controls the non-transitory medium. The memory which is serving as a work area is connected to the controller. The extension function section is controlled by the controller. The extension register which is provided on the memory is provided with a certain block length capable of defining an extension function of the extension function section. The controller processes a first command to write header data of a command to operate the extension function section to the extension function section through the extension register, and a second command to read header data of a response from the extension function section through the extension register.

Abstract: A D/A conversion device includes a waveform-data-string storage area that stores therein a waveform data string including a plurality of digital values, a waveform-output-control-data storage area in which operation-mode specifying data and update request data are written, a digital-value output unit that, when the operation-mode specifying data specifies an automatic control mode, while sequentially updating an address to be read in the waveform-data-string storage area for each output period set in advance, sequentially reads and outputs a digital value and that, when the operation-mode specifying data specifies a step execution mode or an output-address change mode, while updating the address to be read at a timing when the update request data is written, reads and outputs the digital value, and a D/A conversion unit that converts the digital value output from the digital-value output unit into an analog value.

Abstract: An apparatus includes an input/output (I/O) interface circuit that includes a memory and a controller. The memory stores a plurality of commands to regulate an input/output (I/O) interface. The commands indicate at least one I/O state of at least one I/O terminal of the I/O interface circuit and a time duration that is associated with the I/O state. The controller executes the commands to place the I/O interface in the the I/O state(s) in a predetermined sequence.

Abstract: Memory system controllers can include a host bus adapter (HBA) and a serial advanced technology attachment (SA) programming compliant device coupled to the HBA via a function-specific interconnect configured to simultaneously transfer a command, a response, and other information between the HBA and the SA programming compliant device.

Abstract: A storage controller including a processor and a memory controller. The processor is configured to generate a command corresponding to a first write operation and a second write operation, in which the first write operation is contiguous to the second write operation, and the first write operation is received prior to the second write operation. The command arranges the second write operation prior to the first write operation. The memory controller is configured to, in response to the command, execute each of the first write operation and the second write operation. The second write operation is executed by the memory controller prior to the first write operation.

Abstract: A method of performing an input/output (I/O) processing operation includes: generating an address control structure for each of a plurality of consecutive data transfer requests, each address control structure specifying a local channel memory location of a corresponding address control word (ACW); receiving a data transfer request from a network interface that includes addressing information specified by a corresponding address control structure; comparing, by a data router in the channel, an Offset field of an address control structure and an Expected Offset field of an ACW to determine whether the data transfer request has been received in the correct order; and based on determining that the data transfer request has been received in the correct order, accessing the ACW by the data router and routing the data transfer request to a host memory location specified in the ACW.

Abstract: An I/O device is coupled to a computing host. In some embodiments, the device is enabled to utilize memory of the computing host not directly coupled to the device to store information such as a shadow copy of a map of the device and/or state of the device. Storage of the shadow copy of the map enables one or both of the device and the computing host to utilize the shadow copy of the map, such as to decrease read latency. Storage of the state enables the device to save volatile state that would otherwise be lost when the device enters a low-power state. In some embodiments, the device implements one or more non-standard modifiers of standard commands. The non-standard modifiers modify the execution of the standard commands, providing features not present in a host protocol having only the standard commands.

Abstract: A data transmitting method for a memory controller is provided. A host system executes threads to transmit commands through a human interface device (HID) interface. The method includes: receiving a command packet from the host system; executing an operation corresponding to a command according to the command packet to generate responding data, which is divided into at least one responding data packet by the memory controller; transmitting a responding packet and the responding data packet to the host system by the memory controller; determining if one of the at least one responding data packet is lost according to the responding packet by the host system; if a responding data packet is lost, transmitting a retransmitting packet to the memory controller by the host system to request the memory controller to retransmit the lost responding data packet. Accordingly, the data transmission amount is improved, and the integrity of data is ensured.

Abstract: A method for processing commands includes receiving, for multiple commands, doorbells for writing to a send queue scheduler buffer on a host channel adapter (HCA). The send queue scheduler buffer is associated with a send queue scheduler. The method further includes detecting a potential deadlock of the send queue scheduler from processing a portion of the doorbells, writing a subset of the doorbells to a doorbell overflow buffer on a host, operatively connected to the HCA, based on detecting the potential deadlock, and discarding the subset by the send queue scheduler without processing the subset of the plurality of doorbells before discarding.

Abstract: Devices, systems, and methods for selectively pairing an upstream facing USB port device (UFP device) and a downstream facing USB port device (DFP device) over a network are disclosed. A controller device sends pairing commands to a selected UFP device and a selected DFP device, which then establish a connection with each other over a network. The controller device may subsequently cause the UFP device and/or the DFP device to remove the existing pairing and to instead pair with a different UFP device or DFP device. A pairing between a UFP device and a DFP device allows a host device coupled to the UFP device and a USB device coupled to the DFP device to communicate via a USB-compatible protocol.

Abstract: The disclosed embodiments provide a system that facilitates the processing of commands in a set of devices. The system includes a host bus adapter that provides an interface for connecting the set of devices to the host and manages the allocation of a set of tags to one or more of the devices. For each device connected to the host, the system also includes a queue-management apparatus that sends a tag request for the device to the host bus adapter. The queue-management apparatus then receives a subset of the tags for the device from the host bus adapter and uses the set of tags to queue commands from the host to the device and track the status of the queued commands.