Input/output Command Process Patents (Class 710/5)
  • Patent number: 9009376
    Abstract: A BIOS storage unit of an electronic device is connected to a USB 3.0 extension unit of a USB 3.0 host connector. A microcomputer of a USB compatible device is connected to a USB 3.0 extension unit of a USB 3.0 device connector. The microcomputer of the USB compatible device can write and read the BIOS data to/from the BIOS storage unit of the electronic device through the USB 3.0 extension units. Moreover, the microcomputer of the USB compatible device compares the BIOS data read from the BIOS storage unit of the electronic device with the BIOS data stored in its own storage unit, and notifies a result of the comparison.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: April 14, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Tatsuaki Amemura
  • Patent number: 9003078
    Abstract: A system and method is described for managing subscriptions between a consumer mobile phone, merchant server, billing server and carrier server. A charge-info method is used for the merchant server to retrieve charge elements from the billing server for constructing a user interface for the consumer mobile phone. An opt-in method is used to confirm a consumer's opt-in for a subscription. A remind-charge method is used to remind the consumer of an upcoming charge on the subscription. A charge method allows the merchant server to charge a user account on a carrier server via the billing server. A cancel method is used for the consumer to cancel the subscription.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: April 7, 2015
    Assignee: Boku, Inc.
    Inventors: John P. Browne, James C. McIntyre, Marcin L. Pawlowski
  • Patent number: 9003069
    Abstract: An input device for controlling multiple computers includes a storing unit, a sensing unit, a controlling unit, and a transmitting unit. The controlling unit calculates a moving direction and a displacement value of the input device according to the sensing unit to determine one of the computers which the input device is in control of and generates an input command for it. The input command includes identification of the controlled computer and is transmitted to multiple computers. The computer corresponding to the identification performs the input command. The moving direction corresponds to a pointer direction of the computer. The controlling unit accumulates the displacement value to be a first accumulated displacement value when the input device moves toward to a first pointer direction. When the first accumulated displacement value is larger than a threshold value, the controlling unit switches the input device to control another one of computers.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: April 7, 2015
    Assignees: Lite-On Electronics (Guangzhou) Limited, Lite-On Technology Corporation
    Inventors: Tao-Cheng Yen, Er-Hao Chen
  • Patent number: 9003068
    Abstract: A computer system having a host adapter is provided. The host adapter includes a primary port that follows a primary communication protocol. The primary port is connectable to at least one peripheral device. The host adapter includes a service port that follows a service communication protocol to monitor and send recovery commands to the peripheral device. The service port is decoupled and separate from the primary port and connectable to the at least one peripheral device.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: April 7, 2015
    Assignee: International Business Machines Corporation
    Inventors: David D. Cadigan, Thomas J. Griffin, M. Dean Sciacca, Dustin J. VanStee
  • Patent number: 9003072
    Abstract: There is provided a portable data storage device with wireless functionality. The portable storage device includes a digital switch circuit for controlling a flow of data in the portable storage device; a non-volatile memory module coupled to the digital switch circuit, the non-volatile memory module being for storing data; an interface coupled to the digital switch circuit for enabling the portable data storage device to be used for data transfer with a host device; a microcontroller coupled to the digital switch circuit for controlling the digital switch circuit; and a wireless communications module coupled to the microcontroller for wireless transmission/reception of data. The microcontroller is configured to toggle amongst a plurality of discrete modes of the digital switch circuit such that in at least one of the plurality of discrete modes the digital switch circuit diverts data away from the microcontroller to reduce a processing load on the microcontroller. A corresponding method is also disclosed.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: April 7, 2015
    Assignee: T-Data Systems (S) Pte Ltd
    Inventor: Winn Tan
  • Patent number: 9003079
    Abstract: A phone-on-file opt-in method is described. A phone-on-file opt-in request is received at the billing server including a msisdn and a merchant supplied unique consumer identifier. The billing server confirms the phone-on-file opt-in with a consumer device and records a phone-on-file opt-in status as active if the first phone-on-file is confirmed. A charge method includes receiving, at the billing server, a charge API call from a merchant server including at least one identifier and an amount, determining a phone-on-file opt-in status corresponding to the identifier at the billing server and transmitting a request to charge a user account to a carrier server if the phone-on-file opt-in status is active, but not if the phone-on-file opt-in status is inactive, the request including an amount corresponding to the amount received in the charge API call.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: April 7, 2015
    Assignee: Boku, Inc.
    Inventors: John P. Browne, Pankhudi Pankhudi, Natalya Elkanova, James C. McIntyre, Annie Minh Ma
  • Patent number: 9003087
    Abstract: A shared device unit, which comprises a storage device, is coupled to a plurality of storage systems. The shared device unit provides a plurality of storage areas, which are based on the storage device, to the plurality of storage systems. Each storage system stores allocation management information which comprises an ID of a storage area provided to thereof among the plurality of storage areas, and provides the storage area corresponded to the ID included in the allocation management information to the host computer coupled thereto among the plurality of host computers.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: April 7, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Miho Imazaki, Shigeo Homma, Hiroaki Akutsu, Yoshiaki Eguchi, Akira Yamamoto, Junji Ogawa
  • Patent number: 9003067
    Abstract: A method for operating a network with two control devices and at least one peripheral device, wherein each of the control devices, in relation to the peripheral device, is in an active operating state in which it is sending control instructions to the peripheral device or is in an idle operating state in which it is not sending any control instructions to the peripheral device. The control device that is in the active operating state in relation to the peripheral device sends synchronization signals at regular intervals to the other control device and activity signals to the peripheral device. Upon failure of the synchronization signals, the non-active control device checks whether the peripheral device is still receiving activity signals from the active control device. If it is not, the non-active control device assumes control of the peripheral device.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: April 7, 2015
    Assignee: Siemens Aktiengesellschaft
    Inventors: Herbert Barthel, Reiner Griessbaum, Enrico Ramm
  • Patent number: 8996749
    Abstract: A system for achieving a uniform device abstraction layer is described. The system includes a device class determiner coupled with a local server, the device class determiner configured for establishing a device class for at least one device residing in a domain at a premises, wherein the domain is coupled with a remote server, and a device of the at least one device includes a communication port that supports a first protocol corresponding to a second protocol, wherein the second protocol is supported by a device driver coupled with the domain, wherein based on the establishing the device class, an action is enabled to be mapped to the device, thereby enabling an application to run on and utilize a capability of the device.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: March 31, 2015
    Assignee: Candi Controls, Inc.
    Inventors: Steve Raschke, Mike Anderson
  • Patent number: 8996735
    Abstract: A remote data concentrator (RDC) for an avionics network, the RDC comprising an input/output interface (I/O) for connection to one or more input/output devices, and a network interface for connection to a remote processor, wherein the RDC is operable to provide communication between the input/output device(s) and the remote processor, and wherein the RDC further comprises a set of instructions for autonomously driving an output device connected to the I/O. Also, an avionics network including the RDC; an aircraft including the RDC; and a method of operating the RDC.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: March 31, 2015
    Assignees: Airbus Operations Limited, Airbus Operations GmbH
    Inventors: Timothy Todd, Thorsten Nitsche
  • Patent number: 8996763
    Abstract: An electronic device executes a certain process when first data for instructing the electronic device to begin the certain process has been received from an external apparatus, and stops the certain process when the external apparatus has not been detected as a certain apparatus and when a first time has elapsed since the certain process was executed, even if second data for instructing the electronic device to stop the certain process has not been received.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: March 31, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hidetaka Koizumi
  • Patent number: 8996737
    Abstract: An adapter device is provided that is configured to interface with a host device according to a first communication standard via a first connector and with a transceiver module according to a second communication standard via a second connector. The adapter device detects that the transceiver module has connected to the adapter device. The adapter device retrieves transceiver module identifier information from the transceiver module and converts the transceiver module identifier information to the first communication standard. The converted transceiver module identifier information and adapter device identifier information are sent to the host device.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: March 31, 2015
    Assignee: Cisco Technology, Inc.
    Inventors: Norman Tang, Jose Carlos Raygoza Echeagaray, Liang Ping Peng, David Lai, Anthony Nguyen
  • Patent number: 8996734
    Abstract: Described herein is a system (102) having a virtualization and switching system configured to virtualize I/O devices (108) and perform switching of the I/O devices (108) and I/O requests. The virtualization and switching system (102) includes a peripheral virtualization controller (PVC) (204), at least one device control module (206) connected to the PVC (204), and at least one command parser (210). The PVC (204) is configured to manage I/O virtualization and I/O command access of different I/O devices (108). The device control module (206) is configured to store configuration and I/O device registers, implemented by the PVC (204) to enable virtualization of I/O devices (108). The device control module (206) also implements the I/O command and switching logic to perform graceful handling of the I/O commands and virtualized I/O devices between multiple host processors (104).
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: March 31, 2015
    Assignee: Ineda Systems Pvt. Ltd
    Inventors: Balaji Kanigicherla, Siva Raghu Ram Voleti, Krishna Mohan Tandaboina
  • Patent number: 8996738
    Abstract: A data transfer operation completion detection circuit including a first counter for performing a shifting operation in response to the generation of a read initiation signal, a second counter for performing a shifting operation in response to the generation of a burst completion signal, and an SR latch circuit for generating a read enable signal in response to the burst completion signal being generated when the count value of the first counter matches the count value of the second counter. The completion of a read operation or another data transfer operation is thus detected based on a read initiation signal reception history; therefore, it is possible to detect whether all read operations are complete at a given time even if a new read command is received while a read operation or the like is in progress.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: March 31, 2015
    Assignee: PS4 Luxco S.a.r.l.
    Inventor: Hiroki Fujisawa
  • Patent number: 8996764
    Abstract: Some of the embodiments of the present disclosure provide a method comprising categorizing each data packet of a plurality of data packets into one of at least two priority groups of data packets; and controlling transmission of data packets of a first priority group of data packets during a first off-time period such that during the first off-time period, data packets of the first priority group of data packets are prevented from being transmitted to a switching module from one or more server blades. Other embodiments are also described and claimed.
    Type: Grant
    Filed: May 12, 2014
    Date of Patent: March 31, 2015
    Assignee: Marvell International Ltd.
    Inventor: Martin White
  • Patent number: 8996736
    Abstract: Aspects of a clock domain crossing serial interface, direct latching over the serial interface, and response codes are described. In various embodiments, a data communication command received over a serial interface is identified, and an address received over the serial interface is resolved to access a register bank. In a write operation, depending upon whether the address falls within a direct latch address range of the register bank, data may be directly latched into a direct latch register of the register bank or into a first-in-first-out register. For both read and write operations, reference may be made to a status register of the serial interface to identify or mitigate error conditions, and wait times may be relied upon to account for a clock domain crossing. After each of the read and write operations, a response code including a status indictor may be communicated.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: March 31, 2015
    Assignee: Broadcom Corporation
    Inventors: Veronica Alarcon, Walid Nabhane, Mark Norman Fullerton, Love Kothari, Ronak Subhas Patel, Chih-Tsung Hsieh, Hao-zheng Lee
  • Patent number: 8996779
    Abstract: Service dependency is determined for services in a service oriented architecture (SOA) environment. The steps in determining service dependency include: recording a first triple describing a first service call where the first service calls the second service, and determining the first service is dependent upon the second service based, at least in part, upon the first triple. The recording action is performed dynamically, the recording occurring when the first service call is made. Other related steps include recording the first triple to a timestamp indicating when the first service call is made.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: March 31, 2015
    Assignee: International Business Machines Corporation
    Inventors: James E. Bostick, John M. Ganci, Jr., Raghuraman Kalyanaraman, Craig M. Trim
  • Patent number: 8996768
    Abstract: A method and storage device for assessing execution of trim commands are provided. In one embodiment, a trace of trim and write commands sent to a storage device are obtained. For each trim command in the trace, a subsequent write command to a same logical block address (LBA) as the trim command is identified, and an elapsed time between the trim and write commands is calculated. This information can be used to display a histogram and/or to optimize when the storage device executes trim commands and/or when the host device issues trim commands.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: March 31, 2015
    Assignee: SanDisk Technologies Inc.
    Inventors: Oren Cohen, Eyal Sobol, Omer Gilad, Judah G. Hahn
  • Publication number: 20150089086
    Abstract: An A/V information updating control system has an A/V host and a control device. The A/V host stores an A/V information. The control device is connected with multiple user-end apparatuses. The control device receives an A/V adjusting command from any one of the user-end apparatuses, and updates the A/V information of the A/V host according to the A/V adjusting command. The control device thus sends the updated A/V information to the user-end apparatuses. Hence, each user who has the user-end apparatus can review the updated A/V information in real time.
    Type: Application
    Filed: September 26, 2013
    Publication date: March 26, 2015
    Inventor: Chao-Chi YANG
  • Publication number: 20150089087
    Abstract: A semiconductor memory may include: a first stacked structure including a first word line disposed over a substrate and extended in a first direction, a first bit line disposed over the first word line and extended in a second direction crossing the first direction, and a first variable resistance layer interposed between the first word line and the first bit line; and a second stacked structure including a second bit line disposed over the first stacked structure and extended in the second direction, a second word line disposed over the second bit line and extended in the first direction, and a second variable resistance layer interposed between the second word line and the second bit line; and a first selecting element layer interposed between the first bit line and the second bit line.
    Type: Application
    Filed: February 7, 2014
    Publication date: March 26, 2015
    Applicant: SK HYNIX INC.
    Inventors: Hyo-June KIM, Ja-Chun KU, Sung-Kyu MIN, Seung-Beom BAEK, Byung-Jick CHO, Won-Ki JU, Hyun-Kyu KIM, Jong-Chul LEE
  • Publication number: 20150089088
    Abstract: An interface controller coupling the main body of an external electronic device to a host, and the electronic device using the interface controller and a control method for the external electronic controller are disclosed. The interface controller has a control unit and a non-volatile memory. The control unit is configured to transmit a termination-on signal to the host when link information retrieved from the main body has been written into the non-volatile memory. When the host issues a link information request in response to the termination-on signal, the control unit uses the link information stored in the non-volatile memory to respond to the link information request.
    Type: Application
    Filed: August 6, 2014
    Publication date: March 26, 2015
    Inventors: Chia-Ying KUO, Yi-Lin LAI
  • Patent number: 8990441
    Abstract: A hybrid drive includes multiple parts: a performance part (e.g., a flash memory device) and a base part (e.g., a magnetic or other rotational disk drive). A drive access system, which is typically part of an operating system of a computing device, issues input/output (I/O) commands to the hybrid drive to store data to and retrieve data from the hybrid drive. The drive access system assigns, based on various available information, a priority level to groups of data identified by logical block addresses (LBAs). With each I/O command, the drive access system includes an indication of the priority level of the LBA(s) associated with the I/O command. The hybrid drive determines, based on the priority level indications received from the drive access system, which LBAs are stored on which part or parts of the hybrid drive.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: March 24, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Mehmet Iyigun, Yevgeniy M. Bak, Eric M. Bluestein, Robin A. Alexander, Andrew M. Herron, Xiaozhong Xing
  • Patent number: 8990439
    Abstract: A computer program product is provided for performing an input/output (I/O) operation at a host computer system configured for communication with a control unit. The computer program product is configured to perform: sending a transport mode command message from a channel subsystem to the control unit, the command message including a command for data to be transferred to an I/O device controlled by the control unit; and sending a data transfer message to the control unit, the data transfer message having an amount of the data to be transferred, the amount of the data being less than or equal to a maximum amount of data, the maximum amount of data corresponding to a number of buffers associated with the control unit and a size of each of the number of buffers, the number and the size indicated by a value maintained in the host computer system.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: March 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Scott M. Carlson, Daniel F. Casper, John R. Flanagan, Roger G. Hathorn, Matthew J. Kalos, Louis W. Ricci, Gustav E. Sittman, III
  • Patent number: 8990438
    Abstract: A computer system includes a receiver configured to pair with a set of peripheral devices and have active connections with a first subset of the peripheral devices and inactive connections with a second subset of the peripheral devices. The first and the second subsets of peripheral devices are subsets of the set of peripheral devices. If a select one of the peripheral devices in the inactive set of peripheral devices is operated, the receiver is configured to activate a connection with the select one of the peripheral devices in a latency period that is below human perception levels of the latency period.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: March 24, 2015
    Assignee: Logitech Europe S.A.
    Inventors: Jacques Chassot, Xavier Bize, Eric Tissot-Dupont, Philippe Chazot, Tarak Fekih, Pierre Chenes
  • Patent number: 8990453
    Abstract: Described are techniques for controlling a flow of I/O requests. R is received denoting a current maximum number of outstanding I/O requests allowed to be issued by a first data storage system to a second data storage system over a path. Assessment processing is performed to obtain a first performance value, a second performance value, and a third performance value, respectively, when the maximum number of outstanding I/O requests allowed to be issued by the first data storage system to the second data storage system over the path is R+delta1, R, and R?delta2 (delta1 and delta 2 are positive integer values). It is determined whether to update R in accordance with criteria including the first performance value, the second performance value and the third performance value.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: March 24, 2015
    Assignee: EMC Corporation
    Inventors: Bhaskar Bora, Mark J. Halstead, Benoit J. Merlet, Dharmesh Thakkar
  • Patent number: 8990440
    Abstract: Reusing system configuration information and metadata for related operations is disclosed. It is determined that a group of content management system commands may be treated as a related set for purposes of updating content management system configuration information and/or metadata. The content management system configuration information and/or metadata are updated once for purposes of processing the group.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: March 24, 2015
    Assignee: EMC Corporation
    Inventors: Shu-Shang Sam Wei, Roger W. Kilday, Victor Spivak, Meir Amiel, David Buccola
  • Patent number: 8990456
    Abstract: A block of data may be transferred to memory through a plurality of write operations, where each write operation is preceded by a protocol request and a protocol response. A plurality of protocol requests issued in a first order may elicit a corresponding plurality of protocol responses in a second order, and the write operations may be performed in yet a third order. Chipsets implementing the data write methods are also described and claimed.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: March 24, 2015
    Assignee: Intel Corporation
    Inventors: Raman Nayyar, Kenneth C. Holland
  • Patent number: 8990444
    Abstract: A fieldbus gateway using a virtual serial fieldbus port and a data transmission method thereof are provided. By receiving a fieldbus frame containing target data through a virtual serial fieldbus port connected to a source device or a target device via a fieldbus gateway and sending another fieldbus frame containing the target data via other fieldbus port to target devices or source devices, the system and the method can provide two or more remote devices to control one controlled device at the same time. The invention also achieves the effect of using one virtual serial fieldbus port to transmit data between multiple source devices and target devices concurrently.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: March 24, 2015
    Assignee: Moxa Inc.
    Inventors: Bo Er Wei, Chun Fu Chuang
  • Patent number: 8990446
    Abstract: Aspects of the present disclosure describe automatically changing an output mode of an output device from a first output mode to a latency reduction mode. An initiation signal and the output data may be received from a client device platform or a signal distributor. Upon receiving the initiation signal, the output device may change the output mode from the first output mode to the latency reduction mode. Thereafter, the output device may receive an end latency reduction mode signal. The output device may then revert back to the first output mode. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: March 24, 2015
    Assignee: Sony Computer Entertainment America, LLC
    Inventor: Roelof Roderick Colenbrander
  • Patent number: 8988721
    Abstract: A status information communication port for notifying a host apparatus of an error that has occurred during initialization of a printer engine, and a print data communication port for receiving print data sent from the host apparatus are respectively opened at appropriate timings. For example, the status information communication port is opened in response to completion of initialization of an interface, and the print data communication port is opened in response to completion of the initialization of the printer engine.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: March 24, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yukio Kanakubo
  • Patent number: 8990462
    Abstract: A data transfer method of a storage device which includes a host bus adaptor to communicate with an external host via a first interface and to communicate internally via a second interface is provided. The data transfer method may include issuing a write command and a read command to the host bus adaptor; performing a read direct memory access operation using the first interface in response to the write command and simultaneously performing a write direct memory access operation using the second interface in response to the read command; and generating frame information structure (FIS) sequences according to the second interface in response to the issued write command and the issued read command. The first interface may perform a full duplex data transfer and the second interface may perform a half-duplex data transfer.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: March 24, 2015
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Hojun Shim, Eunchan Kim
  • Publication number: 20150081956
    Abstract: The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting, from a device, a request for a queue entry representing a command from a host comprising a request for data stored at a device memory location; receiving the command from the host; and executing the command. An example method can also include selecting a bit string representing whether a requested data stream has been received, and storing the bit string into a memory buffer portion to mark the buffer portion. The method can include receiving, into the memory buffer, the stream. The method can include retrieving contents of the buffer portion, and determining whether the contents contain the bit string. If so, the method can include determining that portions of the stream have not been received. Otherwise, the method can include determining that the stream has been received.
    Type: Application
    Filed: September 18, 2014
    Publication date: March 19, 2015
    Inventors: Dejan VUCINIC, Zvonimir Z. BANDIC, Qingbo WANG, Cyril Guyot, Robert Mateescu, Frank R. Chu
  • Publication number: 20150081955
    Abstract: The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting, from a device, a request for a queue entry representing a command from a host comprising a request for data stored at a device memory location; receiving the command from the host; and executing the command. An example method can also include selecting a bit string representing whether a requested data stream has been received, and storing the bit string into a memory buffer portion to mark the buffer portion. The method can include receiving, into the memory buffer, the stream. The method can include retrieving contents of the buffer portion, and determining whether the contents contain the bit string. If so, the method can include determining that portions of the stream have not been received. Otherwise, the method can include determining that the stream has been received.
    Type: Application
    Filed: September 18, 2014
    Publication date: March 19, 2015
    Inventors: Dejan VUCINIC, Cyril GUYOT, Robert MATEESCU
  • Patent number: 8984173
    Abstract: Mechanisms are provided for providing an early warning of an error state of a remote direct memory access (RDMA) resource to a userspace application. The mechanisms detect, using kernelspace logic, an error event having occurred, and perform a write operation to write an error state value to a userspace shared memory state data structure indicating the RDMA resource to be in an error state. The mechanisms detect, using userspace logic, the RDMA resource being in an error state by reading the error state value from the userspace shared memory state data structure in response to a userspace application attempting to perform a RDMA operation using the RDMA resource. In addition, the mechanisms initiate, by the userspace application, an operation to tear down the RDMA resource in response to detecting the RDMA resource being in the error state.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: March 17, 2015
    Assignee: International Business Machines Corporation
    Inventors: Omar Cardona, Matthew R. Ochs, Vikramjit Sethi
  • Patent number: 8984182
    Abstract: The present disclosure includes systems and techniques relating to input/output (I/O) command aggregation for Small Computer System Interface (SCSI) enabled devices.
    Type: Grant
    Filed: March 27, 2013
    Date of Patent: March 17, 2015
    Assignee: Marvell International Ltd.
    Inventors: Qun Zhao, Xinhai Kang, Michael Wang, Jacky Feng, Nancy Xu, Andy Yan
  • Patent number: 8984171
    Abstract: A data storage device and a FLASH memory control method with a cache space. The FLASH memory control method includes the following steps: using a plurality of channels to access a FLASH memory, wherein the FLASH memory has a plurality of blocks each with a plurality of pages, and the blocks are grouped to be accessed by the different channels; allocating a random access memory to provide a cache space, the cache space having a plurality of cache areas caching write data for the different channels, respectively; distributing the data issued from a host to correspond to the different channels; and reusing a latest-updated cache area of the cache space to cache write data when a logical address requested to be written with data is identical to a logical address that the latest-updated cache area corresponds to.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: March 17, 2015
    Assignee: Silicon Motion, Inc.
    Inventor: Kuan-Yu Ke
  • Patent number: 8984172
    Abstract: An apparent load is determined based on assigning weightings to commands based on various factors including, but not limited to, the limitations of the underlying storage media device(s), where the command queue fullness is viewed from that perspective rather than simply the number of commands outstanding in a storage media device. Also disclosed is the use of a positive bias and a negative bias to artificially influence the apparent load based on fill percentages of storage media devices.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: March 17, 2015
    Assignee: Concurrent Ventures, LLC
    Inventors: Jesse D. Beeson, Jesse B. Yates
  • Patent number: 8984184
    Abstract: A method for communicating data between peripheral devices and an embedded processor that includes receiving, at a data buffer unit of the embedded processor, the data from a peripheral device. The method also includes copying data from the data buffer unit into the bridge buffer of the embedded processor as a bridge buffer message. Additionally, the method includes creating, after storing the data as a bridge buffer message, a peripheral device message comprising the bridge buffer message, and sending the peripheral device message to a thread message queue of a subscriber.
    Type: Grant
    Filed: April 4, 2014
    Date of Patent: March 17, 2015
    Assignee: William Marsh Rice University
    Inventors: Thomas William Barr, Scott Rixner
  • Publication number: 20150074292
    Abstract: According to one embodiment, a data transfer control device complying with a communication protocol which executes an update of information from an attachment device in a predetermined area of a system memory, the device includes a receiving part receiving the information from the attachment device, a transferring part transferring the information in the predetermined area, the information from the transferring part overwritten in the predetermined area sequentially, and a determining part inhibiting a transfer of the information in the transferring part to omit the update of the information in the predetermined area.
    Type: Application
    Filed: December 27, 2013
    Publication date: March 12, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Takashi ISHIGURO
  • Publication number: 20150074294
    Abstract: Providing command queuing in embedded memories is provided. In particular, aspects disclosed herein relate to a process through which a status of the queue is communicated to a host from a device. Aspects of the present disclosure use the command structure of the embedded Multi-Media Card (eMMC) standard, such that the host may determine a state of the queue in the device proximate a known end of an in-progress data transfer. In this manner, the host can select a task to commence after completion of a current data transfer while the current data transfer is still ongoing.
    Type: Application
    Filed: September 5, 2014
    Publication date: March 12, 2015
    Inventors: Assaf Shacham, Tom Yahalom, Aviad Zacks-Shtrauss
  • Publication number: 20150074295
    Abstract: A computer program product, apparatus, and a method for facilitating input/output (I/O) processing for an I/O operation at a host computer system configured for communication with a control unit. The method includes receiving, by a control unit, a command block configured to hold a plurality of commands including an input command and/or an output command, the plurality of commands specified by a transport command word (TCW) including a read indicator configured to indicate whether the I/O operation includes input data and a write indictor configured to indicate whether the I/O operation includes output data; based on the command block holding at least one output command, receiving the output data and executing the at least one output command; and based on the command block holding at least one input command, forwarding the input data to the channel subsystem for storage at a location specified by the TCW.
    Type: Application
    Filed: November 17, 2014
    Publication date: March 12, 2015
    Inventors: John R. Flanagan, Daniel F. Casper, Catherine C. Huang, Matthew J. Kalos, Ugochukwu C. Njoku, Dale F. Riedy, Gustav E. Sittmann, III
  • Publication number: 20150074293
    Abstract: According to one embodiment, a storage device includes an internal bus with which a host interface and a controller are connected based on full-duplex communication. The host interface includes a command processing unit that issues the command to the controller. A response to a first command from the controller and an issuance of a second command by the command processing unit are transmitted in parallel, the first command being issued to the controller from the command processing unit.
    Type: Application
    Filed: March 11, 2014
    Publication date: March 12, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Yuki NAGATA
  • Patent number: 8976210
    Abstract: A remote access application queries the client device for its display properties. Using the display properties of the client device and optionally the size of the fingertip of the user, a connection resolution for a remote desktop connection is determined. A remote desktop session is retrieved at the connection resolution and remote pixels are mapped to client pixels at a non-1:1 ratio. Remote desktop is then optionally resized to full screen.
    Type: Grant
    Filed: May 7, 2013
    Date of Patent: March 10, 2015
    Assignee: Ericom Software Ltd.
    Inventors: Eran Heyman, Dan Shappir
  • Patent number: 8977781
    Abstract: A computer system includes a first storage control module and at least one server module. The first storage control module includes plural storage processors. Each server module includes a server processor and a server I/F connected to the server processor and at least two of the plurality of storage processors. The sever I/F of an issuance server which is any one of the at least one server module specifies the storage processor by referring to sorting information in which identification information of the issuance server of an I/O request issued by the server processor of the issuance server, identification information of a destination storage area of the I/O request, and identification information of the storage processor in charge of the destination storage area are correlated with each other, and sends a command based on the I/O request to the specified storage processor.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: March 10, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Nobuhiro Yokoi, Mutsumi Hosoya, Kazushi Nakagawa
  • Publication number: 20150067193
    Abstract: Semiconductor chips are provided. The semiconductor chip includes a first data pad, a first data strobe pad and a second data pad sequentially arrayed from a command address pad in a first direction. In addition, the semiconductor chip includes a third data pad, a second data strobe pad and a fourth data pad sequentially arrayed from the command address pad in a second direction. Data are inputted and outputted through the first and fourth data pads or through the second and third data pads in a predetermined bit organization. Related semiconductor chip packages and semiconductor systems are also provided.
    Type: Application
    Filed: February 7, 2014
    Publication date: March 5, 2015
    Applicant: SK hynix Inc.
    Inventors: Bok Rim KO, Dong Kyun KIM
  • Patent number: 8972613
    Abstract: There is provided a system and a method for increasing input/output (“I/O”) throughput in a data storage system. More specifically, in one embodiment, there is provided a method comprising determining an owning controller associated with each of a plurality of storage units of a storage system, receiving an I/O transaction for one of the plurality of storage units, determining if the I/O transaction is a read transaction, and selecting a path to the owning controller associated with the storage unit if the I/O transaction is a read transaction.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: March 3, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Rupin T. Mohan, Travis Pascoe, George Shin, Aithal Basrur Girish, Kasthurirengan Karthigeyan, Unnikrishnan Ponnan Katangot, Julio Valladares, Shrinivas B. Kulkarni, Y. Ravindra Paramashivappa
  • Patent number: 8972631
    Abstract: The defined architecture allows for format-efficient data storage on bit-patterned media, while allowing for typical variations in the drive, such as reader to writer gap variations. The defined BPM architecture relaxes some timing requirements on real-time signaling from the formatter to the channel, while enabling bit-accurate alignment between data accesses and the media.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 3, 2015
    Assignee: Seagate Technology LLC
    Inventors: Jimmie Ray Shaver, Barmeshwar Vikramaditya
  • Patent number: 8972627
    Abstract: An apparatus, system, and method are disclosed for managing operations for data storage media. An adjustment module interrupts or otherwise adjusts execution of an executing operation on the data storage media. A schedule module executes a pending operation on the data storage media in response to adjusting execution of the executing operation. The pending operation comprises a higher execution priority than the executing operation. The schedule module finishes execution of the executing operation in response to completing execution of the pending operation.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: March 3, 2015
    Assignee: Fusion-io, Inc.
    Inventors: John Strasser, David Flynn, Robert Wood
  • Patent number: 8972635
    Abstract: A processor includes a first transmitting unit that transmits, when receiving from a second processor a transmission request indicating transmission of target data which is read from a main storage unit and stored in the first processor, a transfer instruction to the first processor, the transfer instruction indicating transfer of the target data and state information to the second processor, the state information indicating a state of the target data used when the second processor reads and stores the target data. The processor includes a second transmitting unit that transmits acquisition information indicating acquisition of the target data to the second processor before receiving a response to the transfer instruction transmitted by the first transmitting unit from the first processor.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: March 3, 2015
    Assignee: Fujitsu Limited
    Inventors: Go Sugizaki, Naoya Ishimura
  • Patent number: 8972615
    Abstract: A computer program product is provided for performing: obtaining, by a channel subsystem, a transport command word (TCW) specified by an operating system, the TCW comprising an address of a transport services request block (TSRQB) and an address of a transport services response block (TSRSB); obtaining the TSRQB; building at least one command request based on the TSRQB, and sending the at least one command request from the channel subsystem to at least one network entity, the at least one command request including at least one of a fiber-channel generic services (FC-GS) request, a fiber-channel link services (FC-LS) request, and a fiber-channel link-level function (FC-SB) request; receiving a response to the at least one command request from the at least one network entity; and storing the response to the TSRSB based on the address of the TSRSB obtained from the TCW.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: March 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Daniel F. Casper, Patricia G. Driever, John R. Flanagan, Louis W. Ricci, Gustav E. Sittmann, III