Abstract: A bridging board configured for connecting a processor with a hard disk backboard includes a first signal connecting apparatus, a second signal connecting apparatus, a plurality of duplexer and a signal conditioner. The first signal connecting apparatus is electronically connected to the processor. The second signal connecting apparatus electronically connected to the hard disk backboard. Each duplexer has an input terminal electronically connected to the first signal connecting apparatus, and two output terminals electronically connected to the second signal connecting apparatus to allow the processor to communicate with the backboard via the bridging board. The signal conditioner is electronically connected between the first signal connecting apparatus and the second signal connecting apparatus to amplify signals transmitted from the processor to the hard disk backboard.

Abstract: A method, computer program product, and computing system for receiving a Mode Select command concerning a single LUN from each of a plurality of potential hosts. Each Mode Select command defines control information and host identifier information concerning the potential host associated with the Mode Select command. The received Mode Select commands are processed serially and in accordance with the order in which the Mode Select commands were received. The first Mode Select command received is accepted and subsequent Mode Select commands received are rejected, thus defining an accepted Mode Select command and one or more rejected Mode Select commands. The control information and host identifier information included within the accepted Mode Select command are written to a buffer associated with the single LUN. The buffer includes a control field and a GUID field.

Abstract: Techniques are provided for managing, within a storage system, the sequence in which I/O requests are processed by the storage system based, at least in part, on one or more logical characteristics of the I/O requests. The logical characteristics may include, for example, the identity of the user for whom the I/O request was submitted, the service that submitted the I/O request, the database targeted by the I/O request, an indication of a consumer group to which the I/O request maps, the reason why the I/O request was issued, a priority category of the I/O request, etc. Techniques are also provided for automatically establishing a scheduling policy within a storage system, and for dynamically changing the scheduling policy in response to changes in workload.

Abstract: Methods, systems, and computer program products are provided for minimizing latency in a implementation where a peripheral device is used as a capture device and a compute device such as a GPU processes the captured data in a computing environment. In embodiments, a peripheral device and GPU are tightly integrated and communicate at a hardware/firmware level. Peripheral device firmware can determine and store compute instructions specifically for the GPU, in a command queue. The compute instructions in the command queue are understood and consumed by firmware of the GPU. The compute instructions include but are not limited to generating low latency visual feedback for presentation to a display screen, and detecting the presence of gestures to be converted to OS messages that can be utilized by any application.

Abstract: A hybrid drive includes multiple parts: a performance part (e.g., a flash memory device) and a base part (e.g., a magnetic or other rotational disk drive). A drive access system, which is typically part of an operating system of a computing device, issues input/output (I/O) commands to the hybrid drive to store data to and retrieve data from the hybrid drive. The drive access system assigns, based on various available information, a priority level to groups of data identified by logical block addresses (LBAs). With each I/O command, the drive access system includes an indication of the priority level of the LBA(s) associated with the I/O command. The hybrid drive determines, based on the priority level indications received from the drive access system, which LBAs are stored on which part or parts of the hybrid drive.

Abstract: An electronic device executes a software application that includes instructions for updating firmware of a peripheral device and one or more firmware images. The electronic executes the firmware update instructions to initiate the firmware update of the peripheral device and transfers a firmware image from the software application to the peripheral device according to a response from the peripheral device. The software application sends information to the peripheral device for verifying the transferred firmware image and causes the peripheral device to use the transferred firmware image upon successful verification.

Abstract: This invention controls data transmission from a data source to a sink. The data source buffers the data. The data source signaling to transmit data upon storing a burst amount of data. The data source may include a plurality of data sources. A merge unit merges data by receiving and retransmitting data from each data source which signals to transmit and inserting a source identity block each time the merged data is received from a different source.

Abstract: System and method for interfacing with a medical device having a host device and a communication module. The host device has a user interface configured to input and display information relating to the interfacing with the medical device. The communication module is locally coupled to the host device and configured to communicate wirelessly with the medical device. The system, implemented by the host device and the communication module, is configured to communicate with the medical device with functions. The system, implemented by at least one of the host device and the communication module, has a security condition. At least one of the functions is disabled, at least in part, from operating on the system based upon the security condition.

Abstract: Management of data communication between a peripheral device and host computer system is provided. A peripheral device exposes to a host computer system multiple interfaces for data communication between the peripheral device and the host computer system. The multiple interfaces are exposed over a single physical interface between the peripheral device and the host computer system, for communicating data between the peripheral device and multiple applications executing on the host computer system. The multiple interfaces can include a data collection interface facilitating collection of data from the peripheral device by an application of the multiple applications executing on the host computer system.

Abstract: Technologies are generally described for methods and systems effective to provide accelerator buffer access. An operating system may allocate a range of addresses in virtual address spaces and a range of addresses in a buffer mapped region of a physical (or main) memory. A request to read from, or write to, data by an application may be read from, or written to, the virtual address space. A memory management unit may then map the read or write requests from the virtual address space to the main or physical memory. Multiple applications may be able to operate as if each application has exclusive access to the accelerator and its buffer. Multiple accesses to the buffer by application tasks may avoid a conflict because the memory controller may be configured to fetch data based on respective application identifiers assigned to the applications. Each application may be assigned a different application identifier.

Abstract: An embodiment of the present invention provides an apparatus, comprising a network adapter configured for wireless communication using more than one technology using distributed management and wherein the network adapter is configured to share a plurality of shared hardware components by automatically turning all other comms to OFF when one comm is turned to ON.

Abstract: Program execution with improved power efficiency including a computer program that for performing a method that includes determining a current power state of a processor. Low power state instructions of an application are executed on the processor in response to determining that the current power state of the processor is a low power state. Executing the low power state instructions includes collecting hardware state data, storing the hardware state data, and performing a task. High power state instructions of the application are executed on the processor in response to determining that the current power state of the processor is a high power state. Executing the high power state instructions includes performing the task using the stored hardware state data as an input.

Abstract: A method for redirecting I/O (Input/Output) sequences. A computer platform is initialized. If the computer platform is enabled for command packet rerouting, the platform firmware may be used to install a runtime enable block I/O interface and a standard UNDI (Universal Network Device Interface) interface for routing I/O requests to a network controller or an out-of-band processor may be used to route I/O requests to a network interface controller. The routing of the I/O requests to the network controller or network interface controller enables the computer platform to boot from a remote block I/O storage device.

Abstract: Delay commands are injected into sequential input/output (I/O) requests and the effects of the injected delay commands are measured for determining whether a storage system handling the sequential input/output (IO) requests is causing a bottleneck.

Abstract: A microcontroller includes a central processing unit (CPU); a plurality of peripheral units; and a peripheral trigger generator comprising a user programmable state machine, wherein the peripheral trigger generator is configured to receive a plurality of input signals and is programmable to automate timing functions depending on at least one of said input signals and generate at least one output signal.

Abstract: Various techniques are provided to support efficient data transfers over serial data streams. In one example, a serial device may be used to efficiently transfer data between a host device and the serial device over a data stream of a serial interface. A data stream value identifying the data stream may be stored in a register indexed by a tag associated with a command received from the host device. The command may be passed to a storage media device, wherein the passing is controlled by a processor of the serial device. The tag may be extracted from an address value received from the storage media device in response to execution of the command by the storage media device. The data stream value may be retrieved from the register using the extracted tag as an index without requiring an interrupt to the processor to determine the data stream value.

Abstract: A function executing apparatus includes: a communication device which communicates with an external device; a function executing device which executes at least one preset function; and a controller. The controller determines whether the communication device can communicate with the external device. When the communication device can communicate with the external device, the controller executes a running-state determination processing for determining whether an application program corresponding to a certain function to be executed by the function executing device is running on the external device. When the application program corresponding to the certain function is running, the controller controls the function executing device to execute the certain function.

Abstract: Disclosed is a method for sharing input/output ports among inverters. A sharing method by a master inverter according to the present disclosure is such that data to be outputted to an output port of a slave inverter is transmitted to the slave inverter where data inputted to input port of the slave inverter is received. Furthermore, a sharing method by the slave inverter is such that data transmitted along with a request frame is outputted to an output port in case of receiving the request frame requesting use of the output port from the master inverter, where data used by the master inverter among data received from input port is transmitted to the master inverter.

Abstract: Embodiments of the invention include a communication interface and protocol for allowing communication between devices, circuits, integrated circuits and similar electronic components having different communication capacities or clock domains. The interface supports communication between any components having any difference in capacity and over any distance. The interface utilizes request and acknowledge phases and signals and an initiator-target relationship between components that allow each side to throttle the communication rate to an accepted level for each component or achieve a desired bit error rate.

Abstract: A system and method for allowing individual register access during system integration and test is disclosed. A Chip select is routed between an OMAP processor and a waveform FPGA and configured to allow individual register access during system integration and test. Logic is then added to the FPGA to support the single access to the FPGA's peripherals. This allows the user connected to the debug port to be able to send and receive individual commands to and from the waveform FPGA's peripherals. A Graphical User Interface (GUI) maybe developed to provide a graphical interface or scripts may be used to assemble multiple commands thereby increasing flexibility to configure the peripherals during integration and troubleshooting.

Abstract: A data transmission device and a command merging method for data transmission are provided. The data transmission device includes a command register and a command merging unit. The command register receives and temporary storages a plurality of original commands, wherein the original commands include a plurality of memory blocks. When the command merging unit judges these memory blocks of the original commands to be a continuous memory block, the command merging unit merges the original commands into a merging command, and transmits the merging command to a peripheral device. Thus, the multiple commands send by the host can be analyzed and merged by the data transmission device to decrease a number of the commands to be proceed by the peripheral device, so as to speed up a command processing time of the peripheral device efficiently.

Abstract: Each communication path between controllers and a plurality of storage devices has a plurality of expanders coupled in series. In order to shorten the time during which the communication path is not used for I/O, either (A) the length of time for which I/O suppression is set for the communication path is shortened, or (B) the overall time it takes for processing other than I/O processing is shortened. In the (A), a determination as to whether or not the coupling between the expanders has been disconnected is made for the I/O-suppressed communication path, and in a case where the result of this determination is negative, a discover process is carried out after releasing the I/O suppression with respect to this communication path. In the (B), the number of command issue times of updating routing control information of the expander is reduced.

Abstract: A computer program product is provided for performing an input/output (I/O) operation initiated by an I/O operation instruction at a host computer system configured for communication with a control unit. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing: receiving, by the control unit, a transport mode command message from a channel subsystem of the host computer system, the command message include a command for data to be transferred between the host computer system and an I/O device controlled by the control unit; and sending a command retry message to the channel subsystem, the command retry message including a request that the command message be re-sent to the control unit and a reason code indicating a reason for the request.

Abstract: A single command initiates a first read operation and sequence of one or more additional read operations from the same portion of memory. The one or more additional read operations are terminable after the first read operation provides a first plurality of data values that is made available to a requesting device and/or module. In some implementations, the first plurality of data values includes hard information values. Subsequent pluralities of data values are generated from the same portion of memory until a terminating event occurs. In some implementations, until a terminating event occurs, a respective hybrid plurality of data values is generated by combining the latest read plurality of data values with one of a previously generated hybrid plurality of data values and the first plurality of data values. Each hybrid plurality of data values is representative of a corresponding plurality of soft information values.

Abstract: Embodiments relate to first-in-first-out (FIFO) queue based command spreading. An aspect includes receiving a plurality of commands by a first level priority stage of a memory control unit (MCU), wherein each of the plurality of commands is associated with one of a plurality of ports located on a buffer chip. Another aspect includes storing each of the plurality of commands in a FIFO queue of a plurality of FIFO queues in the MCU, wherein each of the plurality of commands is assigned to a FIFO queue based on the command's associated port, and each of the plurality of FIFO queues is associated with a respective one of the plurality of ports located on the buffer chip. Another aspect includes selecting a FIFO queue of the plurality of FIFO queues and forwarding a command from the selected FIFO queue to the buffer chip by the second level priority stage.

Abstract: A data processing device includes a plurality of devices, a processor core, a memory, and a queue manager. The processor core stores one or more commands in a command queue of the memory to be executed by the plurality of devices to implement a data transfer path. The queue manager stores a frame queue for each of the plurality of devices. Each frame queue includes a first field having a pointer to an address of the command queue, and a second field to identify a next-in-sequence frame queue. A first device stores a data descriptor in the frame queue of the second device to initiate a data transfer from the first device to the second device. The data descriptor includes a field to indicate an offset value from the address of the command queue to a location of a command to be executed by the second device.

Abstract: An operating system of a device receives, from an application executing on that device, data that identifies a category of hardware resources that the application needs to use in order to function. That category is mapped to a specified set of hardware resources of the device. The operating system also receives, from the application, data that identifies a mode. The mode corresponds to an intended use of a set of hardware resources and is mapped to a group of hardware resource settings that are consistent with the intended use. The operating system allocates, to the application, a particular set of hardware resources that are mapped to the category. The operating system configures one or more hardware resources in the particular set of hardware resources in conformity with a particular group of settings that are mapped to the mode.

Abstract: A computer-implemented method to recover from slow or stuck SCSI commands is disclosed. The method starts with monitoring execution time of an operation by a small computer system interface (SCSI) target processor within a SCSI target, where the SCSI target is communicatively coupled with a SCSI initiator through a set of communication links, where the operation is associated with a service offered by the SCSI target, and where the operation is performed for executing SCSI commands associated with the service. When the execution time of the operation exceeds a first threshold, the method proceeds with performing a first escalating action to reduce workload of the SCSI target processor. When the execution time of the operation exceeds a second threshold, the method further proceeds with performing a second escalating action that is different from the first escalating action to reduce workload of the SCSI target processor.

Abstract: The disclosed embodiments relate to a system for controlling accesses to one or more memory devices. This system includes one or more write queues configured to store entries for write requests, wherein a given entry for a write request includes an address and write data to be written to the address. The system also includes a search mechanism configured to receive a read request which includes an address, and to search the one or more write queues for an entry with a matching address. If a matching address is found in an entry in a write queue, the search mechanism is configured to retrieve the write data from the entry and to cancel the associated write request, whereby the read request can be satisfied without accessing the one or more memory devices.

Abstract: A determination unit determines the type of a command received via a communication interface. A counting unit counts, among commands received via the communication interface, the number of commands currently being executed. A control unit performs, when the number of commands currently being executed is less than or equal to a limit value corresponding to the type of a command received via the communication interface, data access to a memory device according to the received command. In addition, the control unit prevents the data access according to the received command when the number of commands currently being executed exceeds the limit value corresponding to the type of the received command.

Abstract: The present invention relates to an apparatus and method offering a specialized modular sled systems for combination, both in a physically proximate sense, and electronically peripheral devices such as a compact bar code scanner, magnetic strip reader, IC card reader, RF tag reader, charging base, multi-threat monitors, biometric verification modules, etc., without the need for cables, and with structural capabilities that offer the ability for a user to employ the same in substantially simultaneous fashion through a consolidated physical integration that eliminates awkward manual manipulation of the same.

Abstract: A dongle adapter system is described that is configured to communicate in a first direction using a first communications protocol and to communicate in a second direction using a second communications protocol. Communications in the first direction employ a conventional communications protocol, such as the Universal Serial Bus (“USB”) protocol. Communications in the second direction employs an Auxiliary Interface Bus (“AIB”) protocol; in some embodiments, the employed AIB protocol may be proprietary. A translator associated with the dongle adapter translates communications between the first communications protocol and the second communications protocol. The dongle adapter allows a peripheral device organiclly configured for the second communications protocol to function without modification in computing networks whose communications operate on the first communications protocol.

Abstract: A mechanism for facilitating dynamic timestamp-less clock generation for transmitting media streams over shared channels is described. In one embodiment, a method includes periodically counting and producing, at a first media device, a number of audio/video (“A/V”) samples, generating a pace clock based on the number of A/V samples, generating a target clock based on the pace clock, and transmitting an A/V media stream based on a frequency difference between a pace frequency relating to the pace clock and a target frequency relating to the target clock.

Abstract: Migrating data from a source storage device to a target storage device includes creating new paths to the target storage device, setting the target storage device to a state where I/O operations are initially accepted, where accepted I/O operations are rejected some time after acceptance, setting the source storage device to a state where at least some I/O operations are rejected, transferring metadata corresponding to the source storage device to the target storage device, where state information is transferred from the source storage device to the target storage device and setting the target storage device to a state where I/O operations are accepted and performed. Migrating data from a source storage device to a target storage device may also include creating new volumes on the target storage device and transferring data from the source storage device to the target storage device.

Abstract: Embodiments relate to first-in-first-out (FIFO) queue based command spreading. An aspect includes receiving a plurality of commands by a first level priority stage of a memory control unit (MCU), wherein each of the plurality of commands is associated with one of a plurality of ports located on a buffer chip. Another aspect includes storing each of the plurality of commands in a FIFO queue of a plurality of FIFO queues in the MCU, wherein each of the plurality of commands is assigned to a FIFO queue based on the command's associated port, and each of the plurality of FIFO queues is associated with a respective one of the plurality of ports located on the buffer chip. Another aspect includes selecting a FIFO queue of the plurality of FIFO queues and forwarding a command from the selected FIFO queue to the buffer chip by the second level priority stage.

Abstract: A method for achieving atomicity while inspecting a running computer process using a copy-on-write process in a supervisor to generate a copy of a target's memory page being written to, prior to executing the write, the copy along with any unwritten to memory pages in the target being mapped to a measurement agent (MA) and used to reflect the state of the target at a particular moment in time which state when observed by the MA provides an atomic runtime inspection.

Abstract: A semiconductor device includes a resistance variable element including a free magnetic layer, a tunnel barrier layer and a pinned magnetic layer; and a magnetic correction layer disposed over the resistance variable element to be separated from the resistance variable element, and having a magnetization direction which is opposite to a magnetization direction of the pinned magnetic layer.

Abstract: A technique includes executing at least one instruction on a processor to control a driver circuit; and in response to a predetermined trigger condition, asynchronously causing the driver circuit to enter a predetermined state.

Abstract: A device or “dongle” (30) is provided for controlling communications between a Subscriber Identity Module (or SIM) (12), such as of the type used in a GSM cellular telephone system, and a computer, such as a WINDOWS® operating system-based PC (10). The SIM (12) can be authenticated by the telephone network, in the same way as for authenticating SIMs of telephone handset users in the network, and can in this way authenticate the user of the PC (10) or the PC (10) itself. Such authentication can, for example, permit use of the PC (10) for a time-limited session in relation to a particular application which is released to the PC (10) after the authentication is satisfactorily completed. The application may be released to the PC (10) by a third party after and in response to the satisfactory completion of the authentication process. A charge for the session can be debited to the user by the telecommunications network and then passed on to the third party.

Abstract: A computer system for obtaining vital product data (VPD) of a non-active component installed in the computer system. The computer system includes an active component, wherein the active component includes an optical sensor, wherein the optical sensor is positioned such that the optical sensor is able to scan an optically machine-readable representation of VPD of a non-active component when the non-active component is installed in the computer system, and wherein the non-active component includes the optically machine-readable representation of the VPD of the non-active component. The computer system is operable to scan the optically machine-readable representation of the VPD of the non-active component, decode the optically machine-readable representation of the VPD to determine the VPD of the non-active component, and store the determined VPD of the non-active component.

Abstract: An information processing apparatus includes a first device initialization unit configured to perform an initialization process for recognizing one or more first devices that include a device storing an application, a second device initialization unit configured to perform an initialization process for recognizing a second device that is different from the one or more first devices, an application initialization unit configured to perform an initialization process for reading out the application from the one or more first devices and executing the application, and an initialization control unit configured to, after the initialization process by the first device initialization unit is performed, control to cause the initialization process by the application initialization unit to proceed in parallel with the initialization process by the second device initialization unit.

Abstract: According to one embodiment, a semiconductor memory device includes a memory cell array, a first buffer, a second buffer, an interface unit and a controller. Data is transferred between the interface unit and the first buffer. The controller controls the first buffer, the second buffer and the interface unit. When receiving a first command and first data at a test time, the controller transfers the first data to the first buffer via the interface unit. When receiving a second command as a dummy command, the controller reads second data from the memory cell array to the second buffer and, at the same time, outputs first data held in the first buffer via the interface unit.

Abstract: Buffer circuitry 14 is provided with shared buffer circuitry 20 which stores, in order of reception time, data transaction requests received from one or more data transaction sources. The buffer circuitry 14 operates in either a bypass mode or a non-bypass mode. When operating in the bypass mode, any low latency data transaction requests stored within the shared buffer circuitry are selected in order for output in preference to data transaction requests that are not low latency data transaction requests. In the non-bypass mode, transactions (whether or not they are low latency transactions) are output from the shared buffer circuitry 20 in accordance with the order in which they are received into the shared buffer circuitry 20. The switch between the bypass mode and the non-bypass mode is made in dependence upon comparison of a detected rate of output of low latency data transaction requests compared to a threshold value.

Abstract: Apparatus, systems, and methods are disclosed that operate within a memory to execute internal commands, to suspend the execution of commands during a transfer period, and to execute external commands following the transfer period. Additional apparatus, systems, and methods are disclosed.

Abstract: An apparatus includes one local input/output device; and an interface configured to interface between an application hosted by the apparatus and the local input/output device and is configured to interface between the application hosted by the apparatus and a remote input/output device hosted by another apparatus; wherein the interface has a first state in which the interface is configured to couple the application and the local input/output device but not couple the application and the remote input/output device hosted by the another apparatus; wherein the interface has a second state in which the interface is configured to couple the application and the local input/output device and to couple the application and the remote input/output device hosted by another apparatus; and wherein the interface is configured to be responsive to a proximity detection trigger.

Abstract: A method and an apparatus for adjusting an input/output (I/O) channel on a virtual platform, and the method for adjusting an I/O channel includes: counting, by a host, current average I/O throughput of multiple virtual machines (VMs) operating on the host; increasing or decreasing, by the host, working threads for processing the VMs between front devices and back devices of the multiple VMs according to the current average I/O throughput; and adjusting, by the host, a mapping relationship between queues in the front device, queues in the back devices of the multiple VMs, and working threads for processing the VMs. According to the present invention, when the I/O throughput decreases, idle I/O channel resources are released, thereby avoiding a waste of the I/O channel resources; when the I/O throughput increases, the I/O channel resources are increased, resulting in an improved data transmission capability of the I/O channels.

Abstract: Methods, apparatus and computer program products implement embodiments of the present invention that include configuring a first storage system as a proxy for a logical volume stored on a second storage system. The first computer system receives an I/O request from a host computer for the logical volume, the host computer, and identifies a port on the second storage system for the I/O request. In some embodiments, the second storage system has multiple SCSI ports, and the identified port comprises a least busy SCSI port. A probe request verifying availability of the logical volume is conveyed to the identified port, and upon receiving a response from the second storage system verifying the availability of the logical volume for the I/O request, the I/O request is conveyed to the identified port, a result of the I/O request is received from the identified port, the result is conveyed to the host computer.

Abstract: The invention relates to a token for communicating with a host device. The token includes an interface for communicating through at least one USB communication channel. The token is adapted to receive, through at least one USB communication channel, a command for requesting the token to specify at least one capability of the token, and send, through at least one USB communication channel, as a reply to the received command, a response for specifying that the token supports a USB device class for HID. The invention also relates to corresponding communication system and method.

Abstract: There is provided a data processing method of a client terminal that communicates with a server, including: receiving a data request message for requesting data of a USB device connected to the client terminal, from the server, the data request message including information about a size of data that is to be read from the USB device; acquiring data corresponding to the size of data included in the data request message, from the USB device; deciding a size of data that is able to be additionally transmitted from the USB device, according to operation states of other USB devices connected to the client terminal; and transmitting a data transmission completion message to the server, wherein the data transmission completion message includes information about the size of data that is able to be additionally transmitted, and the data acquired from the USB device.

Abstract: An enhanced general input/output communication architecture, protocol and related methods are presented.