Analog-to-digital Or Digital-to-analog Patents (Class 710/69)
  • Patent number: 10091251
    Abstract: In one aspect there is provided a host device having: a modem interface arranged to transmit transmission units between the host device and a modem; a communication function configured to generate primitives to establish a communication event between the host device and a remote device; a client agent connected to receive control primitives from the communication function and operable to convert the control primitives to data transmission units; a host routing interface operable to route data transmission units from the client agent according to a predetermined route option which is set based on whether a communication event control function for processing the data transmission units is located on the host device or the modem.
    Type: Grant
    Filed: April 4, 2013
    Date of Patent: October 2, 2018
    Assignee: Nvidia Corporation
    Inventors: Thomas Fleury, Flavien Delorme
  • Patent number: 9876035
    Abstract: A TFT substrate and a manufacturing method thereof are provided. The TFT substrate includes a plurality of vias formed in a second insulation layer that is formed on a second metal layer that forms peripheral signal wiring traces of the TFT substrate so as to line up in an extension direction of each of the peripheral signal wiring traces and a third metal layer that is formed on the second insulation layer at a location corresponding to each of the peripheral signal wiring traces such that the third metal layer is connected, through the vias, with each of the peripheral signal wiring traces to thereby reduce the electrical resistance of each of the peripheral signal wiring traces and thus lowering down power consumption of control ICs and improving capability of the TFT substrate for resisting electrostatic discharge.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: January 23, 2018
    Assignee: WUHAN CHINA STAR OPROELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Liang Ma
  • Patent number: 9411752
    Abstract: An A/D conversion device includes an input-data storage unit storing therein a plurality of digital values obtained after A/D conversion so that each of the digital values is positioned at a fixed address according to a delay amount, a coefficient-data storage unit, a coefficient-data computation unit that, when a digital-filter process performing request is inputted, calculates an order and a filter coefficient based on a filter characteristic set beforehand, arranges calculated filter coefficients in order of delay amount, respectively, and stores the filter coefficients in the coefficient-data storage unit so that each filter coefficient is positioned at a fixed address according to the corresponding delay amount, and a digital-filter computation unit respectively reading a digital value from the input-data storage unit and a filter coefficient from the coefficient-data storage unit for each delay amount and performing a filter computation based on the read values for each delay amount.
    Type: Grant
    Filed: November 1, 2012
    Date of Patent: August 9, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventor: Kentaro Togano
  • Patent number: 9280495
    Abstract: An A/D conversion device includes an input-data storage unit storing therein a plurality of digital values obtained after A/D conversion so that each of the digital values is positioned at a fixed address according to a delay amount, a coefficient-data storage unit, a coefficient-data computation unit that, when a digital-filter process performing request is inputted, calculates an order and a filter coefficient based on a filter characteristic set beforehand, arranges calculated filter coefficients in order of delay amount, respectively, and stores the filter coefficients in the coefficient-data storage unit so that each filter coefficient is positioned at a fixed address according to the corresponding delay amount, and a digital-filter computation unit respectively reading a digital value from the input-data storage unit and a filter coefficient from the coefficient-data storage unit for each delay amount and performing a filter computation based on the read values for each delay amount.
    Type: Grant
    Filed: November 1, 2012
    Date of Patent: March 8, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventor: Kentaro Togano
  • Patent number: 9076066
    Abstract: A computerized method determines a similarity between a first image and a second image. The first image is converted into a first grayscale image, and the second image is converted into a second grayscale image. A first feature vector of the first grayscale image and a second feature vector of the second grayscale image are extracted. A similarity value is calculated indicating the similarity between the first image and the second image according to the first feature vector and the second feature vector. If the similarity value is greater than or equal to the predetermined threshold, the first image is similar to the second image and a determination result is outputted denoting the first image is similar to the second image.
    Type: Grant
    Filed: December 8, 2013
    Date of Patent: July 7, 2015
    Assignees: Fu Tai Hua Industry (Shenzhen) Co., Ltd., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Jian-Jian Zhu, Yu-Kai Xiong, Xin Lu, Hui-Feng Liu
  • Patent number: 9032116
    Abstract: A device comprises a central processing unit (CPU) and a memory configured for storing memory descriptors. The device also includes an analog-to-digital converter controller (ADC controller) configured for managing an analog-to-digital converter (ADC) using the memory descriptors. In addition, the device includes a direct memory access system (DMA system) configured for autonomously sequencing conversion operations performed by the ADC without CPU intervention by transferring the memory descriptors directly between the memory and the ADC controller for controlling the conversion operations performed by the ADC.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: May 12, 2015
    Assignee: Atmel Corporation
    Inventors: Frode Milch Pedersen, Romain Oddoart, Cedric Favier
  • Patent number: 8930591
    Abstract: An apparatus includes a microcontroller unit (MCU). The MCU includes a buffer and an analog comparator that are coupled to an input of the MCU. The MCU is adapted to selectively determine a logic value of a digital signal applied to the input of the MCU from an output signal of the buffer or from an output signal of the analog comparator.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: January 6, 2015
    Assignee: Silicon Laboratories Inc.
    Inventor: Alan Westwick
  • Patent number: 8930598
    Abstract: A computer switching device is disclosed which enables switching between a local computer and a secure computer connected through a network. The device sits like a keyboard-video-mouse (KVM) and optionally audio device between the local computer and the local input/output devices, but connects to the secure computer through a network. Access to the secure computer is pre-configured in the switching device through access and security settings for a specific user to the specific secure computer. The switching device specifically prevents access to the secure computer by the local computer, printer, or storage devices such as fixed or removable media drives. Tamper detection is included to disable secure access on any tampering with the switching device.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: January 6, 2015
    Assignee: Sujiyama, Inc.
    Inventor: Vale Sundaravel
  • Patent number: 8918546
    Abstract: An electronic apparatus such as an audio apparatus enables both digital and analog data to be communicated over a data bus such as a universal serial bus (USB) with a single low-cost connector such as a USB connector. According to an exemplary embodiment, the electronic apparatus includes a connector operative to couple the electronic apparatus to one of a digital device and an analog device. A controller is operative to determine whether the connector is coupled to the digital device or the analog device. A switch is operative to couple the connector to one of a digital element and an analog element responsive to the determination.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: December 23, 2014
    Assignee: Thomson Licensing
    Inventors: Sin Hui Cheah, Ronald Alexander Fleming
  • Patent number: 8918565
    Abstract: An adapter that fits to a touchscreen of a tablet computer or mobile phone enabling input and output to and from the device. Output is achieved by a plurality of phototransistors arranged in a matrix which interpret a plurality of video image dots, squares or groups of pixels on the tablet computer or mobile phone touchscreen converting them to 1s (ones) or 0s (zeroes). Input is achieved by a plurality of conductors which are selectively electrified by control electronics to a charge sufficient to disrupt the field or capacitance of the touchscreen finger tip sense at a plurality of locations on the screen. A program(s) on the tablet computer or mobile phone interprets the electronically controlled touches as data.
    Type: Grant
    Filed: May 19, 2012
    Date of Patent: December 23, 2014
    Inventor: Robert Dennis Kennedy
  • Patent number: 8904070
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an analog to digital converter circuit, and a magneto-resistive adjustment circuit. The analog to digital converter circuit is operable to convert an input signal into corresponding digital samples. The magneto-resistive adjustment circuit is operable to reduce signal asymmetry in the digital samples due to sensing by a magneto-resistive head to yield a corrected output.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: December 2, 2014
    Assignee: LSI Corporation
    Inventors: Nayak Ratnakar Aravind, Yu Liao, Haitao Xia
  • Patent number: 8874814
    Abstract: One switch-state aggregation technique uses a digital-to-analog converter in combination with an analog-to-digital converter to aggregate the state of a plurality of switches. Another switch-state aggregation technique uses input/output lines of a processor to aggregate the state of a plurality of switches and to communicate data other than the state of the switches. These techniques can be used to aggregate information about whether a plug or other connector is inserted into the ports of a patch panel or other telecommunication or communication assembly, system, or device.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: October 28, 2014
    Assignee: ADC Telecommunications, Inc.
    Inventors: Joseph C. Coffey, Nasser Pooladian
  • Publication number: 20140258569
    Abstract: The present invention provides a signal processing system and associated method. The signal processing system includes converter(s) for conversion between digital and analog, each converter includes multiple serially coupled units forming multiple frequency interfaces respectively associating with different frequencies, and each converter is partitioned, at a selected frequency interface, to a first portion and a second portion respectively formed in the first chip and the second chip. The partitioning frequency interface is selected to reduce implement cost.
    Type: Application
    Filed: February 6, 2014
    Publication date: September 11, 2014
    Applicant: MEDIATEK INC.
    Inventors: Chien-Chung Yang, Chia-Feng Chiang, Chien-Ming Chen
  • Patent number: 8825913
    Abstract: A universal quick port switching method and an associated apparatus are provided. An apparatus for universally and quickly detecting port switching includes a plurality of resistors for receiving a plurality of ground signals from a plurality of receiving ports, respectively; a divided-voltage detecting circuit coupled to the resistors, for generating a predictable divided voltage; and an analog-to-digital converter coupled to the divided-voltage detecting circuit, for generating a digital output according to the predictable divided voltage. The detecting apparatus determines whether the receiving ports are active or not according to the digital output.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: September 2, 2014
    Assignee: MStar Semiconductor, Inc.
    Inventor: Meng Che Tsai
  • Patent number: 8806093
    Abstract: To address the need for efficient and reliable testing of integrated devices, system on chips, and computers, deterministic behavior for an interface is accomplished by fixing variation in latency associated with receiver and transmitter data stream. The interface may be a serial interface that is PCIe compliant and corrects latency variations in the receiver that consequently results in deterministic transmit data. Consequently, the data received and/or transmitted is predictable with respect to time and facilitates testing and validation of the devices and logic associated with the interface.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: August 12, 2014
    Assignee: Intel Corporation
    Inventors: Bibbin Chacko, Guadalupe J. Garcia, Saurabh Upadhyay
  • Publication number: 20140207982
    Abstract: A signal processing system having a bus node, which is designed for signal conversion between signals of an internal and an external bus system and in each case includes at least one interface to be coupled to the external bus system and to the internal bus system, and having at least one signal conditioning module, which is designed for physical conditioning and/or analog/digital conversion for signals from an external component and includes an interface for an internal bus system and at least one connection for the external component and is connected to the bus note via the internal bus system. The bus node is designed for internal raw data processing of the signals provided by the signal conditioning module and to output at least one output signal dependent on the processed signals to the internal and/or to the external bus system.
    Type: Application
    Filed: July 6, 2012
    Publication date: July 24, 2014
    Inventor: Uwe Graff
  • Patent number: 8782291
    Abstract: In some embodiments, a notebook including a content source (e.g., a DVD or other display data source), mass storage device (e.g., hard disk drive), auxiliary display subsystem (including an auxiliary processor), PC chipset, a multiplexer between the content source, auxiliary processor, and PC chipset, and another multiplexer between the mass storage device, auxiliary processor and PC chipset, and methods implemented thereby. The auxiliary display subsystem can be operable (without communicating with the notebook's CPU) when the notebook is in a low-power state.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: July 15, 2014
    Assignee: NVIDIA Corporation
    Inventors: Arman Toorians, Jason Kim
  • Patent number: 8775694
    Abstract: A device comprises a central processing unit (CPU) and a memory configured for storing memory descriptors. The device also includes an analog-to-digital converter controller (ADC controller) configured for managing an analog-to-digital converter (ADC) using the memory descriptors. In addition, the device includes a direct memory access system (DMA system) configured for autonomously sequencing conversion operations performed by the ADC without CPU intervention by transferring the memory descriptors directly between the memory and the ADC controller for controlling the conversion operations performed by the ADC.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: July 8, 2014
    Assignee: Atmel Corporation
    Inventors: Frode Milch Pedersen, Romain Oddoart, Cedric Favier
  • Patent number: 8775703
    Abstract: A D/A conversion device includes a waveform-data-string storage area that stores therein a waveform data string including a plurality of digital values, a waveform-output-control-data storage area in which operation-mode specifying data and update request data are written, a digital-value output unit that, when the operation-mode specifying data specifies an automatic control mode, while sequentially updating an address to be read in the waveform-data-string storage area for each output period set in advance, sequentially reads and outputs a digital value and that, when the operation-mode specifying data specifies a step execution mode or an output-address change mode, while updating the address to be read at a timing when the update request data is written, reads and outputs the digital value, and a D/A conversion unit that converts the digital value output from the digital-value output unit into an analog value.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: July 8, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kentaro Togano, Satoru Ukena
  • Patent number: 8742968
    Abstract: An analog front end (AFE) device has at least one programmable analog-to-digital converter (ADC) and a serial interface switchable to operate in a bidirectional serial interface mode and in a unidirectional two wire serial interface mode, wherein the unidirectional two wire serial interface mode only uses a clock input and a data output signal line, wherein the ADC operates in the unidirectional two wire serial interface mode synchronous with a clock supplied to the clock input.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: June 3, 2014
    Assignee: Microchip Technology Incorporated
    Inventor: Vincent Quiquempoix
  • Publication number: 20140149607
    Abstract: A data transfer method of a storage device which includes a host bus adaptor to communicate with an external host via a first interface and to communicate internally via a second interface is provided. The data transfer method may include issuing a write command and a read command to the host bus adaptor; performing a read direct memory access operation using the first interface in response to the write command and simultaneously performing a write direct memory access operation using the second interface in response to the read command; and generating frame information structure (FIS) sequences according to the second interface in response to the issued write command and the issued read command. The first interface may perform a full duplex data transfer and the second interface may perform a half-duplex data transfer.
    Type: Application
    Filed: September 27, 2013
    Publication date: May 29, 2014
    Inventors: Hojun SHIM, Eunchan KIM
  • Patent number: 8719471
    Abstract: Apparatus and methods are provided for alleviating processing requirements of a central computer in a vessel. Each apparatus is placed in close proximity to one or more pieces of electronic equipment implementing a legacy interface. The apparatus processes data to and from the electronic equipment, including converting data to formats consistent with the formats used by the intended recipient.
    Type: Grant
    Filed: December 7, 2009
    Date of Patent: May 6, 2014
    Assignee: Advanced Fusion Technologies
    Inventors: James Fleming, David McKean
  • Patent number: 8713226
    Abstract: The invention concerns a device for transmitting data between a serial data bus and working modules, wherein the data bus is connected to a bus node in a bus module having at least two serial communication ports which are connected to ports of a hub connected to or integrated with the bus node, wherein the communication ports are designed for the connection and for the power supply of the working modules and wherein at least one of the working modules is designed as an actuator and/or I/O module comprising a serial-to-parallel converter for the parallel connection of actuators and/or I/O interfaces provided on or connected to the respective working module.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: April 29, 2014
    Assignee: Festo AG & Co. KG
    Inventor: Uwe Graff
  • Patent number: 8706930
    Abstract: A KVM switch includes: a first input portion and a second input portion that inputs a plurality of video signals from the first and the second information processing apparatus, respectively; a converting portion that converts the video signals input from the first or second input portion into a plurality of pieces of image data which are capable of being displayed on a remote terminal; a transmitting and receiving portion that transmits the pieces of converted image data to the remote terminal, and receives various requests from the remote terminal; and a switching portion that switches the video signals input from the first input portion to the video signals input from the second input portion when the transmitting and receiving portion receives a switching request for switching from a first information processing apparatus to a second information processing apparatus from the remote terminal.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: April 22, 2014
    Assignee: Fujitsu Component Limited
    Inventors: Kenichi Fujita, Yu Sato, Naoyuki Nagao
  • Patent number: 8688876
    Abstract: An adapter for providing connectivity between a host connector of a host device and an accessory connector of an accessory that is incompatible with the host connector is described. The adapter can include a host interface connector that is compatible with the host connector, and an accessory interface connector that is compatible with the accessory connector of the accessory. The adapter may further include an identification module that can provide adapter identification information to a host device connected to the host interface connector, and may also include an authentication module that can authenticate an accessory connected to the accessory interface connector.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: April 1, 2014
    Assignee: Apple Inc.
    Inventors: Daniel J. Fritchman, Tony Chi Wang Ng, Jeffrey J. Terlizzi, Scott Krueger
  • Publication number: 20140075064
    Abstract: An information processing device includes a first functional section having an external terminal, and a second functional section and a third functional section, which are commonly coupled to the external terminal of the first functional section. The first functional section includes a first internal circuit that is associated with the second functional section, a second internal circuit that is associated with the third functional section, a switch that can select the first internal circuit or the second internal circuit, and a switch control circuit that controls the operation of the switch. While the second functional section is enabled, the switch control circuit controls the switch so that the first internal circuit is coupled to the second functional section. While the third functional section is enabled, the switch control circuit controls the switch so that the second internal circuit is coupled to the third functional section.
    Type: Application
    Filed: September 12, 2013
    Publication date: March 13, 2014
    Applicant: Renesas Electronics Corporation
    Inventor: Kiyoshi MINEGISHI
  • Patent number: 8631176
    Abstract: A main processor manages serial communication with one or more external devices by establishing the requisite tasks needed for serial communications. For example, these tasks can include (1) serial device handling, (2) protocol encapsulation, and (3) low-level communication with external devices. A priority is assigned to each of the tasks so that timing requirements are met, while maximizing processor efficiency of the main processor. Upon its completion, each lower priority task initiates execution of a next higher priority task to synchronize data processing with data communication.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: January 14, 2014
    Assignee: GVBB Holdings S.A.R.L.
    Inventors: Jody Western Lewis, Kerry Lynn Riggs
  • Patent number: 8601187
    Abstract: A serial interface circuit which can adapt to various frame formats to reduce the load on a CPU. The interface circuit includes a rewritable control register used for programmably specifying a field structure to be targeted for processing out of structures of fields preceding a data field of a frame as defined by a communication protocol. The interface circuit analyzes the field structure preceding the data field according to a setting of the control register. When a destination of a received frame is determined to match an expected value, the interface circuit issues a request for the CPU to process the data field information. After a setting is made on the control register, the serial interface circuit can adapt to various formats of frames as defined by a communication protocol according to the information held there, and can also analyze a destination.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: December 3, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Toshio Otashiro, Takuya Ikeguchi
  • Publication number: 20130311689
    Abstract: An adapter that fits to a touchscreen of a tablet computer or mobile phone enabling input/output to the device for embedded control applications. Output is achieved by a plurality of photo-transistors arranged in a matrix which interpret a plurality of video image dots, squares or groups of pixels on the tablet/mobile phone screen converting them to 1s (ones) or 0s (zeroes). Input is achieved by a plurality of wires (or conductors) insulated from each other by a dielectric and/or capacitive dielectric and arranged in a grid with ground or negative conductors and signal conductors which are selectively electrified by control electronics to a charge sufficient to disrupt the field or capacitance of the touchscreen finger tip sense at a plurality of locations on the screen. An application program(s) on the tablet/mobile phone interprets the electronically controlled touches as digital data.
    Type: Application
    Filed: May 19, 2012
    Publication date: November 21, 2013
    Inventor: Robert Dennis Kennedy
  • Publication number: 20130297840
    Abstract: An intelligent electronic device (IED), e.g., an electrical power meter, having at least one removable memory device for storing data sensed and generated by the intelligent electronic device is provided. The IED includes a housing; at least one sensor; at least one analog-to-digital converter; at least one processing unit coupled to the at least one analog-to-digital converter configured to receive the digital data and store the digital data in a removable memory; and at least one device controller coupled to the at least one processing unit, the at least one device controller including an interface disposed on the housing for interfacing with the removable memory, wherein the at least one device controller is operative as a USB master or USB slave device controller.
    Type: Application
    Filed: March 15, 2013
    Publication date: November 7, 2013
    Inventors: Erran Kagan, Tibor Banhegyesi, Avi Cohen
  • Publication number: 20130262722
    Abstract: A D/A conversion device includes a waveform-data-string storage area that stores therein a waveform data string including a plurality of digital values, a waveform-output-control-data storage area in which operation-mode specifying data and update request data are written, a digital-value output unit that, when the operation-mode specifying data specifies an automatic control mode, while sequentially updating an address to be read in the waveform-data-string storage area for each output period set in advance, sequentially reads and outputs a digital value and that, when the operation-mode specifying data specifies a step execution mode or an output-address change mode, while updating the address to be read at a timing when the update request data is written, reads and outputs the digital value, and a D/A conversion unit that converts the digital value output from the digital-value output unit into an analog value.
    Type: Application
    Filed: March 28, 2012
    Publication date: October 3, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kentaro Togano, Satoru Ukena
  • Patent number: 8504746
    Abstract: An interface device (10) provides fast data communication between a host device with input/output interfaces and a data transmit/receive device, wherein the interface device (10) comprises a processor means (13), a memory means (14), a first connecting device (12) for interfacing the host device with the interface device, and a second connecting device (15) for interfacing the interface device (10) with the data transmit/receive device. The interface device (10) is configured by the processor means (13) and the memory means (14) in such a way that, when receiving an inquiry from the host device via the first connecting device (12) as to the type of a device attached to the host device, regardless of the type of the data transmit/receive device, the interface device sends a signal to the host device via the first connecting device (12) which signals to the host device that it is communicating with an input/output device.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: August 6, 2013
    Assignee: Papst Licensing GmbH & Co. KG
    Inventor: Michael L. Tasler
  • Publication number: 20130198421
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an analog to digital converter circuit, and a magneto-resistive adjustment circuit. The analog to digital converter circuit is operable to convert an input signal into corresponding digital samples. The magneto-resistive adjustment circuit is operable to reduce signal asymmetry in the digital samples due to sensing by a magneto-resistive head to yield a corrected output.
    Type: Application
    Filed: January 31, 2012
    Publication date: August 1, 2013
    Inventors: Nayak Ratnakar Aravind, Yu Liao, Haitao Xia
  • Patent number: 8489784
    Abstract: Embodiments of the invention are generally directed to adaptive interconnection for multimedia devices. An embodiment of an apparatus includes an apparatus that includes one or more ports, the one or more ports including one or more adaptable ports, where each adaptable port includes a receptacle to accept a plug of a connector element, the receptacle including multiple electrical contacts. The apparatus further includes an adaptable port device to process data including multimedia data received at the one or more adaptable ports, where the adaptable port device is to detect a multimedia signal format for multimedia data received at each of the adaptable ports, and adapt each of the adaptable ports to be compatible with the detected multimedia signal format for the adaptable port.
    Type: Grant
    Filed: December 31, 2010
    Date of Patent: July 16, 2013
    Assignee: Silicon Image, Inc.
    Inventor: Graeme Peter Jones
  • Patent number: 8473651
    Abstract: A computer switching device is disclosed which enables switching between a local computer and a secure computer connected through a network. The device sits like a keyboard-video-mouse (KVM) and optionally audio device between the local computer and the local input/output devices, but connects to the secure computer through a network. Access to the secure computer is pre-configured in the switching device through access and security settings for a specific user to the specific secure computer. The switching device specifically prevents access to the secure computer by the local computer, printer, or storage devices such as fixed or removable media drives. Tamper detection is included to disable secure access on any tampering with the switching device.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: June 25, 2013
    Assignee: Clisertec Corporation
    Inventor: Vale Sundaravel
  • Patent number: 8452903
    Abstract: Embodiments disclosed herein provide for capability identification for accessories coupled with a mobile computing device. During capability identification an accessory can request capability information from a mobile computing device. In some embodiments, the accessory can specifically request capability information associated with a specific lingo. In response, the mobile computing device can respond with a message that indicates the capabilities of the mobile computing device that are supported. In some embodiments, the capabilities can be those capabilities associated with the specified lingo. In some embodiments, if the mobile computing device does not support a lingo, then the mobile computing device can respond to the request from the accessory with a negative acknowledgement.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: May 28, 2013
    Assignee: Apple Inc.
    Inventors: Lawrence G. Bolton, Shailesh Rathi, Sylvain R. Y. Louboutin
  • Patent number: 8423692
    Abstract: A method to read information from an information storage medium using a read channel, where that read channel includes a data cache, where the method generates an analog waveform comprising the information, provides that analog waveform to a read channel generates a digital signal from that analog waveform using one or more first operating parameters, corrects that digital signal at an actual error correction rate, determines if the actual error correction rate is greater than an error correction rate threshold. If the actual error correction rate exceeds the error correction rate threshold, then the method captures the digital signal, stores that captured data in a data cache, reads that digital signal from the cache, generates one or more second operating parameters, provides those one or more second operating parameters to the read channel.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: April 16, 2013
    Assignee: International Business Machines Corporation
    Inventors: James J. Howarth, Robert A. Hutchins
  • Patent number: 8417857
    Abstract: An apparatus and method of scheduling signals. In one embodiment, the method includes a first circuit receiving a first plurality of reference values. The first circuit selects a reference value from the first plurality according to a first reference identifier (ID) that is stored in memory. The first circuit compares the selected reference value to a first match value.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: April 9, 2013
    Assignee: Renesas Electronics America Inc.
    Inventors: Samuel J. Guido, Jeremy W. Brodt, Jeffrey T. Sieber
  • Patent number: 8417856
    Abstract: A high speed sensor data transfer interface is described. The interface combines a bridge circuit, carrier voltage source, first order RC high pass filter, reference power supply, Bessel filter, and high-speed analog to digital converter on a single Smart Transducer Interface Module board (STIM) to receive data from sensors. Data from the STIM is transferred to a Network Capable Application Processor (NCAP) having a microprocessor and either a Field Programmable Gate Array or a Complex Programmable Logic Device. The NCAP transfers data to a data exchange network.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: April 9, 2013
    Assignee: Streamline Automation, LLC
    Inventors: Alton Reich, Stephen Doherty, James E. Shaw, III
  • Patent number: 8392056
    Abstract: In a diagnostics system for use on vehicles, wherein the improvement comprises a connector assembly that translates diagnostic connector assembly signals into a digital format suitable for computer based analysis and fault diagnosis on an individual vehicle and vehicle fleet basis.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: March 5, 2013
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Miles Dahl, Richard G. Dickson
  • Patent number: 8369458
    Abstract: A circuit is disclosed that comprises a controller and an analog to digital converter (ADC) coupled to controller. The speed and/or the resolution of the ADC is configurable to provide optimum performance during the operation of the ADC. In an embodiment a wireless receiver with an adaptively configurable ADC for is provided. The speed and resolution the ADC is configurable depending on the operational mode of the receiver. Accordingly, through the use of an adaptively configurable ADC, power consumption and speed is optimized for each operational mode.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: February 5, 2013
    Assignee: Ralink Technology Corporation
    Inventors: Louis Wong, Chungwen Dennis Lo
  • Patent number: 8352652
    Abstract: Methods and systems for communicating information through a USB device with A/D converters are presented. Active components which provide analog signals to the A/D converters are switched off to cause spikes in the analog signals/channels. The spikes are digitized by the A/D converters and sent to the host through a USB interface. The active components are switched on and off in a pattern corresponding to a message, such that the host can determine the message from the resulting spikes. If multiple active components and A/D converters are used, then multiple ‘bits’ can be transmitted simultaneously using the different channels.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: January 8, 2013
    Assignee: Sony Computer Entertainment Inc.
    Inventor: Xiaodong Mao
  • Patent number: 8327048
    Abstract: Methods and systems for communicating information through a USB device using suspend/resume states are presented. A USB host stops transmitting Start-of-Frame (SOF) packets to a USB device, causing the USB device to enter a sleep/suspend state. The USB host then restarts the transmission of SOF packets to trigger the USB device back into a normal/resume state. The USB host repeats this process in a temporal pattern corresponding to a message, such that a circuit monitoring the USB device can determine the message.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: December 4, 2012
    Assignee: Sony Computer Entertainment Inc.
    Inventor: Xiaodong Mao
  • Patent number: 8275918
    Abstract: An environmental condition monitor (200) configured for simple upgrade from analog signal output to any of a plurality of digital communication protocols. A display board (202) includes the analog signal acquisition and processing elements of the device and also includes a pre-positioned but initially inoperative digital communication output connector (214). A connector board (204) associated with the display board includes a connector (212) to which any one of a plurality of digital communication boards (210) may be selectively connected, depending upon which of a plurality of digital communication protocols is desired. Selective connection of a digital communication board completes a circuit whereby an analog output signal is converted to the desired digital output format and is then communicated back to the now-activated digital communication output connector (214).
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: September 25, 2012
    Assignee: Setra Systems, Inc.
    Inventors: Kevin M. Bourbeau, Anthony T. Batista, Eric C. Beishline, Been-Chyuan Lin, Tiago Braz Anes
  • Patent number: 8276007
    Abstract: A processor includes analog signal input ports, an A/D conversion unit, and an ALU in a stage subsequent to the A/D conversion unit, separately from a CPU. The ALU not only stores a comparison result in a RAM independently of the CPU, but also compares an output value of the A/D conversion unit with a reference value set in the RAM, and interrupts the CPU or issues a command to a PWM generator in accordance with a flag based on the comparison result. This realizes high-speed processing in accordance with a change in an analog signal, although the processor has a low cost and a low clock frequency overall.
    Type: Grant
    Filed: June 14, 2010
    Date of Patent: September 25, 2012
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takashi Hara, Koichi Ueki
  • Patent number: 8243922
    Abstract: An end user system comprises a communication interface configured to receive content in a protected state and transfer the content in the protected state, a processing system coupled to the communication interface and configured to receive the content in the protected state, process the content with a key hard coded internally to the processing system to modify the content to an unprotected state, and transfer the content in the unprotected state, and a user interface coupled to the processing system and configured to receive the content in the unprotected state and output the content.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: August 14, 2012
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Curtis H. Bruner, Christopher J. Squires
  • Publication number: 20120159020
    Abstract: There is a need to cause a delay to occur less frequently than the related art during processing of an input signal in need of relatively fast processing. In a semiconductor device, a conversion portion includes first channels and second channels and A/D converts a signal input to a selected channel. A signal input to the first channel requires faster processing than a signal input to the second channel. The conversion portion receives a scan conversion instruction from a central processing unit, sequentially selects the input channels in a specified selection order, and successively performs A/D conversion. In this case, the conversion portion notifies a peripheral circuit of completion of A/D conversion after completion of A/D conversion on signals input to the first channels and before completion of A/D conversion on input signals input to all input channels.
    Type: Application
    Filed: December 20, 2011
    Publication date: June 21, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Daijiro HARADA, Takashi UTSUMI
  • Patent number: 8176225
    Abstract: A method and apparatus for distributing events. In one embodiment, the method includes a bus concurrently transmitting a first event-signal and a first event-identification (event-ID); wherein the first event-signal, when active, indicates that a first event has occurred, is occurring, or should occur. The first event-ID corresponds to the first event-signal.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: May 8, 2012
    Assignee: Renesas Electronics America Inc.
    Inventors: Samuel J. Guido, Jeremy W. Brodt, Jeffrey T. Sieber
  • Patent number: 8166220
    Abstract: A dual-interface connector for providing an interface to a storage device and an interface to a host and for connecting between a storage device and a host includes a storage device interface, for connecting with a storage device, and a host interface, for connecting with a host. A controller is operable in at least two distinct modes of operation. In a first mode of operation, the controller enables a session to be opened, by the host, between the storage device and the host when the storage device is connected to the storage device interface and the host is connected to the host interface. In a second mode of operation, the controller is operative, if an open session exists between the storage device and the host, to maintain the open session between the storage device and the host even after the storage device is disconnected from the storage device interface.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: April 24, 2012
    Assignee: Sandisk IL Ltd.
    Inventors: Shai Ben-Yacov, Itzhak Pomerantz, Judah Gamliel Hahn
  • Patent number: 8156269
    Abstract: A system that includes a multiplexer having an output selectively coupled to a plurality of inputs, a bus coupled to the output of the multiplexer, and first and second circuits configured to generate first and second digital signals, respectively. The first digital signal is related to a rotational angle of a crankshaft at a first point in time, and the second digital signal is related to a value of parameter at the first point in time, wherein the parameter is one other than the rotational angle of the crankshaft. The first and second circuits are coupled directly or indirectly to first and second inputs of the multiplexer.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: April 10, 2012
    Assignee: Renesas Electronics America Inc.
    Inventors: Samuel J. Guido, Jeremy W. Brodt, Jeffrey T. Sieber