Abstract: Methods and systems for transforming at least a portion of a physical document into digital data. One method includes obtaining a first plurality of data items automatically extracted from a first physical document and a validated value for a data field. The method also includes automatically identifying a first linked data item included in the first plurality of data items that is linked to the validated value and setting a physical position included in a rule to the physical position of the first linked data item. In addition, the method includes obtaining a second plurality of data items automatically extracted from a second physical document and automatically identifying a candidate data item included in the second plurality of data items based on the rule. Furthermore, the method includes automatically populating a value for the data field for the second physical document based on the candidate data item.

Abstract: The present invention provides a method and system for processing data from an event, such as a neurological event. When a neurological event occurs, a spike in a neural waveform is generated. The spike can be detected and used to determine information about the neurological event. The method uses data values from a resistive switching component capable of undergoing a resistive state change when a voltage is applied to it. The data values represent a sequence of resistive state changes of the resistive switching component which correspond to the neurological event. The method further comprises processing the received data values to identify a resistive state change corresponding to the neurological event and to obtain information about the neurological event. Thus, a method and system for processing neural spikes is provided.

Abstract: There is provided a frame rate adjusting method of a navigation device including: counting a frame period using a clock of a local oscillator of the navigation device; counting a polling period using the same clock; calculating a difference between the frame period and the polling period; adjusting a frame rate of the navigation device when the difference is smaller than a predetermined margin.

Abstract: Methods and apparatus for detecting possible living body contact at an electrical contact surface is disclosed, comprising sending a non-hazardous probing signal to the contact surface, detecting an electrical response from the contact surface in response to the electrical probing signal, and determining whether a captured responsive signal has characteristics of an expected responsive pulse, and to output a positive output signal indicative of possible living body to mitigate risks of electrical shock.

Abstract: A method for communicating between a microcontroller and a transceiver component. The microcontroller includes a first pin for transmitting output data to the transceiver component. The microcontroller includes a second pin for receiving input data from the transceiver component, which includes a first input for receiving the output data. The transceiver component includes a first output for transmitting the input data. The transceiver component includes an interface for a data bus. The transceiver component transmits output data via the interface and receiving input data via the interface. The transceiver component includes an additional function device with a second input and a second output. Additional data are at least intermittently transferred from the first pin to the second input via the first input, and/or from the second output via the first output to the second pin. A device and a computer program via which this method may be carried out.

Abstract: A reception apparatus includes processing circuitry that receives a predetermined number of audio streams including coded data of a plurality of groups and configuration information of the predetermined number of audio streams. The processing circuitry controls display of a user interface that includes selection information for at least one group from among the plurality of groups based on the configuration information. The processing circuitry receives a user selection operation of a group of the at least one group to be decoded. The processing circuitry fetches audio streams including the group from the predetermined number of audio streams and obtains one audio stream constructed by integrating the fetched audio streams. Further, the processing circuitry inserts a command to selectively decode the coded data of the group from among the predetermined number of groups included in the one audio stream into the one audio stream.

Abstract: A switching device is provided and includes a processor and a physical layer device. The processor is configured to generate a synchronization frame and a corresponding follow up frame. The follow up frame is generated while or subsequent to the generating of the synchronization frame and without waiting for an egress timestamp indicating when the synchronization frame is to be transmitted from the switching device to a network device. The physical layer device is configured to: receive the synchronization and follow up frames from the processor; prior to transmitting the follow up frame to the network device, modify the follow up frame to include the egress timestamp indicating when the synchronization frame is transmitted from the switching device via the physical layer device; and perform a precision time protocol process including transmitting the synchronization and follow up frames from the switching device to the network device for clock synchronization.

Abstract: In one aspect there is provided a host device having: a modem interface arranged to transmit transmission units between the host device and a modem; a communication function configured to generate primitives to establish a communication event between the host device and a remote device; a client agent connected to receive control primitives from the communication function and operable to convert the control primitives to data transmission units; a host routing interface operable to route data transmission units from the client agent according to a predetermined route option which is set based on whether a communication event control function for processing the data transmission units is located on the host device or the modem.

Abstract: A TFT substrate and a manufacturing method thereof are provided. The TFT substrate includes a plurality of vias formed in a second insulation layer that is formed on a second metal layer that forms peripheral signal wiring traces of the TFT substrate so as to line up in an extension direction of each of the peripheral signal wiring traces and a third metal layer that is formed on the second insulation layer at a location corresponding to each of the peripheral signal wiring traces such that the third metal layer is connected, through the vias, with each of the peripheral signal wiring traces to thereby reduce the electrical resistance of each of the peripheral signal wiring traces and thus lowering down power consumption of control ICs and improving capability of the TFT substrate for resisting electrostatic discharge.

Abstract: An A/D conversion device includes an input-data storage unit storing therein a plurality of digital values obtained after A/D conversion so that each of the digital values is positioned at a fixed address according to a delay amount, a coefficient-data storage unit, a coefficient-data computation unit that, when a digital-filter process performing request is inputted, calculates an order and a filter coefficient based on a filter characteristic set beforehand, arranges calculated filter coefficients in order of delay amount, respectively, and stores the filter coefficients in the coefficient-data storage unit so that each filter coefficient is positioned at a fixed address according to the corresponding delay amount, and a digital-filter computation unit respectively reading a digital value from the input-data storage unit and a filter coefficient from the coefficient-data storage unit for each delay amount and performing a filter computation based on the read values for each delay amount.

Abstract: An A/D conversion device includes an input-data storage unit storing therein a plurality of digital values obtained after A/D conversion so that each of the digital values is positioned at a fixed address according to a delay amount, a coefficient-data storage unit, a coefficient-data computation unit that, when a digital-filter process performing request is inputted, calculates an order and a filter coefficient based on a filter characteristic set beforehand, arranges calculated filter coefficients in order of delay amount, respectively, and stores the filter coefficients in the coefficient-data storage unit so that each filter coefficient is positioned at a fixed address according to the corresponding delay amount, and a digital-filter computation unit respectively reading a digital value from the input-data storage unit and a filter coefficient from the coefficient-data storage unit for each delay amount and performing a filter computation based on the read values for each delay amount.

Abstract: A computerized method determines a similarity between a first image and a second image. The first image is converted into a first grayscale image, and the second image is converted into a second grayscale image. A first feature vector of the first grayscale image and a second feature vector of the second grayscale image are extracted. A similarity value is calculated indicating the similarity between the first image and the second image according to the first feature vector and the second feature vector. If the similarity value is greater than or equal to the predetermined threshold, the first image is similar to the second image and a determination result is outputted denoting the first image is similar to the second image.

Abstract: A device comprises a central processing unit (CPU) and a memory configured for storing memory descriptors. The device also includes an analog-to-digital converter controller (ADC controller) configured for managing an analog-to-digital converter (ADC) using the memory descriptors. In addition, the device includes a direct memory access system (DMA system) configured for autonomously sequencing conversion operations performed by the ADC without CPU intervention by transferring the memory descriptors directly between the memory and the ADC controller for controlling the conversion operations performed by the ADC.

Abstract: A computer switching device is disclosed which enables switching between a local computer and a secure computer connected through a network. The device sits like a keyboard-video-mouse (KVM) and optionally audio device between the local computer and the local input/output devices, but connects to the secure computer through a network. Access to the secure computer is pre-configured in the switching device through access and security settings for a specific user to the specific secure computer. The switching device specifically prevents access to the secure computer by the local computer, printer, or storage devices such as fixed or removable media drives. Tamper detection is included to disable secure access on any tampering with the switching device.

Abstract: An apparatus includes a microcontroller unit (MCU). The MCU includes a buffer and an analog comparator that are coupled to an input of the MCU. The MCU is adapted to selectively determine a logic value of a digital signal applied to the input of the MCU from an output signal of the buffer or from an output signal of the analog comparator.

Abstract: An electronic apparatus such as an audio apparatus enables both digital and analog data to be communicated over a data bus such as a universal serial bus (USB) with a single low-cost connector such as a USB connector. According to an exemplary embodiment, the electronic apparatus includes a connector operative to couple the electronic apparatus to one of a digital device and an analog device. A controller is operative to determine whether the connector is coupled to the digital device or the analog device. A switch is operative to couple the connector to one of a digital element and an analog element responsive to the determination.

Abstract: An adapter that fits to a touchscreen of a tablet computer or mobile phone enabling input and output to and from the device. Output is achieved by a plurality of phototransistors arranged in a matrix which interpret a plurality of video image dots, squares or groups of pixels on the tablet computer or mobile phone touchscreen converting them to 1s (ones) or 0s (zeroes). Input is achieved by a plurality of conductors which are selectively electrified by control electronics to a charge sufficient to disrupt the field or capacitance of the touchscreen finger tip sense at a plurality of locations on the screen. A program(s) on the tablet computer or mobile phone interprets the electronically controlled touches as data.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an analog to digital converter circuit, and a magneto-resistive adjustment circuit. The analog to digital converter circuit is operable to convert an input signal into corresponding digital samples. The magneto-resistive adjustment circuit is operable to reduce signal asymmetry in the digital samples due to sensing by a magneto-resistive head to yield a corrected output.

Abstract: One switch-state aggregation technique uses a digital-to-analog converter in combination with an analog-to-digital converter to aggregate the state of a plurality of switches. Another switch-state aggregation technique uses input/output lines of a processor to aggregate the state of a plurality of switches and to communicate data other than the state of the switches. These techniques can be used to aggregate information about whether a plug or other connector is inserted into the ports of a patch panel or other telecommunication or communication assembly, system, or device.

Abstract: The present invention provides a signal processing system and associated method. The signal processing system includes converter(s) for conversion between digital and analog, each converter includes multiple serially coupled units forming multiple frequency interfaces respectively associating with different frequencies, and each converter is partitioned, at a selected frequency interface, to a first portion and a second portion respectively formed in the first chip and the second chip. The partitioning frequency interface is selected to reduce implement cost.

Abstract: A universal quick port switching method and an associated apparatus are provided. An apparatus for universally and quickly detecting port switching includes a plurality of resistors for receiving a plurality of ground signals from a plurality of receiving ports, respectively; a divided-voltage detecting circuit coupled to the resistors, for generating a predictable divided voltage; and an analog-to-digital converter coupled to the divided-voltage detecting circuit, for generating a digital output according to the predictable divided voltage. The detecting apparatus determines whether the receiving ports are active or not according to the digital output.

Abstract: To address the need for efficient and reliable testing of integrated devices, system on chips, and computers, deterministic behavior for an interface is accomplished by fixing variation in latency associated with receiver and transmitter data stream. The interface may be a serial interface that is PCIe compliant and corrects latency variations in the receiver that consequently results in deterministic transmit data. Consequently, the data received and/or transmitted is predictable with respect to time and facilitates testing and validation of the devices and logic associated with the interface.

Abstract: A signal processing system having a bus node, which is designed for signal conversion between signals of an internal and an external bus system and in each case includes at least one interface to be coupled to the external bus system and to the internal bus system, and having at least one signal conditioning module, which is designed for physical conditioning and/or analog/digital conversion for signals from an external component and includes an interface for an internal bus system and at least one connection for the external component and is connected to the bus note via the internal bus system. The bus node is designed for internal raw data processing of the signals provided by the signal conditioning module and to output at least one output signal dependent on the processed signals to the internal and/or to the external bus system.

Abstract: In some embodiments, a notebook including a content source (e.g., a DVD or other display data source), mass storage device (e.g., hard disk drive), auxiliary display subsystem (including an auxiliary processor), PC chipset, a multiplexer between the content source, auxiliary processor, and PC chipset, and another multiplexer between the mass storage device, auxiliary processor and PC chipset, and methods implemented thereby. The auxiliary display subsystem can be operable (without communicating with the notebook's CPU) when the notebook is in a low-power state.

Abstract: A D/A conversion device includes a waveform-data-string storage area that stores therein a waveform data string including a plurality of digital values, a waveform-output-control-data storage area in which operation-mode specifying data and update request data are written, a digital-value output unit that, when the operation-mode specifying data specifies an automatic control mode, while sequentially updating an address to be read in the waveform-data-string storage area for each output period set in advance, sequentially reads and outputs a digital value and that, when the operation-mode specifying data specifies a step execution mode or an output-address change mode, while updating the address to be read at a timing when the update request data is written, reads and outputs the digital value, and a D/A conversion unit that converts the digital value output from the digital-value output unit into an analog value.

Abstract: A device comprises a central processing unit (CPU) and a memory configured for storing memory descriptors. The device also includes an analog-to-digital converter controller (ADC controller) configured for managing an analog-to-digital converter (ADC) using the memory descriptors. In addition, the device includes a direct memory access system (DMA system) configured for autonomously sequencing conversion operations performed by the ADC without CPU intervention by transferring the memory descriptors directly between the memory and the ADC controller for controlling the conversion operations performed by the ADC.

Abstract: An analog front end (AFE) device has at least one programmable analog-to-digital converter (ADC) and a serial interface switchable to operate in a bidirectional serial interface mode and in a unidirectional two wire serial interface mode, wherein the unidirectional two wire serial interface mode only uses a clock input and a data output signal line, wherein the ADC operates in the unidirectional two wire serial interface mode synchronous with a clock supplied to the clock input.

Abstract: A data transfer method of a storage device which includes a host bus adaptor to communicate with an external host via a first interface and to communicate internally via a second interface is provided. The data transfer method may include issuing a write command and a read command to the host bus adaptor; performing a read direct memory access operation using the first interface in response to the write command and simultaneously performing a write direct memory access operation using the second interface in response to the read command; and generating frame information structure (FIS) sequences according to the second interface in response to the issued write command and the issued read command. The first interface may perform a full duplex data transfer and the second interface may perform a half-duplex data transfer.

Abstract: Apparatus and methods are provided for alleviating processing requirements of a central computer in a vessel. Each apparatus is placed in close proximity to one or more pieces of electronic equipment implementing a legacy interface. The apparatus processes data to and from the electronic equipment, including converting data to formats consistent with the formats used by the intended recipient.

Abstract: The invention concerns a device for transmitting data between a serial data bus and working modules, wherein the data bus is connected to a bus node in a bus module having at least two serial communication ports which are connected to ports of a hub connected to or integrated with the bus node, wherein the communication ports are designed for the connection and for the power supply of the working modules and wherein at least one of the working modules is designed as an actuator and/or I/O module comprising a serial-to-parallel converter for the parallel connection of actuators and/or I/O interfaces provided on or connected to the respective working module.

Abstract: A KVM switch includes: a first input portion and a second input portion that inputs a plurality of video signals from the first and the second information processing apparatus, respectively; a converting portion that converts the video signals input from the first or second input portion into a plurality of pieces of image data which are capable of being displayed on a remote terminal; a transmitting and receiving portion that transmits the pieces of converted image data to the remote terminal, and receives various requests from the remote terminal; and a switching portion that switches the video signals input from the first input portion to the video signals input from the second input portion when the transmitting and receiving portion receives a switching request for switching from a first information processing apparatus to a second information processing apparatus from the remote terminal.

Abstract: An adapter for providing connectivity between a host connector of a host device and an accessory connector of an accessory that is incompatible with the host connector is described. The adapter can include a host interface connector that is compatible with the host connector, and an accessory interface connector that is compatible with the accessory connector of the accessory. The adapter may further include an identification module that can provide adapter identification information to a host device connected to the host interface connector, and may also include an authentication module that can authenticate an accessory connected to the accessory interface connector.

Abstract: An information processing device includes a first functional section having an external terminal, and a second functional section and a third functional section, which are commonly coupled to the external terminal of the first functional section. The first functional section includes a first internal circuit that is associated with the second functional section, a second internal circuit that is associated with the third functional section, a switch that can select the first internal circuit or the second internal circuit, and a switch control circuit that controls the operation of the switch. While the second functional section is enabled, the switch control circuit controls the switch so that the first internal circuit is coupled to the second functional section. While the third functional section is enabled, the switch control circuit controls the switch so that the second internal circuit is coupled to the third functional section.

Abstract: A main processor manages serial communication with one or more external devices by establishing the requisite tasks needed for serial communications. For example, these tasks can include (1) serial device handling, (2) protocol encapsulation, and (3) low-level communication with external devices. A priority is assigned to each of the tasks so that timing requirements are met, while maximizing processor efficiency of the main processor. Upon its completion, each lower priority task initiates execution of a next higher priority task to synchronize data processing with data communication.

Abstract: A serial interface circuit which can adapt to various frame formats to reduce the load on a CPU. The interface circuit includes a rewritable control register used for programmably specifying a field structure to be targeted for processing out of structures of fields preceding a data field of a frame as defined by a communication protocol. The interface circuit analyzes the field structure preceding the data field according to a setting of the control register. When a destination of a received frame is determined to match an expected value, the interface circuit issues a request for the CPU to process the data field information. After a setting is made on the control register, the serial interface circuit can adapt to various formats of frames as defined by a communication protocol according to the information held there, and can also analyze a destination.

Abstract: An adapter that fits to a touchscreen of a tablet computer or mobile phone enabling input/output to the device for embedded control applications. Output is achieved by a plurality of photo-transistors arranged in a matrix which interpret a plurality of video image dots, squares or groups of pixels on the tablet/mobile phone screen converting them to 1s (ones) or 0s (zeroes). Input is achieved by a plurality of wires (or conductors) insulated from each other by a dielectric and/or capacitive dielectric and arranged in a grid with ground or negative conductors and signal conductors which are selectively electrified by control electronics to a charge sufficient to disrupt the field or capacitance of the touchscreen finger tip sense at a plurality of locations on the screen. An application program(s) on the tablet/mobile phone interprets the electronically controlled touches as digital data.

Abstract: An intelligent electronic device (IED), e.g., an electrical power meter, having at least one removable memory device for storing data sensed and generated by the intelligent electronic device is provided. The IED includes a housing; at least one sensor; at least one analog-to-digital converter; at least one processing unit coupled to the at least one analog-to-digital converter configured to receive the digital data and store the digital data in a removable memory; and at least one device controller coupled to the at least one processing unit, the at least one device controller including an interface disposed on the housing for interfacing with the removable memory, wherein the at least one device controller is operative as a USB master or USB slave device controller.

Abstract: A D/A conversion device includes a waveform-data-string storage area that stores therein a waveform data string including a plurality of digital values, a waveform-output-control-data storage area in which operation-mode specifying data and update request data are written, a digital-value output unit that, when the operation-mode specifying data specifies an automatic control mode, while sequentially updating an address to be read in the waveform-data-string storage area for each output period set in advance, sequentially reads and outputs a digital value and that, when the operation-mode specifying data specifies a step execution mode or an output-address change mode, while updating the address to be read at a timing when the update request data is written, reads and outputs the digital value, and a D/A conversion unit that converts the digital value output from the digital-value output unit into an analog value.

Abstract: An interface device (10) provides fast data communication between a host device with input/output interfaces and a data transmit/receive device, wherein the interface device (10) comprises a processor means (13), a memory means (14), a first connecting device (12) for interfacing the host device with the interface device, and a second connecting device (15) for interfacing the interface device (10) with the data transmit/receive device. The interface device (10) is configured by the processor means (13) and the memory means (14) in such a way that, when receiving an inquiry from the host device via the first connecting device (12) as to the type of a device attached to the host device, regardless of the type of the data transmit/receive device, the interface device sends a signal to the host device via the first connecting device (12) which signals to the host device that it is communicating with an input/output device.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an analog to digital converter circuit, and a magneto-resistive adjustment circuit. The analog to digital converter circuit is operable to convert an input signal into corresponding digital samples. The magneto-resistive adjustment circuit is operable to reduce signal asymmetry in the digital samples due to sensing by a magneto-resistive head to yield a corrected output.

Abstract: Embodiments of the invention are generally directed to adaptive interconnection for multimedia devices. An embodiment of an apparatus includes an apparatus that includes one or more ports, the one or more ports including one or more adaptable ports, where each adaptable port includes a receptacle to accept a plug of a connector element, the receptacle including multiple electrical contacts. The apparatus further includes an adaptable port device to process data including multimedia data received at the one or more adaptable ports, where the adaptable port device is to detect a multimedia signal format for multimedia data received at each of the adaptable ports, and adapt each of the adaptable ports to be compatible with the detected multimedia signal format for the adaptable port.

Abstract: A computer switching device is disclosed which enables switching between a local computer and a secure computer connected through a network. The device sits like a keyboard-video-mouse (KVM) and optionally audio device between the local computer and the local input/output devices, but connects to the secure computer through a network. Access to the secure computer is pre-configured in the switching device through access and security settings for a specific user to the specific secure computer. The switching device specifically prevents access to the secure computer by the local computer, printer, or storage devices such as fixed or removable media drives. Tamper detection is included to disable secure access on any tampering with the switching device.

Abstract: Embodiments disclosed herein provide for capability identification for accessories coupled with a mobile computing device. During capability identification an accessory can request capability information from a mobile computing device. In some embodiments, the accessory can specifically request capability information associated with a specific lingo. In response, the mobile computing device can respond with a message that indicates the capabilities of the mobile computing device that are supported. In some embodiments, the capabilities can be those capabilities associated with the specified lingo. In some embodiments, if the mobile computing device does not support a lingo, then the mobile computing device can respond to the request from the accessory with a negative acknowledgement.

Abstract: A method to read information from an information storage medium using a read channel, where that read channel includes a data cache, where the method generates an analog waveform comprising the information, provides that analog waveform to a read channel generates a digital signal from that analog waveform using one or more first operating parameters, corrects that digital signal at an actual error correction rate, determines if the actual error correction rate is greater than an error correction rate threshold. If the actual error correction rate exceeds the error correction rate threshold, then the method captures the digital signal, stores that captured data in a data cache, reads that digital signal from the cache, generates one or more second operating parameters, provides those one or more second operating parameters to the read channel.

Abstract: An apparatus and method of scheduling signals. In one embodiment, the method includes a first circuit receiving a first plurality of reference values. The first circuit selects a reference value from the first plurality according to a first reference identifier (ID) that is stored in memory. The first circuit compares the selected reference value to a first match value.

Abstract: A high speed sensor data transfer interface is described. The interface combines a bridge circuit, carrier voltage source, first order RC high pass filter, reference power supply, Bessel filter, and high-speed analog to digital converter on a single Smart Transducer Interface Module board (STIM) to receive data from sensors. Data from the STIM is transferred to a Network Capable Application Processor (NCAP) having a microprocessor and either a Field Programmable Gate Array or a Complex Programmable Logic Device. The NCAP transfers data to a data exchange network.

Abstract: In a diagnostics system for use on vehicles, wherein the improvement comprises a connector assembly that translates diagnostic connector assembly signals into a digital format suitable for computer based analysis and fault diagnosis on an individual vehicle and vehicle fleet basis.

Abstract: A circuit is disclosed that comprises a controller and an analog to digital converter (ADC) coupled to controller. The speed and/or the resolution of the ADC is configurable to provide optimum performance during the operation of the ADC. In an embodiment a wireless receiver with an adaptively configurable ADC for is provided. The speed and resolution the ADC is configurable depending on the operational mode of the receiver. Accordingly, through the use of an adaptively configurable ADC, power consumption and speed is optimized for each operational mode.

Abstract: Methods and systems for communicating information through a USB device with A/D converters are presented. Active components which provide analog signals to the A/D converters are switched off to cause spikes in the analog signals/channels. The spikes are digitized by the A/D converters and sent to the host through a USB interface. The active components are switched on and off in a pattern corresponding to a message, such that the host can determine the message from the resulting spikes. If multiple active components and A/D converters are used, then multiple ‘bits’ can be transmitted simultaneously using the different channels.

Abstract: Methods and systems for communicating information through a USB device using suspend/resume states are presented. A USB host stops transmitting Start-of-Frame (SOF) packets to a USB device, causing the USB device to enter a sleep/suspend state. The USB host then restarts the transmission of SOF packets to trigger the USB device back into a normal/resume state. The USB host repeats this process in a temporal pattern corresponding to a message, such that a circuit monitoring the USB device can determine the message.