Abstract: Disclosed is a computer-readable medium containing program instructions for configuring a first computer so that a first telephony client on the first computer may securely communicate with a second telephony client on a second computer via a communication path. The computer-readable medium includes computer code for inserting a security algorithm within the communication path. The security algorithm facilitates secure communication between the first and second telephony clients such that more than a single type of telephony client may be implemented. In a specific embodiment, the security algorithm is inserted within the first computer's operating system kernel.

Abstract: A multi-chip module instrument controller having various interface and operational capabilities. The controller incorporate a microprocessor and both volatile and non-volatile memories. The controller includes variable analog-to-digital conversion bit depths, with higher bit depths for some applications. Additionally, the controller includes a separately controllable field programmable gate array that acts as a parallel processor with internal or separate external clock. The FPGA preferably includes more than thirty thousand gates (30,000) and adds a freely re-configurable and separately programmable multi-purpose digital system that can run independent of the microprocessor.

Abstract: An integrated circuit is configured to receive encoded digital data from a system controller over a single signal line. The system controller encodes the digital data into a singular analog quantity such as a voltage, a current, a sine wave frequency, a sine wave amplitude, a pulse train frequency, or a pulse train duty cycle. The encoded digital data is transmitted to the signal line. The integrated circuit decodes the digital data from the signal line. The decoded digital data is employed by the integrated circuit to adjust one or more parameters of the integrated circuit. In one example, one or more parameters may be adjusted to select various operating modes for the integrated circuit. The singular analog quantity encoding/decoding methodology may be extended to more than one signal line when desirable.

Abstract: An integrated circuit having statistical processing capability. The integrated circuit has an input for receiving input data in a first data domain. A data converter is provided for converting received input data from the first domain to a second domain different from the first domain. A statistical processor is provided for obtaining statistical information from the output of the data converter and processing the obtained statistical information in accordance with a predetermined processing algorithm. An output on the integrated circuit allow access of the processed statistical information by the statistical processor external to the integrated circuit.

Abstract: A digital signal processor receives 1-bit audio signals acquired by sigma modulation and sent over a predetermined transmission line and makes a changeover between the audio signal and a mute pattern includes an IEEE 1394 interface. The IEEE 1394 interface receives an isochronous packet sent over an IEEE 1394-formatted transmission line, extracts music data from the packet, supplies the music data to a DRAM, monitors the amount of data stored in the DRAM, reads a 1-bit digital signal or generates a mute pattern such as a 9-6 pattern, and makes a changeover between the 1-bit digital signal read from the DRAM and mute pattern while fading them. The digital signal processor further includes a D-A converter to convert the 1-bit digital signal supplied from the IEEE 1394 interface into an analog signal.

Abstract: The apparatus and method for transferring audio data to a data recorder adopting a personal computer bus to receive audio data enters into data communication mode over a bus without conducting preparation steps for transferring data when a record request is received. The preparation steps include occupying the bus and issuing packet commands. Real-time data such as an audio signal are transferred with no delay to a general optical disk driver satisfying the personal computer (PC) bus interfacing requirement. This allows adoption of a general disk driver for data recording instead of an exclusive audio disk driver, thereby reducing manufacturing cost of a digital audio recorder and enabling the disk driver installed in a digital audio recorder to be used in other devices such as a PC.

Abstract: A speaker system that detects what type of audio signal is supplied to it and automatically adjusts to reproduce sound from either an analog audio input signal or a digital audio input signal. The speaker system has one or more converters to convert each form of digital audio into analog audio, a detection means to detect whether an analog audio input signal or one of the possible digital audio signals is present and a multiplexer to switch between either the analog audio input signal or one of the outputs of the digital audio converters. Amplifier and speaker drivers are shown for completeness.

Abstract: A communications system includes physical layer hardware and a processing unit. The physical layer hardware is adapted to communicate data over a communications channel in accordance with a plurality of control codes. The physical layer hardware is adapted to demodulate an incoming analog signal to generate a digital receive signal and modulate a digital transmit signal to generate an analog transmit signal. The processing unit is adapted to execute a privileged driver for interfacing with the physical layer hardware. The privileged driver includes program instructions for implementing a protocol layer to decode the digital receive signal, encode the digital transmit signal, and configure the physical layer hardware for receipt of the digital receive signal and transmission of the digital transmit signal based on the plurality of control codes.

Abstract: A device for converting joystick controller generated analog and digital signals into Universal Serial Bus (USB) format, or for converting imported pulse position modulated (PPM) encoded signals from an external radio control (RC) transmitter into USB format data. The device is used, in an embodiment, for controlling simulated RC model aircraft as displayed, for example on a personal computer screen through the use of computer software. In an embodiment, the device includes a pair of two-axis gimbals, an auxiliary channel control potentiometer, and various control key switches to generate analog and digital joystick type signals as a result of direct manipulation by a user. The device also includes microcontroller circuitry for importing PPM signals, such as PPM signals generated by a commercially available model aircraft RC transmitter, to a USB port signal for interface with a computer.

Abstract: DMA controller for mixed signal device. A mixed signal integrated circuit with memory control is disclosed. A data conversion circuit is provided that is operable to receive an analog input signal and convert discrete samples thereof at a predetermined sampling rate to a digital representations thereof as a plurality of digital words. A memory stores the digital words generated by the data conversion circuit. A processor is included on the integrated circuit and operable to access the memory to output select ones of the digital words for processing thereof in accordance with a predetermined processing algorithm. A memory access controller controls access to the memory by the data conversion circuit and the processor.

Abstract: A disc drive, which inputs and outputs signals by an earphone jack. The signal processing circuit includes a digital-to-analog converter, a memory for storing firmware programs, a signal switch device, and an earphone jack coupled to the signal switch device. When the signal switch device is coupled to the digital-to-analog converter, an audio signal is output from the disc drive through the earphone jack. When the signal switch device is coupled to the signal processing circuit, a digital signal is input or output to/from the disc drive through the earphone jack.

Abstract: A touch sensor system and a method of operating the system is provided to detect the touch of a person. An AC power source is provided with an isolated power supply connected to thereto with a DC voltage source output. The DC voltage source is referenced to ground. An impedance limiting circuit is connected to the output of the DC voltage source. An analog-to-digital converter is connected to the impedance limiting circuit. A processor is connected to the analog-to-digital converter with the touch sensor connected to the impedance limiting circuit. The touch sensor is capacitively coupled to the AC power source. The waveform output of touch sensor is monitored and with the waveform output as an OFF reference waveform when the touch sensor is not being touched and the waveform output is stable being calculated and saved.

Abstract: The present invention discloses methods and systems for discovering printers and shares on a computer network. Each domain on the network is identified, and each computer in the domain is identified. In addition, each printer connected to the computer and each share on the computer is identified. Shortcuts to the identified printers and shares are created on at least one computer on the network. Moreover, drivers are preferably installed on the computer for each printer for which a shortcut was created. In the event that the total number of resources (i.e., shares and/or printers) exceeds a threshold, then the process terminates. Otherwise, the present invention continues until all printers and shares on the network are identified, and the appropriate shortcuts are created. Thus, the present invention provides methods and systems for discovering resources on a network.

Abstract: A digital-to-analog converter for generating output waveforms with less distortion without the need for high-speed components. The digital-to-analog converter comprises a D/A converter, four voltage holding sections, four step function waveform generators, a voltage summing section, two integrators and a timing controller. The voltages corresponding to four sequential digital data inputs are held in the voltage holding sections, respectively, and the step function generators generate step function waveforms at the voltage levels corresponding to the held voltages. The voltage summing section combines the step function waveforms generated in the step function waveform generators, and two integrators integrate this combined waveform two times, thus producing a continuous analog voltage composed of the input digital data.

Abstract: An integrated circuit having statistical processing capability. The integrated circuit has an input for receiving input data in a first data domain. A data converter is provided for converting received input data from the first domain to a second domain different from the first domain. A statistical processor is provided for obtaining statistical information from the output of the data converter and processing the obtained statistical information in accordance with a predetermined processing algorithm. An output on the integrated circuit allow access of the processed statistical information by the statistical processor external to the integrated circuit.

Abstract: A plurality of digital-analog converters and analog-digital converters are connected in the data lines between the connection contacts and the memory cells of a memory device. The memory can be read, written to and actuated by analog data transfers instead of the previous digital signals. The same volume of data, for which a plurality of connection contact areas were normally required, can thus be read via just one connection contact. Addressing the memory cells requires no more than respective contact areas for the analog row address and the analog column address, which are converted into digital addresses using analog-digital converters.

Abstract: In order to connect a control signal processing system of a device, which does not have a control signal processing system for coding and processing a control signal, to a control signal processing system for coding and processing such a control signal, circuitry is added to the existing control signal processing systems for delivering mutual signals between a control signal processing system (1) for coding and processing control signals such as VISCA and a control signal processing system for processing a signal representing information as a signal level value. It thus becomes possible to connect control signals of a device (30, 37, 38) which does not have a control signal processing system for coding and processing the control signal to a control signal processing system (1) for coding and processing the control signal.

Abstract: The present invention provides a network device interface and method for digitally connecting a plurality of data channels, such as sensors, actuators, and subsystems, to a controller using a network bus. The network device interface interprets commands and data received from the controller and polls the data channels in accordance with these commands. Specifically, the network device interface receives digital commands and data from the controller, and based on these commands and data, communicates with the data channels to either retrieve data in the case of a sensor or send data to activate an actuator. Data retrieved from the sensor is then converted by the network device interface into digital signals and transmitted back to the controller. In one advantageous embodiment, the network device interface uses a specialized protocol for communicating across the network bus that uses a low-level instruction set and has low overhead for data communication.

Abstract: An integrated circuit including a DMA controller, an ADC having a plurality of conversion channels and address and data ports for connection to external memory means, the DMA controller being arranged to read a channel id from the memory means using the address and data port which channel id is representative of one of the said conversion channels, to pass the read channel id to the ADC, to cause the ADC to perform an analog-to-digital-conversion on the conversion channel represented by the channel id, to receive the conversion result from the ADC and to write the conversion result back to the memory means using the address and data ports.

Abstract: The present invention provides for a dual sequencer for use in a peripheral storage device system, as well as a new protocol for data retrieval/storage in peripheral storage device systems. The system provides for more efficient media storage/retrieval and addresses the issue of channel latencies in media storage/retrieval systems.

Abstract: A mechanism for transmitting from a sensor assembly to an acquisition system a message that includes self-describing information is provided. The sensor assembly monitors elements, such as pipes and wells, and detects analog values, such as temperature or pressure, emanating from the elements. The sensor assembly translates the analog values into digital values, creates messages that include information that uniquely identifies the sensor assembly and the digital values, where the information and the digital values are self-described, and transmits the messages to an acquisition system.

Abstract: A data capture system (1) has modular amplifier circuits (10) connected to modular capture circuits (11) within a rotor 2. Each capture circuit (11) has an FPGA (26) operation according to low-frequency and high-frequency state machines (M1, M2) to control ADCs (25) and upload from memories (30) to a host (15) During sampling, each FPGA (26) runs through a ready mode, a sampling mode, and again a ready mode according to a host command.

Abstract: A peripheral video conferencing system is housed in a peripheral housing and adapted for communication with an analog or digital communication channel and a separate host computer system. Audio, video, and data file information is transmitted to and received from a remote conferencing site over the communication channel. A plurality of audio, video, and communication channel connectors provide means for acquiring source audio and video signals, and respectively displaying on a separate monitor and broadcasting over an internal or separate external speaker remote video images and audio. A high-speed output interface provides connectivity with the separate host computer system for coordinating, in cooperation with video conferencing application software operating thereon, the presentation of local and remote NTSC or PAL video images on a display coupled to the computer system.

Abstract: The present invention provides for the compression of digital and analog data for storage and transmission. Analog data in the form of an analog signal is converted into a digital signal by an analog-to-digital converter. The digital signal is then converted into an analog signal having an alternating frequency by a first converter processor and an alternating frequency generator according to a predetermined conversion table. To reproduce the original analog signal, the analog signal having an alternating frequency is first converted back into a digital signal by an alternating frequency measurement means connected to a second converter processor, also in accordance with the predetermined conversion table. The digital signal is then converted to the original analog signal by a digital-to-analog converter.

Abstract: A signal processing apparatus includes a first signal processor which processes a first channel of signal; and a second signal processor which processes a second channel of signal independently from the processing by the first signal processor.

Abstract: A terminal connection box for connecting a computer and an external peripheral device. The terminal connection box comprises: a plurality of side walls forming a housing, an enhanced signal circuit located inside the housing for converting and boosting signals, a first cable connecting the enhanced signal circuit and the computer, and a 1394 type plug connecting the enhanced signal circuit and the external peripheral device. The 1394 type signals coming from the external peripheral device are boosted and converted by the enhanced signal circuit so as to be compatible to the computer. Signals coming from the computer are boosted and converted into 1394 type signals by the enhanced signal circuit so as to be compatible to the external peripheral device. Such that the external peripheral device and the computer can perform bi-directional intercommunications with their signal boosted by the enhanced signal circuit.

Abstract: An analog translator for the IEEE 1394 serial bus by which it is possible to use an analog device as a part of a home network when the analog device is connected to the IEEE 1394 serial bus and a translating method thereof are provided.

Abstract: The circuit arrangement serves to identify an input signal (s1) assigned to a predetermined signal class. It comprises signal-matching electronics (1) responsive to a current component and/or a voltage component of the input signal (s1) and providing a corresponding output signal (s2). By means of signal recognition electronics (2) of the circuit arrangement, the output signal (s2) is transformed into a recognition signal (c1) representative of the signal class.

Abstract: Monitoring a converter (1) includes detecting whether a value of an input variable (2) for the converter (1) assumes a first prescribed input reference value (41) and checking whether an output variable (3) from the converter (1) likewise assumes a corresponding, second prescribed output reference value (61). This means that the operation of the converter is tested only at occasional instants, specifically only using individual, prescribed values. The fact that only prescribed values (41, 61) are compared with instantaneous values of the input and output variables (2, 3) means that the invention can be implemented using very simple means. The method is particularly suitable for monitoring the operation of a converter (1) in a control or protective device for an electrical switchgear assembly. In this context, when a malfunction in the converter (1) is detected, all protective functions which are dependent on the converter (1) are preferably turned off.

Abstract: A monitor comprising two-way (plug and play) interface. A two-way interface is added in the monitor to achieve the function of mutual communication between a host hardware and monitor. Using the two-way interface, the specification data parameters are transferred to the host hardware, so that the host hardware can easily obtain the specification data parameters. Furthermore, the host hardware can send the parameters to the monitor controller to adjust the image data that meet the specification of the monitor to achieve the function and objective of plug-in of the monitor.

Abstract: A speaker system that detects what type of audio signal is supplied to it and automatically adjusts to reproduce sound from either an analog audio input signal or a digital audio input signal. The speaker system has one or more converters to convert each form of digital audio into analog audio, a detection means to detect whether an analog audio input signal or one of the possible digital audio signals is present and a multiplexer to switch between either the analog audio input signal or one of the outputs of the digital audio converters. Amplifier and speaker drivers are shown for completeness.

Abstract: A method and apparatus are provided to allow at least portions of two fieldbus messages to be stored in a fieldbus device. The fieldbus device includes a media access unit, a fieldbus communication controller, and a controller. The media access unit is coupleable to a fieldbus loop to receive fieldbus signals and provide a digital bitstream related to the fieldbus signals. The fieldbus communication controller assembles data segments relating to at least portions of two fieldbus messages from the bitstream and stores the segments in a receive FIFO memory. The controller is adapted: to read the segments from the receive FIFO memory and act upon fieldbus messages.

Abstract: An integrated circuit for graphics processing that includes a configurable display interface includes video graphics circuitry, a data encoder, transmission circuitry and configuration registers. The video graphics circuitry produces video data that is formatted to drive a display. The data encoder is operably coupled to the video graphics circuitry and encodes the digital video data to produce transmission data. The transmission data is then provided to the transmission circuitry operably coupled to the data encoder. The transmission circuitry combines the transmission data with control information that is retrieved from registers included in the integrated circuit. The transmission circuitry transmits the transmission data over a plurality of differential signals, where the swing amplitude of the differential signals is configured using additional registers included in the integrated circuit.

Abstract: In one embodiment, a single designated register in a codec is utilized by a controller to address and control a large number of expansion registers belonging to various expansion devices. The controller can write to or read from the designated register through an AC-link while complying with the AC '97 specification. The address and data bits in the designated register are used to write to or read from a target register in an expansion device. The designated register is selected from one of the 16 registers available to a design engineer in accordance with the AC '97 specification. An example of an expansion device that can be addressed and controlled through the designated register is an SSD device. In another embodiment, two designated registers in the codec register set are utilized. The controller can write address information into one of the designated registers while complying with the AC '97 specification.

Abstract: A peripheral video conferencing system is housed in a peripheral housing and adapted for communication with an analog or digital communication channel and a separate host computer system. Audio, video, and data file information is transmitted to and received from a remote conferencing site over the communication channel. A plurality of audio, video, and communication channel connectors provide means for acquiring source audio and video signals, and respectively displaying on a separate monitor and broadcasting over an internal or separate external speaker remote video images and audio. A high-speed output interface provides connectivity with the separate host computer system for coordinating, in cooperation with video conferencing application software operating thereon, the presentation of local and remote NTSC or PAL video images on a display coupled to the computer system.

Abstract: A data processor having: a peripheral circuit for selecting one of input terminals such as input channels, processing input data from the selected input terminal, requesting the transfer of the processing result, and outputting identification information (CH2 to CH0) which permits the identification of the selected input terminal; and a data transfer control circuit comprising a destination address register (DAR) with its low-order bits variable according to the identification information from the peripheral circuit, whereby the low-order bits of destinations can be controlled by the peripheral circuit in the transfer control circuit. The peripheral circuit is not required to comprise data registers for storing an input data processing result for each input terminal in one-to-one correspondence with the input terminals.

Abstract: Innovative techniques, systems and methods are described that enable media content to be packaged and delivered, via a network, in a manner that can greatly enhance the user experience. A packaging approach provides a downloadable file that contains different constituent parts that can be processed by a software-implemented media player to provide a user with not only media content, but additional content that adds value to the media content. In addition, in some embodiments, a download approach provides for the downloadable file to be link-accessed by a user, and automatically downloaded, cataloged, and experienced by the user without any more user intervention other than clicking on a particular link that is associated with the downloadable file.

Abstract: A digital signal processor and digital signal processing method are provided, which are capable of performing plural kinds of signal processing, and also performing processing for storing sampled data in a manner corresponding to respective kinds of signal processing with a small amount of hardware even in the case where the manner of storing and reading sampled data to be processed with respect to a memory device is different between the plural kinds of signal processing. A storage device stores plural kinds of sampled data corresponding, respectively, to plural kinds of signal processing. A counter updates a count value thereof every sampling period and generates the updated count value as a basic address.

Abstract: A plurality of modems or modem types can run on a host processor, a digital signal processor or both, either concurrently or selectively. Modules of more than one modem program can be swapped in and out of DSP memory space. Common modem code can be run on either a host processor or on a DSP using respective command libraries.

Abstract: A Wide Area Serial PCI system for connecting peripheral devices to a computer. The WASP system includes a host computer system connected through a serial bus to a remote device. The serial bus can range from several meters to several kilometers or more. The host computer system includes a CPU and memory, and also includes a first Peripheral Component Interconnect (PCI) bus, also referred to as the local PCI bus. A primary bridge according to the present invention is coupled to the first PCI bus. The primary bridge includes PCI interface circuitry for interfacing to the first PCI bus. The remote device is located remotely from the computer system and comprises a second or remote PCI bus and one or more peripheral devices coupled to the second PCI bus. The remote device also includes a secondary bridge coupled to the second PCI bus. The secondary bridge includes PCI interface circuitry for interfacing to the second PCI bus. The serial bus is coupled between the primary bridge and the secondary bridge.

Abstract: ? A peripheral video conferencing system is housed in a peripheral housing and adapted for communication with an analog or digital communication channel and a separate host computer system. Audio, video, and data file information is transmitted to and received from a remote conferencing site over the communication channel. A plurality of audio, video, and communication channel connectors provide means for acquiring source audio and video signals, and respectively displaying on a separate monitor and broadcasting over an internal or separate external speaker remote video images and audio. A high-speed output interface provides connectivity with the separate host computer system for coordinating, in cooperation with video conferencing application software operating thereon, the presentation of local and remote NTSC or PAL video images on a display coupled to the computer system.

Abstract: A peripheral video conferencing system is housed in a peripheral housing and adapted for communication with an analog or digital communication channel and a separate host computer system. Audio, video, and data file information is transmitted to and received from a remote conferencing site over the communication channel. A plurality of audio, video, and communication channel connectors provide means for acquiring source audio and video signals, and respectively displaying on a separate monitor and broadcasting over an internal or separate external speaker remote video images and audio. A high-speed output interface provides connectivity with the separate host computer system for coordinating, in cooperation with video conferencing application software operating thereon, the presentation of local and remote NTSC or PAL video images on a display coupled to the computer system.

Abstract: A method for reducing radio frequency interference from a high frequency serial bus by scrambling data signals and reducing the repetition of control signals. Beginning and ending control signals are provided with meaningless signals provided therebetween.

Abstract: A microcontroller or microprocessor-controlled broadcast receiver embedded in an external peripheral with a digital communications interface. In one embodiment, a microprocessor-controlled broadcast receiver is embedded in the housing of an external computer peripheral. The external computer peripheral is connected to a personal computer (PC) via a digital communications link such as USB (universal serial bus). Control data is relayed from the personal computer to the broadcast receiver in the external computer peripheral via the digital communications link. Audio signals received by the broadcast receiver in the external computer peripheral may also be relayed to the personal computer via the digital communications link or via an analog interface for recording storage, or manipulation by the personal computer. The broadcast receiver may also receive data signals in addition to audio signals (datacasting). The data or audio signals or both may be encrypted.

Abstract: An interconnectivity scheme for a PC Theatre system includes the use of compatible plug and display connectors on both the display and the host computer. Audio/video signals received by either the display or the computer may be processed by the computer and transmitted between these devices in a standardized signal format using the compatible connectors. The control scheme for facilitating master-slave control of the display by the computer includes the use of various standardized signals and formats as well to ensure compatibility between products manufactured by different companies.

Abstract: A digital information reproducing apparatus in accordance with a prior art that uses a semiconductor memory to realize a memory means cannot reproduce digital data which has been encoded according to a compression coding form different from the one adopted by an incorporated decoding circuit. According to the present invention, a decoding program stored in a second semiconductor memory is selected according to a compression coding form adopted for digital data stored in a first semiconductor memory. The selected decoding program is used to decode the digital data by means of an arithmetic circuit. Thus, digital information can be reproduced irrespective of a compression coding form adopted for provided digital information.

Abstract: A control apparatus and a VTR are connected via an IEEE1394 interface bus. The control apparatus transmits a command to the VTR via the bus to designate a recording mode and a recording region of input information recorded on a magnetic tape loaded in the VTR. In response to this command, the VTR interprets the content of the received command and performs a recording operation in accordance with the interpreted content. Furthermore, the control apparatus transmits a recording time status command to an information transport apparatus to inquire a recording time of a specific information recorded on the magnetic tape. The information transport apparatus notifies the control apparatus of the recording time. The control apparatus calculates an expected information transport end time based on the information transport start time and the recording time of the specific information notified from the information transport apparatus.

Abstract: A microcontroller or microprocessor-controlled broadcast receiver embedded in an external peripheral with a digital communications interface. In one embodiment, a microprocessor-controlled broadcast receiver is embedded in the housing of an external computer peripheral. The external computer peripheral is connected to a personal computer (PC) via a digital communications link such as USB (universal serial bus). Control data is relayed from the personal computer to the broadcast receiver in the external computer peripheral via the digital communications link. Audio signals received by the broadcast receiver in the external computer peripheral may also be relayed to the personal computer via the digital communications link or via an analog interface for recording storage, or manipulation by the personal computer. The broadcast receiver may also receive data signals in addition to audio signals (datacasting). The data or audio signals or both may be encrypted.

Abstract: The present invention provides a microcomputer having a built-in A/D converter circuit and sharing an external terminal with an input terminal of the A/D converter so as to reduce the size and weight of the semiconductor integrated circuit, wherein a resistor is inserted to eliminate deterioration of the A/D converter circuit due to the reduction in the number of the terminals.

Abstract: A modem interface communicates data between a computer and a modem that is coupled to an external communication network. The modem interface includes a host interface for coupling to a host processor of the computer, an analog interface for coupling to the modem, and a digital signal processor for processing the data communicated with the modem and the host processor. A memory is coupled to the host interface, the digital signal processor and the analog interface. The analog interface provides clock signals and converts data between analog and digital for communicating between the memory and the modem. The analog interface provides an interrupt to the digital signal processor to control the transfer of data from the digital signal processor and the memory. The modem interface processes data at sampling rates while the host processor processes data at rates less than the sampling rate of the analog interface.