Caching Patents (Class 711/113)
  • Patent number: 11449422
    Abstract: There are provided a memory controller for managing meta data and an operating method of the memory controller. The memory controller includes: a buffer memory for storing meta data used to control an operation of a memory device; and a central processing unit for updating the meta data stored in the buffer memory whenever the operation of the memory device is controlled. The central processing unit may transmit the meta data stored in the buffer memory to a host at a first frequency, and transmit the meta data stored in the buffer memory to the memory device at a second frequency lower than the first frequency.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: September 20, 2022
    Assignee: SK hynix Inc.
    Inventor: Seok Jun Lee
  • Patent number: 11442865
    Abstract: A method of prefetching memory pages from remote memory includes detecting that a cache-line access made by a processor executing an application program is an access to a cache line containing page table data of the application program, identifying data pages that are referenced by the page table data, initiating a fetch of a data page, which is one of the identified data pages, and starting a timer. If the fetch completes prior to expiration of the timer, the data page is stored in a local memory. On the other hand, if the fetch does not complete prior to expiration of timer, a presence bit of the data page in the page table data is set to indicate that the data page is not present.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: September 13, 2022
    Assignee: VMware, Inc.
    Inventors: Irina Calciu, Andreas Nowatzyk, Isam Wadih Akkawi, Venkata Subhash Reddy Peddamallu, Pratap Subrahmanyam
  • Patent number: 11438432
    Abstract: A machine-implemented method for controlling transfer of at least one data item from a data cache component, in communication with storage using at least one relatively higher-latency path and at least one relatively lower-latency path, comprises: receiving metadata defining at least a first characteristic of data selected for inspection; responsive to the metadata, seeking a match between said at least first characteristic and a second characteristic of at least one of a plurality of data items in the data cache component; selecting said at least one of the plurality of data items where the at least one of the plurality of data items has the second characteristic matching the first characteristic; and passing the selected one of the plurality of data items from the data cache component using the relatively lower-latency path.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: September 6, 2022
    Assignee: METASWITCH NETWORKS LTD
    Inventors: Jim Wilkinson, Jonathan Lawn
  • Patent number: 11429530
    Abstract: A data storage device may include: a nonvolatile memory configured to store L2P (Logical to Physical) map data and user data; and a controller configured to determine whether read commands which are sequentially transferred from a host device correspond to a backward sequential read, increase a backward sequential read count when the read commands are backward sequential read, set a pre-read start logical block address (LBA) and a length according to a preset condition, when the backward sequential read count is equal to or greater than a reference value, and load an L2P map of the corresponding LBA and user data corresponding to the L2P map from the nonvolatile memory in advance.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: August 30, 2022
    Assignee: SK hynix Inc.
    Inventor: Seok Jun Lee
  • Patent number: 11422934
    Abstract: Described apparatuses and methods track access metadata pertaining to activity within respective address ranges. The access metadata can be used to inform prefetch operations within the respective address ranges. The prefetch operations may involve deriving access patterns from access metadata covering the respective ranges. Suitable address range sizes for accurate pattern detection, however, can vary significantly from region to region of the address space based on, inter alia, workloads produced by programs utilizing the regions. Advantageously, the described apparatuses and methods can adapt the address ranges covered by the access metadata for improved prefetch performance. A data structure may be used to manage the address ranges in which access metadata are tracked. The address ranges can be adapted to improve prefetch performance through low-overhead operations implemented within the data structure.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: August 23, 2022
    Assignee: Micron Technology, Inc.
    Inventor: David Andrew Roberts
  • Patent number: 11422903
    Abstract: Techniques are provided for maintaining and recomputing reference counts in a persistent memory file system of a node. Primary reference counts are maintained for pages within persistent memory of the node. In response to receiving a first operation to link a page into a persistent memory file system of the persistent memory, a primary reference count of the page is incremented before linking the page into the persistent memory file system. In response to receiving a second operation to unlink the page from the persistent memory file system, the page is unlinked from the persistent memory file system before the primary reference count is decremented. Upon the node recovering from a crash, the persistent memory file system is traversed in order to update shadow reference counts for the pages with correct reference count values, which are used to overwrite the primary reference counts with the correct reference count values.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: August 23, 2022
    Assignee: NetApp Inc.
    Inventors: Ananthan Subramanian, Matthew Fontaine Curtis-Maury, Vinay Devadas
  • Patent number: 11422728
    Abstract: Disclosed herein are methods, systems, and apparatus, including computer programs encoded on computer storage devices, for data processing and storage. One of the methods includes maintaining, by a storage system, a data log file in a source storage device of the storage system. The storage system identifies one or more characteristics of the data log file and one or more characteristics of the source storage device, and determines a migration metric of the data log file based on the one or more characteristics of the data log file and the one or more characteristics of the source storage device. The storage system determines whether to migrate the data log file according to the migration metric. In response to determining to migrate the data log file, the storage system migrates the data log file from a source location in the source storage device to a destination storage device.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: August 23, 2022
    Assignee: Advanced New Technologies Co., Ltd.
    Inventor: Shikun Tian
  • Patent number: 11409657
    Abstract: Described apparatuses and methods track access metadata pertaining to activity within respective address ranges. The access metadata can be used to inform prefetch operations within the respective address ranges. The prefetch operations may involve deriving access patterns from access metadata covering the respective ranges. Suitable address range sizes for accurate pattern detection, however, can vary significantly from region to region of the address space based on, inter alia, workloads produced by programs utilizing the regions. Advantageously, the described apparatuses and methods can adapt the address ranges covered by the access metadata for improved prefetch performance. A data structure may be used to manage the address ranges in which access metadata are tracked. The address ranges can be adapted to improve prefetch performance through low-overhead operations implemented within the data structure.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: August 9, 2022
    Assignee: Micron Technology, Inc.
    Inventor: David Andrew Roberts
  • Patent number: 11403218
    Abstract: A system includes first and second redundant controllers, and at least one logical volume accessible to the first and second redundant controllers. The system also includes metadata fields associated with the at least one logical volume. The metadata fields include a first age field configured to store a first age value associated with the first controller and a second age field configured to store a second age value associated with the second controller. The first age value and the second age value are employed to provide an indication of whether cache data for the at least one logical volume is valid. The system further includes a processor configured to update the first and second age values in the respective first and second age fields.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: August 2, 2022
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Ritvik Viswanatha, Kishan Gelli, Joseph Skazinski
  • Patent number: 11392320
    Abstract: A method and apparatus for providing accurate command aging in a data storage device. A host provides multiple doorbell requests for the same command queue and a timestamp is saved for each request. When the storage device fetches the commands associated with the requests, the commands are all given the value of the timestamp associated with the requests and placed into the command queue and the aging algorithm of the storage device ages the commands. In an alternate embodiment, the commands may be assigned timestamps based on statistical values such as an average value, between the first and last doorbell request timestamps.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: July 19, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventor: Shay Benisty
  • Patent number: 11372764
    Abstract: A method for demoting data from a cache comprising heterogeneous memory types is disclosed. The method maintains for a data element in the cache, a write access count that is incremented each time the data element is updated in the cache. The cache includes a higher performance portion and a lower performance portion. The method also maintains, for the data element, a read access count that is incremented each time a data element is read in the cache. The method removes the data element from the higher performance portion of the cache in accordance with a cache demotion algorithm. If the write access count is below a first threshold and the read access count is above a second threshold, the method places the data element in the lower performance portion. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: June 28, 2022
    Assignee: International Business Machines Corporation
    Inventors: Lokesh M. Gupta, Matthew G. Borlick, Kevin J. Ash, Kyler A. Anderson
  • Patent number: 11372574
    Abstract: A method is provided for managing availability of runtime asset data used by client applications hosted on workstations of an industrial system, the method including distributing runtime asset data about assets of the industrial system received at the plurality of workstations among runtime asset data caches associated with the client applications. At least a portion of locally stored runtime asset data stored on a local runtime asset data cache is replicated and stored remotely on the runtime asset data cache associated with another client application. The locally stored runtime asset data is periodically evaluated to determine if it is up-to-date, and in response to determining it is not up-to-date, the locally stored runtime asset data is updated by requesting and retrieving a replicated and updated version of the locally stored runtime asset data from the runtime asset data cache remotely storing the replicated version.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: June 28, 2022
    Assignee: Schneider Electric Systems USA, Inc.
    Inventors: Mallikarjuna Munugoti, James P. McIntyre, Sameer Kondejkar, Padmaja Bodanapu
  • Patent number: 11372585
    Abstract: Apparatuses and methods can be related to generating an asynchronous process topology in a memory device. The topology can be generated based on results of a number of processes. The processes can be asynchronous given that a processing resource that implement the processes do not use a clock signal to generate the topology.
    Type: Grant
    Filed: May 5, 2020
    Date of Patent: June 28, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Glen E. Hush, Richard C. Murphy, Honglin Sun
  • Patent number: 11366605
    Abstract: A method, computer program product, and computing system for detecting a data location event concerning a data storage system; holistically analyzing the data storage system to determine a status for the data storage system; and generating one or more recommendations concerning the data location event based, at least in part, upon the status for the data storage system.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: June 21, 2022
    Assignee: EMC IP HOLDING COMPANY, LLC
    Inventors: Gajanan S. Natu, Kenneth Hu, Susan Rundbaken Young
  • Patent number: 11362950
    Abstract: An apparatus and method for classifying traffic data in a communication network based on IP flow. Traffic data in a communication network is monitored in order to detect an IP flow. A preliminary classification is assigned to the IP flow based on protocol information contained in its first packet. Subsequent packets within the IP flow are further monitored, and the IP flow is reclassified based, in part, on the domain name of the responding server. Web pages can also be classified, and monitored to determine their response time.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: June 14, 2022
    Assignee: HUGHES NETWORK SYSTEMS, LLC
    Inventor: Douglas M. Dillon
  • Patent number: 11354252
    Abstract: Techniques related to automatic cache management are disclosed. In some embodiments, one or more non-transitory storage media store instructions which, when executed by one or more computing devices, cause performance of an automatic cache management method when a determination is made to store a first set of data in a cache. The method involves determining whether an amount of available space in the cache is less than a predetermined threshold. When the amount of available space in the cache is less than the predetermined threshold, a determination is made as to whether a second set of data has a lower ranking than the first set of data by at least a predetermined amount. When the second set of data has a lower ranking than the first set of data by at least the predetermined amount, the second set of data is evicted. Thereafter, the first set of data is cached.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: June 7, 2022
    Assignee: Oracle International Corporation
    Inventors: Hariharan Lakshmanan, Dhruvil Shah, Prashant Gaharwar, Shasank K. Chavan, Tirthankar Lahiri, Saraswathy Narayan
  • Patent number: 11347586
    Abstract: A method for implementing a RAID group in a system including a host computing system, a first set of storage devices for storing user data for the RAID group, and a second set of storage devices for storing redundancy data for the RAID group. The method includes: distributing the user data from a host-side FLT module on the host computing system to the first set of storage devices; determining, by each storage device in the first set of storage devices, a logical block address to physical block address (LBA-PBA) binding for the user data received from the host-side FLT module; sending LBA-PBA binding information for the LBA-PBA binding from the first set of storage devices to the host-side FLT module; and performing, by the host-side FLT module, RAID encoding to form the RAID group based on the LBA-PBA binding information received from the first set of storage devices.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: May 31, 2022
    Assignee: SCALEFLUX, INC.
    Inventor: Qi Wu
  • Patent number: 11347683
    Abstract: Policy-based performance of storage management operations on objects of a file system using an index of the file system is presented herein. An object policy component maintains an object policy specifying that an operation is to be performed on an object of objects that have been stored in a system in response to a determination that a state of the object satisfies a defined policy condition. Further, a job component periodically accesses an index data structure of the system comprising respective attributes of the objects that have been stored in the system, and in response to the state of the object being determined, based on a group of attributes of the respective attributes of the object, to satisfy the defined policy condition, performs the operation on the object.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: May 31, 2022
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Raymond Ramsden, Harsha Mahuli
  • Patent number: 11340900
    Abstract: Dirty pages of cached user data are persistently stored to page buffers that are allocated from a page buffer pool in a persistent data storage resource of a data storage system, and are indicated by page descriptors that are stored at a head of a temporally ordered page descriptor ring as the dirty pages are stored to the page buffers. The disclosed technology performs a flush operation by selecting a work-set of non-sequential page descriptors within the page descriptor ring, flushing dirty pages from page buffers indicated by the page descriptors in the work-set to non-volatile data storage drives of the data storage system, and storing, for each one of the page buffers indicated by the page descriptors in the work-set, an indication that the page buffer is available for re-use.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: May 24, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Geng Han, Philippe Armangau, Jian Gao, Vamsi K. Vankamamidi
  • Patent number: 11334274
    Abstract: A method disclosed herein includes storing a data heat map in local cache of a non-volatile memory express (NVME) controller associated with an NVME device, configuring an asynchronous event notification command in a submission queue associated with the NVME device, generating a request for data migration notification to host based on the data heat map, and communicating the data migration notification to a host using the asynchronous event notification command.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: May 17, 2022
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Nitin Kabra, Sneha Wagh
  • Patent number: 11335376
    Abstract: A data storage device includes a primary storage media, a drive storage controller electrically coupled to media recording electronics and a controller-override mechanism. The controller-override mechanism is selectively controllable by a user to override control actions of the drive storage controller to prevent the drive storage controller from altering the primary storage media at a time when the storage device is otherwise configured for nominal data storage operations.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: May 17, 2022
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Riyan Alex Mendonsa, Brett R. Herdendorf, Jon D. Trantham, Kevin Lee Van Pelt
  • Patent number: 11334497
    Abstract: Client data is structured as a set of data blocks. A first subset of data blocks is stored on a current segment of a plurality of disks. A second subset of data blocks is stored on a previous segment. A request to clean client data is received. The request includes a request to update the current segment to include the second subset of data blocks. The second subset of data blocks is accessed and transmitted from a lower layer to a higher layer of the system. Parity data is generated at the higher layer. The parity data is transmitted to the lower layer. The lower layer is employed to generate a local copy of the second subset of data blocks. Each local address that references the local copy of the second subset of data blocks is included in the current segment. The parity data is written in the current segment.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: May 17, 2022
    Assignee: VMware, Inc.
    Inventors: Wenguang Wang, Vamsidhar Gunturu
  • Patent number: 11334484
    Abstract: Determining and using the ideal size of memory to be transferred from high speed memory to a low speed memory may result in speedier saves to the low speed memory and a longer life for the low speed memory.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: May 17, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Michael R. Fortin, Robert L. Reinauer
  • Patent number: 11327950
    Abstract: A system for ledger data includes a block repository, a metadata database, and a processor. The block repository stores verified secure ledger data in one or more blocks that are cryptographically linked. The metadata database stores metadata information for the one or more blocks in the block repository. The processor is configured to receive an indication to check data in a block and to mark the block as being verified in the metadata information associated with the block.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: May 10, 2022
    Assignee: Workday, Inc.
    Inventors: Parvinder Singh Thapar, Bradley Hoyle, Dirk Nicholas Dougherty
  • Patent number: 11327905
    Abstract: A computing device requests access to an application object from a remote storage system in order to locally execute application functionality without hosting application resources. An accessed object is associated with an intent in the storage system and locked. Locking an object in combination with an intent prevents computing devices that are not performing the intent from accessing the object. An intent defines one or more operations to be performed with the requested object, which are serialized as intent steps and stored in the storage system. Upon executing an intent step, the computing device stores a log entry at the storage system signifying the step's completion. A locked object remains locked until the log entries indicate every intent step as complete. Different computing devices can unlock a locked object by executing any incomplete steps of an intent associated with the locked object.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: May 10, 2022
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Lidong Zhou, Jacob R. Lorch, Jinglei Ren, Parveen Kumar Patel, Srinath Setty
  • Patent number: 11327660
    Abstract: A storage system having high reliability and IO processing performance is realized. The storage system includes: a first arithmetic unit configured to receive an input and output request and perform data input and output processing; a first memory connected to the first arithmetic unit; a plurality of storage drives configured to store data; a second arithmetic unit; and a second memory connected to the second arithmetic unit. The first arithmetic unit instructs the storage drive to read data, the storage drive reads the data and stores the data in the second memory, the second arithmetic unit stores the data stored in the second memory in the first memory, and the first arithmetic unit transmits the data stored in the first memory to a request source of a read request for the data.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: May 10, 2022
    Assignee: HITACHI, LTD.
    Inventors: Takashi Nagao, Yuusaku Kiyota, Hideaki Monji, Tomohiro Yoshihara
  • Patent number: 11321133
    Abstract: Provided are a computer program product, system, and method for using a machine learning module to determine an allocation of stage and destage tasks. Storage performance information related to processing of Input/Output (I/O) requests with respect to the storage unit is provided to a machine learning module. The machine learning module receives a computed number of stage tasks and a computed number of destage tasks. A current number of stage tasks allocated to stage tracks from the storage unit to the cache is adjusted based on the computed number of stage tasks. A current number of destage tasks allocated to destage tracks from the cache to the storage unit is adjusted based on the computed number of destage tasks.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: May 3, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Lokesh M. Gupta, Kyler A. Anderson, Matthew G. Borlick, Kevin J. Ash
  • Patent number: 11321234
    Abstract: Provided are a computer program product, system, and method for using mirroring cache list to demote modified tracks from cache A modified track for a primary storage stored in the cache to mirror to a secondary storage is indicated in a mirroring cache list. The mirroring cache list is processed to select modified tracks in the cache to transfer to the secondary storage that have not yet been transferred. The selected modified tracks in the cache are transferred to the secondary storage. The mirroring cache list is processed to determine modified tracks in the cache to demote from the cache.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: May 3, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Lokesh Mohan Gupta, Kevin J. Ash, Kyler A. Anderson, Matthew J. Kalos
  • Patent number: 11314764
    Abstract: A system for contextual data collection and extraction is provided, comprising an extraction engine configured to receive context from a user for desired information to extract, connect to a data source providing a richly formatted dataset, retrieve the richly formatted dataset, process the richly formatted dataset and extract information from a plurality of linguistic modalities within the richly formatted, and transform the extracted data into a extracted dataset; and a knowledge base construction service configured to retrieve the extracted dataset, create a knowledge base for storing the extracted dataset, and store the knowledge base in a data store.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: April 26, 2022
    Assignee: QOMPLX, INC.
    Inventors: Jason Crabtree, Andrew Sellers
  • Patent number: 11314546
    Abstract: A technique for executing a containerized stateful application that is deployed on a stateless computing platform is disclosed. The technique involves deploying a containerized stateful application on a stateless computing platform and executing the stateful application on the stateless computing platform. The technique also involves during execution of the stateful application, evaluating, in an application virtualization layer, events that are generated during execution of the stateful application to identify events that may trigger a change in state of the stateful application and during execution of the stateful application, updating a set of storage objects in response to the evaluations, and during execution of the stateful application, comparing events that are generated by the stateful application to the set of storage objects and redirecting a storage object that corresponds to an event to a persistent data store if the storage object matches a storage object in the set of storage objects.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: April 26, 2022
    Assignee: DATA ACCELERATOR LTD
    Inventors: Priya Saxena, Matthew Philip Clothier
  • Patent number: 11294822
    Abstract: Disclosed is a method of operating a non-volatile memory device. A method of operating a non-volatile memory device according to an embodiment of the present disclosure, in a method of operating a non-volatile memory device including a log storage area, a data storage area, and an ACK generation unit, may include receiving a log and data from a cache memory, storing the received log in the log storage area, storing the received data in the data storage area, and transmitting an ACK signal to the cache memory according to a result of storing the log and the data.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: April 5, 2022
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Tae Hee Han, Jeong Beom Hong, Yong Wook Kim, Min Gu Kang, Jo Eun Lee
  • Patent number: 11294570
    Abstract: Data compression is performed on a storage system for which one or more host systems have direct access to data on the storage system. The storage system may compress the data for one or more logical storage units (LSUs) having data stored thereon, and may update compression metadata associated with the LSUs and/or the data portions thereof to reflect that the data is compressed. In response to a read request for a data portion received from a host application executing on the host system, compression metadata for the data portion may be accessed. If it is determined from the compression metadata that the data portion is compressed, the data compression metadata for the data portion may be further analyzed to determine how to decompress the data portion. The data portion may be retrieved and decompressed, and the decompressed data may be returned to the requesting application.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: April 5, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Ian Wigmore, Gabriel Benhanokh, Arieh Don, Alesia A. Tringale
  • Patent number: 11288017
    Abstract: In certain aspects, a data storage device is provided including a distributed controller configured to communicate with a main controller; and first and second memory devices of respective first and second non-volatile memory technologies. The first and second memory devices are coupled to the distributed controller configured to control access to the first and second memory devices. In certain aspects, a system is provided including a main controller; first and second distributed controllers coupled to the main controller; at least one first memory device coupled to the first distributed controller; and at least one second memory device coupled to the second distributed controller. The main controller is configured to control access to the first and second distributed controllers. The first and second distributed controllers are configured to control access to the respective at least one first and second memory devices that include at least two non-volatile memory technologies.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: March 29, 2022
    Assignee: SMART IOPS, INC.
    Inventors: Manuel Antonio d'Abreu, Ashutosh Kumar Das
  • Patent number: 11281497
    Abstract: Provided are a computer program product, system, and method for using a machine learning module to determine an allocation of stage and destage tasks. Storage performance information related to processing of Input/Output (I/O) requests with respect to the storage unit is provided to a machine learning module. The machine learning module receives a computed number of stage tasks and a computed number of destage tasks. A current number of stage tasks allocated to stage tracks from the storage unit to the cache is adjusted based on the computed number of stage tasks. A current number of destage tasks allocated to destage tracks from the cache to the storage unit is adjusted based on the computed number of destage tasks.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: March 22, 2022
    Assignee: International Business Machines Corporation
    Inventors: Lokesh M. Gupta, Kyler A. Anderson, Matthew G. Borlick, Kevin J. Ash
  • Patent number: 11263146
    Abstract: Systems for accessing client data is described. A request to access a first data block is received. The request indicates a first logical address referencing the first data block. First mapping data is employed to identify a first physical addresses corresponding to the first logical addresses. The first mapping data encodes a first LOM transaction ID and candidate local addresses. The first mapping data is employed to identify the candidate local address and the first LOM transaction ID. A usage table is employed to determine the current status of the first LOM transaction ID. The candidate local address is employed to access the first data block. Second mapping data is employed to identify an updated local address of the set of local addresses. The updated local address currently references the first data block. The updated local address is employed to access the first data block.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: March 1, 2022
    Assignee: VMware, Inc.
    Inventors: Wenguang Wang, Eric Knauft, Vamsidhar Gunturu
  • Patent number: 11263139
    Abstract: A processing system includes a cache, a host memory, a CPU and a hardware accelerator. The CPU accesses the cache and the host memory and generates at least one instruction. The hardware accelerator operates in a non-temporal access mode or a temporal access mode according to the access behavior of the instruction. The hardware accelerator accesses the host memory through an accelerator interface when the hardware accelerator operates in the non-temporal access mode, and accesses the cache through the accelerator interface when the hardware accelerator operates in the temporal access mode.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: March 1, 2022
    Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
    Inventors: Di Hu, Zongpu Qi, Wei Zhao, Jin Yu, Lei Meng
  • Patent number: 11263097
    Abstract: Provided are a computer program product, system, and method for using a track format code in a cache control block for a track in a cache to process read and write requests to the track in the cache. A track format table associates track format codes with track format metadata. A determination is made as to whether the track format table has track format metadata matching track format metadata of a track staged into the cache. A determination is made as to whether a track format code from the track format table for the track format metadata in the track format table matches the track format metadata of the track staged. A cache control block for the track being added to the cache is generated including the determined track format code when the track format table has the matching track format metadata.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: March 1, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kyler A. Anderson, Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos, Beth A. Peterson
  • Patent number: 11262919
    Abstract: Client data is structured as a set of data blocks. A first subset of data blocks is stored on a current segment of the disks. A second subset of data blocks is stored on a previous segment. A request to clean client data is received, including a request to update the current segment to include the second subset of data blocks. The second subset of data blocks is accessed and transmitted from a lower layer to a higher system layer. Parity data is generated at the higher layer. The parity data is transmitted to the lower layer. The lower layer updates second mapping data. In the updated mapping of the second mapping data, each local address that references a data block of the second subset of data blocks is included in the current segment of the plurality of disks. The lower layer writes the parity data in the current segment.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: March 1, 2022
    Assignee: VMware, Inc.
    Inventors: Wenguang Wang, Vamsidhar Gunturu
  • Patent number: 11249834
    Abstract: An apparatus includes at least one processing device comprising a processor coupled to a memory, with the processing device being configured to maintain at least first and second journals for respective first and second different types of input-output requests, to move one or more entries between the first journal and the second journal under one or more specified conditions, to perform a clean-up operation for at least one of the first and second journals in conjunction with the moving of the one or more entries, and responsive to a failure occurring during the clean-up operation, to execute a contention resolution algorithm to resolve logical address range lock contentions between different entries of the first and second journals. The processing device illustratively comprises a storage controller of a storage system. The storage system may be, for example, a source storage system configured to carry out a synchronous replication process with a target storage system.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: February 15, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Xiangping Chen, Svetlana Kronrod
  • Patent number: 11249812
    Abstract: Methods, systems, and computer-readable storage media for determining, by an application instance, that first data is to be requested, transmitting, by a total outage compensator of the application instance, one or more requests for the first data to one or more peer application instances, receiving, by the total outage compensator, a response to a request for the first data, the response including the data, and executing, by the instance of the application instance, at least one function based on the first data.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: February 15, 2022
    Assignee: SAP SE
    Inventors: Peter Eberlein, Volker Driesen
  • Patent number: 11250016
    Abstract: Systems, methods, and articles of manufacture provide for simplified and partially-automated data operation services, such as data transfer, storage, management, and analysis operations. Non-IT data consumers may, for example, initiate such data operations by providing only a subset of the required parameters for the operation, with the specially-coded system automatically fetching any missing parameters or values from one or more metadata stores and initiating the requested operation.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: February 15, 2022
    Assignee: The Travelers Indemnity Company
    Inventors: Venu Challagolla, Venkatraman Raman
  • Patent number: 11245774
    Abstract: Described herein are systems and techniques to efficiently cache data for streaming applications. A cache can be organized to include multiple cache segments, and each cache segment can include multiple cache blocks. A cache entry can be created for streaming data, and the streaming data can be streamed directly into a first cache block. When the first cache block is full, a next cache block can be identified, in a same cache segment or in a new cache segment. The streaming data can be streamed directly into the next cache block, and into any further cache blocks as needed.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: February 8, 2022
    Assignee: EMC IP Holding Company LLC
    Inventor: Andrei Paduroiu
  • Patent number: 11244717
    Abstract: Methods, systems, and devices for write operation techniques for memory systems are described. In some memory systems, write operations performed on target memory cells of the memory device may disturb logic states stored by one or more adjacent memory cells. Such disturbances may cause reductions in read margins when accessing one or more memory cells, or may cause a loss of data in one or more memory cells. The described techniques may reduce aspects of logic state degradation by supporting operational modes where a host device, a memory device, or both, refrains from writing information to a region of a memory array, or inhibits write commands associated with write operations on a region of a memory array.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: February 8, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Zhongyuan Lu, Christina Papagianni, Hongmei Wang, Robert J. Gleixner
  • Patent number: 11243973
    Abstract: A system for contextual data collection and extraction is provided, comprising an extraction engine configured to receive context from a user for desired information to extract, connect to a data source providing a richly formatted dataset, retrieve the richly formatted dataset, process the richly formatted dataset and extract information from a plurality of linguistic modalities within the richly formatted, and transform the extracted data into a extracted dataset; and a knowledge base construction service configured to retrieve the extracted dataset, create a knowledge base for storing the extracted dataset, and store the knowledge base in a data store.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: February 8, 2022
    Assignee: QOMPLX, INC.
    Inventors: Jason Crabtree, Andrew Sellers
  • Patent number: 11237917
    Abstract: A method includes obtaining data associated with a volatile storage device and a non-volatile storage device of an information handling system during a normal mode of operation of the information handling system, and calculating a first data transfer frequency and a first transfer data size from the volatile storage device to the non-volatile storage device based on the data associated with the volatile storage device and the non-volatile storage device during the normal mode of operation of the information handling system. The method also includes detecting an event indicating a power outage of the information handling system, and in response to the detecting the event, determining a data management policy to be applied to the information handling system during the safe mode of operation of the information handling system.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: February 1, 2022
    Assignee: Dell Products L.P.
    Inventors: Prasoon Kumar Sinha, Karthik Sethuramalingam, Suman Lal Banik, Ravishankar Kanakapura N
  • Patent number: 11238010
    Abstract: A method is disclosed comprising: generating a first snapshot of a first storage subsystem; detecting, by a management node, that all in-flight data storage requests recorded in drain tables of storage nodes in the first storage subsystem have been completed, the in-flight data storage requests recorded in the drain tables of the storage nodes being replicated in a second storage subsystem; causing, by the management node, each of the storage nodes to flip the respective designations of the tracking tables in the node's respective pair of tracking tables; and transmitting, from the management node to the second storage subsystem, an instruction which when received by the second storage subsystem causes the second storage subsystem to generate a second snapshot of the second storage subsystem.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: February 1, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Ying Hu, Xiangping Chen
  • Patent number: 11231867
    Abstract: Techniques for processing write operations may include: receiving, at a first data storage system, a first write operation that writes first data to a first device, wherein the first device is configured for replication on a second device of a second data storage system; performing first processing that determines whether the first data written by the first write operation is a duplicate of an existing entry in a first hash table of the first data storage system; responsive to determining the first data written by the first write operation is a duplicate of an existing entry in the first hash table, performing second processing; responsive to determining the first data written by the first write operation is unique and is not a duplicate of an existing entry in the first hash table, performing third processing; and transmitting the final buffer to the second data storage system.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: January 25, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Venkata L R Ippatapu, Kenneth Dorman
  • Patent number: 11232054
    Abstract: In certain embodiments, a memory module includes a printed circuit board (PCB) having an interface that couples it to a host system for provision of power, data, address and control signals. First, second, and third buck converters receive a pre-regulated input voltage and produce first, second and third regulated voltages. A converter circuit reduces the pre-regulated input voltage to provide a fourth regulated voltage. Synchronous dynamic random access memory (SDRAM) devices are coupled to one or more regulated voltages of the first, second, third and fourth regulated voltages, and a voltage monitor circuit monitors an input voltage and produces a signal in response to the input voltage having a voltage amplitude that is greater than a threshold voltage.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: January 25, 2022
    Assignee: NETLIST, INC.
    Inventors: Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
  • Patent number: 11226899
    Abstract: Provided are a computer program product, system, and method for populating a second cache with tracks from a first cache when transferring management of the tracks from a first node to a second node. Management of a first group of tracks in the storage managed by the first node is transferred to the second node managing access to a second group of tracks in the storage. After the transferring the management of the tracks, the second node manages access to the first and second groups of tracks and caches accessed tracks from the first and second groups in the second cache of the second node. The second cache of the second node is populated with the tracks in a first cache of the first node.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: January 18, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Matthew J. Kalos, Brian A. Rinaldi
  • Patent number: 11221886
    Abstract: Embodiments for optimizing dynamic resource allocations in a disaggregated computing environment. A new workload is assigned to a subset of a plurality of processors, the subset of processors assigned a subset of a plurality of cache devices. A determination is made that the new workload is categorized as a cache-friendly workload having a memory need which can be met primarily by the subset of cache devices by identifying that underlying data necessitated by the new workload resides primarily within the subset of cache devices. Pursuant to determining the new workload is the cache-friendly workload, a cache related action is performed to increase performance of the new workload executed by the subset of processors and commensurately executes additional workloads performed by other ones of the plurality of processors within the disaggregated computing environment.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: January 11, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John A. Bivens, Ruchi Mahindru, Eugen Schenfeld, Min Li, Valentina Salapura