Direct Access Storage Device (dasd) Patents (Class 711/112)
  • Patent number: 11455247
    Abstract: Disclosed is a controller for providing applications seamless access to local and remote memory so that data of a particular application that is moved out of the Random Access Memory (“RAM”) of a local device may be stored and accessed in RAM of a remote device rather than on higher latency and slower performing storage mediums. The controller provides an application with a first allocation of RAM from the local device running the application, and a second allocation of RAM from the remote device. The controller registers to receive a page fault notification for a particular page that the application attempts to access and that is not stored in the first allocation of RAM. The controller retrieves the particular page from the second allocation of RAM, and loads it into the first allocation of RAM where it becomes accessible by the application.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: September 27, 2022
    Assignee: TORmem Inc.
    Inventors: Scott Burns, Steven White, Thao An Nguyen, Carl Perry, Andrew Hodges
  • Patent number: 11449394
    Abstract: Indexing preferences generally associate each data source with a type of indexing technology and/or with an index/catalog and/or with a computing device that hosts the index/catalog for tracking backup data generated from the source data. Indexing preferences govern which index/catalog receives transaction logs for a given storage operation. Thus, indexing destinations are defined granularly and flexibly in reference to the source data. Load balancing without user intervention assures that the various index/catalogs are fairly distributed in the illustrative backup systems by autonomously initiating migration jobs. Criteria for initiating migration jobs are based on past usage and going-forward trends. An illustrative migration job re-associates data sources with a different destination media agent and/or index/catalog, including transferring some or all relevant transaction logs and/or indexing information from the old host to the new host.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: September 20, 2022
    Assignee: Commvault Systems, Inc.
    Inventors: Pavan Kumar Reddy Bedadala, Parag Gokhale, Pavlo Mazur, Prakash Varadharajan, Ankur Varsheny, Gopikannan Venugopalsamy, Marcelo Dos Reis Mansano
  • Patent number: 11451569
    Abstract: A method is provided of extracting file content from a live stream of network data streaming multiple files.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: September 20, 2022
    Assignee: Arbor Networks, Inc.
    Inventors: Bhargav M. Pendse, Neil Richard Terry
  • Patent number: 11442667
    Abstract: Systems for managing thermal dissipation in multi-stacked memory dies, and methods and computer-readable storage media related thereto, are provided. The system includes memory dies including memory blocks to store data. A processing component is configured to maintain memory block states for the memory blocks. The memory block states include: an open memory block state allowing write operations, and a closed memory block state preventing write operations. The processing component is further configured to: receive a first write command to store first data, and compute first relative distances between open memory blocks in the open memory block state. The processing component is further configured to: select a set of open memory blocks for a first write operation based on the first relative distances so as to manage thermal dissipation, and initiate the first write operation on the first set of open memory blocks.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: September 13, 2022
    Assignee: SMART IOPS, INC.
    Inventors: Ashutosh K. Das, Manuel A. d'Abreu
  • Patent number: 11435939
    Abstract: In an example, a method of allocating storage objects of a virtual machine across storage devices in a computing system includes: collecting capabilities of the storage devices in the computing system; assigning a tier of a plurality of tiers to each of the storage devices in the computing system; collecting performance data for the storage devices across a period of time; analyzing the performance data and the capabilities to determine a placement of storage objects of the virtual machine across the plurality of tiers; and moving the storage objects to respective ones of the storage devices based on the assigned tiers.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: September 6, 2022
    Assignee: VMWARE, INC.
    Inventors: Ronald Gerard Singler, Jr., Cormac Hogan, Duncan Epping
  • Patent number: 11436085
    Abstract: Write operations are performed to write data to user blocks of the memory device and to write, to a first set of purposed blocks, purposed data related to the first data written at the memory device. Whether the first set of purposed blocks satisfy a condition indicating an endurance state of the first set of purposed blocks is determined. Responsive to the first set of purposed blocks satisfies the condition, one or more blocks from a pool of storage area blocks of the memory device are allocated to a second set of purposed blocks.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: September 6, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Kishore Kumar Muchherla, Harish R. Singidi, Ashutosh Malshe, Vamsi Pavan Rayaprolu, Sampath K. Ratnam
  • Patent number: 11429445
    Abstract: Enhancement or reduction of page migration can include operations that include scoring, in a computing device, each executable of at least a first group and a second group of executables in the computing device. The executables can be related to user interface elements of applications and associated with pages of memory in the computing device. For each executable, the scoring can be based at least partly on an amount of user interface elements using the executable. The first group can be located at first pages of the memory, and the second group can be located at second pages. When the scoring of the executables in the first group is higher than the scoring of the executables in the second group, the operations can include allocating or migrating the first pages to a first type of memory, and allocating or migrating the second pages to a second type of memory.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: August 30, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Dmitri Yudanov, Samuel E. Bradshaw
  • Patent number: 11429313
    Abstract: A data processing method and device, and a distributed storage system are described. The method and device are applied in a dual-control storage server. The dual-control storage server comprises two controllers. If one controller fails due to abnormalities, the other controller determines the storage device managed by the failed controller, and the other controller scans the data in the determined storage device to obtain the metadata of the storage device, and uses the metadata to read the data stored in the determined storage device. It can be seen that in this solution, if one controller is abnormal, the other controller will take the place of the failed controller to provide external services. This improves the stability of the data storage by the dual-control storage server.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: August 30, 2022
    Assignee: HANGZHOU HIKVISION SYSTEM TECHNOLOGY CO., LTD.
    Inventors: Weichun Wang, Min Ye, Peng Lin, Qiqian Lin
  • Patent number: 11431794
    Abstract: In a service deployment method performed by a function management platform that includes a function scheduler and a function executor manager, the function scheduler receives a function call request that carries a function identifier, selects an available host based on resource pool information of a tenant, and sends a function instance creation request to the function executor manager. The function executor manager receives the function instance creation request, selects the host corresponding to the host identifier from the resource pool of the tenant, and creates a function executor corresponding to the function identifier on the host.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: August 30, 2022
    Assignee: HUAWEI CLOUD COMPUTING TECHNOLOGIES CO., LTD.
    Inventors: Lei Yang, Haijuan Zhang, Shaohui Liu
  • Patent number: 11429497
    Abstract: Embodiments of the present disclosure provide a computer-implemented method, an electronic device and a computer program product. The method comprises: obtaining historical data of recoverable errors that occurred in a storage disk during a first period in the past. The method also comprises: determining, based on the historical data, a predicted number of recoverable errors to occur in the storage disk during a second period. The first period has a same duration as that of the second period. The method further comprises: in response to the predicted number exceeding a threshold for identifying a slow disk, performing an operation for handling a slow disk on the storage disk.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: August 30, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Bing Liu, Lingdong Weng
  • Patent number: 11416279
    Abstract: A hybrid cloud storage solution provides a private cloud storage system that is backed by a public cloud storage system. The private cloud storage system caches data files that are accessed from the public cloud storage system by virtual machines or containers in a virtualized computing environment. Subsequent accesses are directed towards the cached data files in the private cloud storage system, rather than being directed towards the public cloud storage system, thereby reducing costs and performance overhead associated with accessing the public cloud storage systems. The cached data files are contained in virtual machine disks (VMDKs) that are portable between virtualized computing instances that run in the virtualized computing environment.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: August 16, 2022
    Assignee: VMWARE, INC.
    Inventors: Puneet Birender Katyal, Mark Johnson
  • Patent number: 11418505
    Abstract: According to one embodiment, an information processing apparatus is applied to an embedded system in an electric device and includes a first circuit. The first circuit is configured to request a server different from the information processing apparatus to determine whether a debug or software change is possible in response to external access.
    Type: Grant
    Filed: February 7, 2019
    Date of Patent: August 16, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Ryuiti Koike, Mikio Hashimoto, Atsushi Shimbo
  • Patent number: 11397640
    Abstract: Devices and techniques for extended error correction in a storage device are described herein. A first set of data, that has a corresponding logical address and physical address, is received. A second set of data can be selected based on the logical address. Secondary error correction data can be computed from the first set of data and the second set of data. Primary error correction data can be differentiated from the secondary error correction data by being computed from the first set of data and a third set of data. The third set of data can be selected based on the physical address of the first set of data. The secondary error correction data can be written to the storage device based on the logical address.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: July 26, 2022
    Assignee: Micron Technology, Inc.
    Inventor: David Aaron Palmer
  • Patent number: 11397814
    Abstract: The present disclosure includes apparatuses, methods, and systems for using a local ledger block chain for secure electronic control unit updates. An embodiment includes a memory, and circuitry configured to receive a global block to be added to a local ledger block chain for validating an electronic control unit update for electronic control unit data stored in the memory, where the global block to be added to the local ledger block chain includes a cryptographic hash of a current local block in the local ledger block chain, a cryptographic hash of the electronic control unit data stored in the memory to be updated, where the current local block in the local ledger block chain has a digital signature associated therewith that indicates the global block is from an authorized entity.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: July 26, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Antonino Mondello, Alberto Troia
  • Patent number: 11386082
    Abstract: Disclosed herein are system, method, and computer program product embodiments for providing paged and compressed storage for column data, while maintaining existing access mechanisms for the data. In order to reduce an in-memory footprint for column data, columns may be stored in pageable format using page chains, and only those pages of the column data needed to resolve a query will be placed in memory, and evicted from memory when no longer needed. In order to further reduce the footprint for these columns, compression can be applied, and the compressed column data stored in the same pageable format using page chains. The compressed data includes a plurality of vectors, each of which is converted into pages and stored on the page chain with the others so that they can be efficiently retrieved during database retrieval operations.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: July 12, 2022
    Assignee: SAP SE
    Inventors: Mehul Wagle, Colin Florendo, Pushkar Khadilkar, Robert Schulze, Reza Sherkat, Amit Pathak
  • Patent number: 11379354
    Abstract: A storage management system monitors an indicator of whether data storage is or will exceed a threshold of storage utilization as stored on a current implementation resource, such as a storage server. The indicator may be used to determine whether none, some or all of the data storage should be moved from the current implementation resource to an available implementation resource.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: July 5, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Marc J. Brooker, David R. Richardson, Tate Andrew Certain, Tobias L. Holgers, Madhuvanesh Parthasarathy
  • Patent number: 11372571
    Abstract: A data storage and retrieval system for a computer memory including a memory slice formed of segments and adapted to contain one or more documents and a checkpoint adapted to persist the memory slice. The checkpoint includes a document vector containing a document pointer corresponding to a document. The document pointer including a segment identifier identifying a logical segment of the memory slice and an offset value defining a relative memory location of the first document within the identified segment. There are checkpoint memory blocks, each storing a copy of a corresponding segment of the memory slice. The segment identifier of the document pointer identifies a checkpoint memory block and the offset value of the document pointer defines a relative location of the document within the checkpoint memory block.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: June 28, 2022
    Assignee: SAP SE
    Inventors: Christian Bensberg, Steffen Geissinger
  • Patent number: 11366764
    Abstract: A method for managing a data cache, comprising: storing a cache management list comprising a plurality of entries and having: a tail part stored in a first storage and documenting recently accessed data items stored in the data cache, a body part stored in a second storage and documenting less recently accessed data items stored in the data cache, and a head part stored in the first storage and documenting least recently accessed data items stored in the data cache; and in each of a plurality of iterations: receiving at least one data access request; documenting the data access request in the tail; identifying a plurality of duplicated entries present in the body and the tail; and removing each of the plurality of duplicated entries from the body in the second storage according to a physical organization in the second storage of the plurality of duplicated entries.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: June 21, 2022
    Assignee: International Business Machines Corporation
    Inventors: Effi Ofer, Ety Khaitzin, Ohad Eytan
  • Patent number: 11355169
    Abstract: Methods, systems, and devices for a latency indication in a memory system or sub-system are described. An interface controller of a memory system may transmit an indication of a time delay (e.g., a wait signal) to a host in response to receiving an access command from the host. The interface controller may transmit such an indication when a latency associated with performing the access command is likely to be greater than a latency anticipated by the host. The interface controller may determine a time delay based on a status of buffer or a status of memory device, or both. The interface controller may use a pin designated and configured to transmit a command or control information to the host when transmitting a signal including an indication of a time delay. The interface controller may use a quantity, duration, or pattern of pulses to indicate a duration of a time delay.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: June 7, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Robert Nasry Hasbun, Dean D. Gans, Sharookh Daruwalla
  • Patent number: 11354206
    Abstract: A distributed processing method for executing partial order delivery of data on a plurality of computers connected via a network, the distributed processing method includes receiving the data by the plurality of computers. An output order in which the data is output by the partial order delivery is determined by the plurality of computers. The data to be output by dividing the data into a plurality of subsets equivalent among the plurality of computers and then stored in the output set.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: June 7, 2022
    Assignee: HITACHI, LTD.
    Inventors: Yosuke Wada, Nobuyuki Yamamoto
  • Patent number: 11347604
    Abstract: Withdrawal of a point-in-time snap copy relationship or a portion of such a relationship, is managed in a manner which can obviate disruption of consistency groups due to the withdrawal. If the withdrawal request is directed to a subrange of the original snap copy relationship, the snap copy relationship is split by creating one or more point-in-time snap copy relationships over one or more subranges of tracks of the snap copy source. A determination is made as to whether to delay execution of the withdrawal request to temporarily preserve data of the withdrawal range. Disruptions to completion of consistency groups may be avoided by selectively delaying the withdrawal of a snap copy relationship corresponding to the withdrawal subrange. In so far as the host is involved, a host may treat the withdrawal request as immediately granted without delay. Other aspects may be realized, depending upon the particular application.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: May 31, 2022
    Assignee: International Business Machines Corporation
    Inventors: Theresa M. Brown, Nicolas M. Clayton, Joshua J. Crawford, Nedlaya Y. Francisco, Theodore T. Harris, Jr., Gregory E. McBride, Carol S. Mellgren, Edgar X. Somoza, Damian Trujillo
  • Patent number: 11334668
    Abstract: A method and a device for securing a cache against side channel attacks are provided. An allocator identifier ALLOCATOR field is added to each cache entry in the present disclosure. Whenever an entry is allocated in the cache, the identifier of the software domain currently running on the processor is filled into the ALLOCATOR field of the allocation entry. When accessing the cache, the cache entry can be hit only if the identifier of the software domain currently running on the processor is identical to the ALLOCATOR field in the cache entry. If the cache entry to be replaced is invalid or its ALLOCATOR field is identical to the identifier of the software domain currently running on the processor, then the existing entry in the cache is replaced directly; otherwise, the entire cache is emptied.
    Type: Grant
    Filed: December 30, 2018
    Date of Patent: May 17, 2022
    Assignee: PHYTIUM TECHNOLOGY CO., LTD.
    Inventors: Qiang Dou, Tianlei Zhao, Chengyi Zhang, Jun Gao, Hongbo Xue, Xiaoyan Liu, Wenzhe Li, Yujiao Wang, Jiahong Yuan, Longpeng Sun, Shuijingtao Li, Zhe Ding, Xiaofeng Wang, Xiaodao Wang, Wenhui Cao, Shuaike Zheng, Boqing You, Yuan Yuan, Xiaoli Zou
  • Patent number: 11327679
    Abstract: A method is used for bitmap-based synchronous replication in a data protection system. The method includes, upon re-establishing communication with a first storage node, requesting, by a second storage node, a first bitmap from the first storage node. The method includes determining, by the second storage node, a set of data blocks to change on the first storage node based on the first bitmap and a second bitmap on the second storage node. The method also includes sending, by the second storage node to the first storage node, the set of data blocks.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: May 10, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Tianfang Xiong, Wai Yim, Yifeng Lu, Yue Yang
  • Patent number: 11301327
    Abstract: In general, the invention relates to a method for managing data. The method includes detecting a failure of a persistent storage device in a data node of a plurality of data nodes, and in response to the detecting, initiating a rebuilding of data in a spare location using proactive copy metadata and slice metadata, wherein the data is a copy of data that was stored in the persistent storage device.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: April 12, 2022
    Assignee: Dell Products L.P.
    Inventors: Dharmesh M. Patel, Rizwan Ali, Ravikanth Chaganti
  • Patent number: 11294807
    Abstract: The present disclosure generally relates to a method and device for reduce the amount of energy used to revert data within a storage device to a consistent state after a power loss event. Once power is lost from a host device, and prior to complete shutdown, a log is created within non-volatile memory (NVM) of the storage device. The log contains logical block addresses (LBAs) corresponding to data that experienced a write failure. At the next power-on event, the log is checked to see if any LBAs are present. If LBAs are present in the log, then the data that experienced a write failure can be properly written to the storage device.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: April 5, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Rajeev Nagabhirava, Avichay Haim Hodes, Judah Gamliel Hahn
  • Patent number: 11288353
    Abstract: Systems and methods are disclosed for providing secure access to a data storage device. A user may move the data storage device (e.g., wave, twist, etc.). The data storage device may determine whether the motions valid and may allow access to the data storage device (e.g., to non-volatile memory of the data storage device) when the motions are valid.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: March 29, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Jun Xu, Lei Zhang, Wei Xi, Dean Mitcham Jenkins, David W. Chew, Jianguo Zhou
  • Patent number: 11281535
    Abstract: In general, the invention relates to a method for managing data. The method includes detecting a persistent storage device failure in a persistent storage device of a plurality of persistent storage devices, and in response to the detecting, initiating a rebuilding of data in a spare persistent storage device using checkpoint metadata and slice metadata, wherein the data is a copy of data that was stored in the persistent storage device and wherein the spare persistent storage device is not one of the plurality of persistent storage device.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: March 22, 2022
    Assignee: Dell Products L.P.
    Inventors: Dharmesh M. Patel, Rizwan Ali, Ravikanth Chaganti
  • Patent number: 11269781
    Abstract: This disclosure provides techniques hierarchical address virtualization within a memory controller and configurable block device allocation. By performing address translation only at select hierarchical levels, a memory controller can be designed to have predictable I/O latency, with brief or otherwise negligible logical-to-physical address translation time. In one embodiment, address transition may be implemented entirely with logical gates and look-up tables of a memory controller integrated circuit, without requiring processor cycles. The disclosed virtualization scheme also provides for flexibility in customizing the configuration of virtual storage devices, to present nearly any desired configuration to a host or client.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: March 8, 2022
    Assignee: Radian Memory Systems, Inc.
    Inventors: Robert Lercari, Alan Chen, Mike Jadon, Craig Robertson, Andrey V. Kuzmin
  • Patent number: 11256614
    Abstract: Provided herein may be a memory controller and a method of operating the same. The memory controller for controlling a plurality of memory devices in which data is stored may include a host interface configured to receive a request and a logical address corresponding to the request from a host, a processor including multiple cores, each configured to receive the logical address from the host interface and generate mapping information indicating a mapping relationship between the logical address and a physical address and a bitmap storage configured to store a bitmap indicating which core of the multiple cores each of previously-received logical addresses is assigned, wherein the host interface assigns the logical address to one of the multiple cores based on the bitmap.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: February 22, 2022
    Assignee: SK hynix Inc.
    Inventors: Seung Ok Han, Seung Wan Jung
  • Patent number: 11237890
    Abstract: An aspect includes receiving a drive log page including data from a plurality of disk devices, in which the drive log page includes a plurality of attribute fields including a reassignment field that tracks data movement from a failing sector of a disk device to a new sector of the disk device. Performing, by the system, a failure prediction based on attribute data of the drive log page to identify one or more disk devices of the plurality of disk devices that are predicted to fail. Disabling, by the system, the one or more disk devices in response to the failure prediction.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: February 1, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David Verburg, Timothy O'Callaghan, M. Dean Sciacca
  • Patent number: 11237738
    Abstract: A method of managing operation of a data storage system (DSS) is provided. The method includes (a) reserving space within a dedicated metadata storage region (DMSR); (b) in response to determining that accommodating a storage request requires use of the reserved space, entering a restricted write mode; (c) while operating in the restricted write mode, using the reserved space in a process that frees space within the DMSR outside the reserved space; and (d) exiting the restricted mode in response to freeing space within the DMSR outside the reserved space. An apparatus, system, and computer program product for performing a similar method are also provided.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: February 1, 2022
    Assignee: EMC IP Holding Company, LLC
    Inventors: Xiongcheng Li, Vamsi K. Vankamamidi, Xinlei Xu, Jian Gao, Geng Han
  • Patent number: 11232036
    Abstract: Writes to one or more physical storage devices may be blocked after a certain storage consumption threshold (WBT) for each physical storage device. A WBT for certain designated physical storage devices may be applied in addition to, or as an alternative to, determining and applying a user-defined background task mode threshold (UBTT) for certain designated physical storage devices. In some embodiments, the WBT and UBTT for a physical storage device designated for spontaneous de-staging may be a same threshold value. Write blocking management may include, for each designated physical storage device, blocking any writes to the designated physical storage device after a WBT for the designated physical storage device has been reached, and restoring (e.g., unblocking) writes to the designated physical storage device after storage consumption on the physical storage device has been reduced to a storage consumption threshold (WRT) lower than the WBT.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: January 25, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Gabriel Benhanokh, Andrew L. Chanler, Arieh Don
  • Patent number: 11233874
    Abstract: A method for performing a write operation in a distributed storage system is disclosed. The method comprises receiving a first time-stamped write request from a proxy server. Further, the method comprises determining if the first time-stamped write request is within a time window of a reorder buffer and if the first time-stamped write request overlaps with a second time-stamped write request in the reorder buffer. Responsive to a determination that the first time-stamped write request is outside the time window or that the first time-stamped write request is within the time window but has an older time-stamp than the second time-stamped write request, the method comprises rejecting the first time-stamped write request. Otherwise, the method comprises inserting the first time-stamped write request in the reorder buffer in timestamp order and transmitting an accept to the proxy server.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: January 25, 2022
    Assignee: VMware, Inc.
    Inventor: Guillermo J. Rozas
  • Patent number: 11226942
    Abstract: A method and a system are provided for controlling deduplication in a storage pool. The method includes creating one or more deduplication domains within a storage pool, wherein storage volumes that are within a deduplication domain are deduplicated only with other volumes within the same deduplication domain and assigning storage volumes to a deduplication domain in order to control deduplication between storage volumes. The method may include, within a deduplication domain, blocklisting a volume from deduplication with a specified volume whilst allowing deduplication with other volumes in the deduplication domain.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: January 18, 2022
    Assignee: International Business Machines Corporation
    Inventors: Lee Jason Sanders, Ben Sasson, Gordon Douglas Hutchison
  • Patent number: 11226870
    Abstract: The disclosed computer-implemented method for marking application-consistent points-in-time may include intercepting, by an I/O filter, a write request from a guest virtual machine to a virtual machine disk and queueing the write request in an I/O filter queue. The method may include sending the write request to the virtual machine disk and receiving a write completion message from the virtual machine disk. The method may also include sending, in response to the write completion message, the write request to an I/O daemon, and queueing the write request in an I/O daemon queue. The method may further include sending the write completion message to the guest virtual machine, and sending the write request to a backup gateway such that the backup gateway mimics writes to the virtual machine disk. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: January 18, 2022
    Assignee: Veritas Technologies LLC
    Inventors: Chirag Dalal, Vaijayanti Bharadwaj, Pradip Kulkarni
  • Patent number: 11222664
    Abstract: A server box embodiment is disclosed that generally comprises an array of dummy HDDs that share a common set of universal disk drive components in a master components module, or power module. Each dummy HDDs is constructed without expensive onboard chipsets that control the normal functionality of a standard HDD. By sharing expensive chipsets in a master components module (power module) money can be saved in building and selling the dummy HDD server. Embodiments envision a power module possessing the needed chipset functionality that is missing in a dummy HDD. The power module can be made to move from dummy HDD to dummy HDD supplying the necessary chipset in a shared manner when data is being stored or retrieved for client or end-user.
    Type: Grant
    Filed: March 21, 2020
    Date of Patent: January 11, 2022
    Assignee: Spectra Logic Corporation
    Inventors: Nicholas Aldo Nespeca, Jon Benson, Stephen P. Neisen, Matt John Ninesling
  • Patent number: 11216269
    Abstract: An information handling system may include a processor, one or more storage resources communicatively coupled to the processor, including at least one of the one or more storage resources communicatively coupled to the processor via a storage interface, and a basic input/output system (BIOS) comprising a program of instructions executable by the processor and configured to cause the processor to initialize one or more information handling resources of the information handling system. The BIOS may be further configured to, in response to a request to perform a firmware update to the one or more storage resources, scan for storage resources communicatively coupled to the processor via the storage interface, register unique identifiers associated with the storage resources communicatively coupled to the processor via the storage interface, and perform a firmware update of the storage resources communicatively coupled to the processor via the storage interface based on the unique identifiers.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: January 4, 2022
    Assignee: Dell Products L.P.
    Inventors: Ajay Shenoy, Aniruddha Suresh Herekar, Manjunath Vishwanath, James Peter Giannoules, Ankit Singh, Naveen Karthick Chandrasekaran
  • Patent number: 11199995
    Abstract: A memory sub-system configured to be responsive to a time to live requirement for load commands from a processor. For example, a load command issued by the processor (e.g., SoC) can include, or be associated with, an optional time to live parameter. The parameter requires that the data at the memory address be available within the time specified by the time to live parameter. When the requested data is currently in the lower speed memory (e.g., NAND flash) and not available in the higher speed memory (e.g., DRAM, NVRAM), the memory subsystem can determine that the data cannot be made available with the specified time and optionally skip the operations and return an error response immediately.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: December 14, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Shivasankar Gunasekaran, Samuel E. Bradshaw, Justin M. Eno, Ameen D. Akel
  • Patent number: 11188250
    Abstract: Described herein are embodiments related to a two-stage hybrid memory buffer for multiple streams in memory sub-systems. A processing device determines that first write data of a first stream stored in a host buffer component satisfies a threshold to program a first programming unit. The processing device transfers the first write data to the staging buffer component from the host buffer component, and writes the first write data from the staging buffer component as the first programming unit to a first die of multiple non-volatile memory (NVM) dies. The processing device determines that second write data of a second stream satisfies a threshold to program a second programming unit, transfers the second write data to the staging buffer component from the host buffer component, and writes the second write data from the staging buffer component as the second programming unit to a second die of the multiple NVM dies.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: November 30, 2021
    Assignee: Micron Technology, Inc.
    Inventors: David G. Springberg, David Sluiter
  • Patent number: 11188430
    Abstract: Provided are a computer program product, system, and method for managing read and write requests from a host to tracks in storage cached in a cache. A determination is made whether track format table support information for a track indicates that a track format table was previously determined to have or not have the track format code for track format metadata. Track format metadata for the track is rebuilt to determine whether the track format table includes a track format code for the rebuilt track format metadata when the track format table support information indicates that the track format table was previously determined to have a track format code for the track. The track format metadata is not rebuilt when the track format table support information indicates that the track format table was previously determined to not have a track format code for the track.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: November 30, 2021
    Assignee: International Business Machines Corporation
    Inventors: Kyler A. Anderson, Kevin J. Ash, Susan K. Candelaria, Lokesh M. Gupta, Beth A. Peterson
  • Patent number: 11184435
    Abstract: A message transmission method and apparatus in a cluster file system includes determining, by a first host in a cluster file system, that the message network link is faulty; switching from the message network link for message transmission to a storage channel; generating a first message; and recording the first message in a first location area of a data storage medium, where the first location area is used by a second host to access and read the first message.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: November 23, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Weiwei Fu, Canquan Shen, Bin Wu
  • Patent number: 11182261
    Abstract: The disclosure herein describes enhancing data durability of a base component using multiple delta components. A first and second delta component are generated based on the base component becoming unavailable. A write operation targeted for the base component is routed to the first delta component and to the second delta component. Based on routing the write operation targeted for the base component to the first delta component and to the second delta component, a bit associated with a data block affected by the write operation is changed in each of the tracking bitmaps of the first and second delta components. Based on detecting the base component becoming available, one delta component of the first and second delta components is selected, and the data block affected by the routed write operation is synchronized from the selected delta component to the base component. Later, the first and second delta components are removed.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: November 23, 2021
    Assignee: VMware, Inc.
    Inventors: Eric Knauft, Enning Xiang, Ojan Thornycroft, Yiqi Xu, Asit Desai, Varun Shah
  • Patent number: 11175833
    Abstract: A method for controlling a data storage device is provided, which includes: upon detecting a use of the device by a user, determining whether the user corresponds to an identifier associated with a first user profile including access rights authorizing at least the writing and reading of data in a memory of the data storage device; if it is determined that the user corresponds to the identifier associated with the first user profile, controlling the use of the data storage device according to the first user profile; and if it is determined that the user does not correspond to the identifier associated with the first user profile, controlling the use of the data storage device according to a second user profile including access rights which permit the writing of data in the memory of the data storage device and which prohibit at least the reading of data, in the memory of the data storage device, that were not previously written by the user.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: November 16, 2021
    Assignee: ORANGE
    Inventor: Thierry Gaillet
  • Patent number: 11169879
    Abstract: Provided is a storage system that performs inter-node movement of parity and reconfiguration of a stripe when a node configuration is changed. The storage system includes a plurality of nodes and a management unit, in which the nodes are targets for data write and read requests, form a stripe by a plurality of data stored in different nodes and parity generated based on the plurality of data, and store the parity of the stripe to which the data under the write request belongs in a node different from the plurality of nodes that store the plurality of data so as to perform redundancy; and the management unit transmits, to the node, an arrangement change request to perform the inter-node movement of the parity and the reconfiguration of the stripe when the node configuration is changed.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: November 9, 2021
    Assignee: HITACHI, LTD.
    Inventors: Takahiro Yamamoto, Hiroto Ebara, Takeru Chiba, Masakuni Agetsuma
  • Patent number: 11163485
    Abstract: In an approach to intelligently choosing transport channels across protocols by drive type, one or more transport channels on a host are detected. One or more storage drive tiers on a target are detected. The one or more transport channels are mapped to the one or more storage drive tiers, based on performance. A transfer of a data between a host and the target is completed, using each transport channel and each storage drive tier.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: November 2, 2021
    Assignee: International Business Machines Corporation
    Inventors: Jing Lan Chen, Ning Ding, Yao Dong Zhang, Xu Chu Jiang, Zhi Zhi Huang, Wei Feng Yang
  • Patent number: 11165564
    Abstract: Embodiments are directed to managing resources over a network. Objects that each correspond to a separate key container may be provided such that each separate key container includes a region key, a shard key, a nonce key. A data center and a data store may be determined for each object based on the region key and the shard key included in each separate key container such that a value of the region key corresponds to the data center and a value of the shard key corresponds to the data store.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: November 2, 2021
    Assignee: SkedgeAlert, Inc.
    Inventor: Darryl Pennock West
  • Patent number: 11163650
    Abstract: A proactive data recovery system is provided. The system includes a memory having computer-readable instructions stored therein and a processor configured to execute the computer-readable instructions to access a data storage platform and to monitor a plurality of parameters indicative of a requirement of data restore and/or recovery for the data storage platform. The requirement corresponds to a predicted occurrence of a disaster event. The processor is further configured trigger backup of data stored in the data storage platform based upon the plurality of parameters to create a restore package and to initiate the data restore and/or data recovery operation for the data storage platform using the restore package in response to the occurrence of the disaster event.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: November 2, 2021
    Assignee: Druva Inc.
    Inventors: Amar Solanke, Somesh Jain, Ramanan Balakrishnan, Jaspreet Singh
  • Patent number: 11163657
    Abstract: A method for use in a storage system, comprising: detecting that at least one storage device in a redundant storage device array has failed, the redundant storage device array including a plurality of storage devices; storing, in a memory, a recovery cache containing recovered data blocks, the recovered data blocks containing data previously stored on the failed storage device that has been calculated as part of executing read commands before the redundant storage device array is rebuilt; receiving an I/O command that is associated with the redundant storage device array, the I/O command including one of a read command or a write command; and executing the I/O command by using the recovery cache, wherein the redundant storage device array includes a plurality of storage regions, wherein any of the storage regions includes a respective portion of each of the plurality of storage devices.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: November 2, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Lior Kamran, Alex Soukhman
  • Patent number: 11163684
    Abstract: Provided is a predictive read ahead system for dynamically prefetching content from different storage devices. The dynamic prefetching may include receiving requests to read a first set of data of first content from a first storage device at a first rate, and requests to read a first set of data of second content from a second storage device at a different second rate. The dynamic prefetching may include determining different performance for the first storage device than the second storage device, prioritizing an allocation of cache based on a first difference between the first rate and the second rate, and a second difference based on the different performance between the storage devices, and prefetching a first amount of the first content data from the first storage device and a different second amount of the second content data from the second storage device based on the first and second differences.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: November 2, 2021
    Assignee: Open Drives, Inc.
    Inventors: Scot Gray, Sean Lee
  • Patent number: 11157193
    Abstract: A write request to program data to a memory device of a memory sub-system is received. An intermediate entry of a data structure is generated, the intermediate entry including a pointer identifying a write buffer associated with an intermediate write operation corresponding to the write request. A read request to read the data from the memory device is received and a look-up operation of the data structure is performed to identify the intermediate entry. Using the pointer to locate the write buffer associated with the intermediate write operation. The write buffer is copied to a read buffer associated with the read request and the read request is executed using the read buffer.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: October 26, 2021
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Peng Xu, Jiangang Wu, Yun Li