Abstract: A memory module includes at least two memory devices. Each of the memory devices perform verify operations after attempted writes to their respective memory cores. When a write is unsuccessful, each memory device stores information about the unsuccessful write in an internal write retry buffer. The write operations may have only been unsuccessful for one memory device and not any other memory devices on the memory module. When the memory module is instructed, both memory devices on the memory module can retry the unsuccessful memory write operations concurrently. Both devices can retry these write operations concurrently even though the unsuccessful memory write operations were to different addresses.

Abstract: Provided are a data processing method and apparatus, a device, and a storage medium, which relate to the technical field of cloud computing and cloud platform. The specific implementation scheme includes: determining, according to logic information of first data acquired from an ordering tool, first physical addresses, where the first physical addresses are physical addresses of data shards in a physical data group associated with the first data; and sending the first physical addresses to the ordering tool to cause the ordering tool to order the first data according to the first physical addresses.

Abstract: Disclosed herein are system, method, and computer program product embodiments for adaptive caching for hybrid columnar databases with heterogeneous page sizes. An embodiment operates by receiving a request to load a new page of memory from a disk in a buffer cache. The embodiment scans one or more pools comprising one or more pages of the same size in a buffer cache. The embodiment determines an increment of a reuse rate for the pools in the buffer cache within a time interval. The embodiment determines a cumulative reuse rate that is the sum of the increments of the reuse rate over several time intervals. The embodiment determines a gliding average reuse rate of the cumulative reuse rate over several time intervals. The embodiment compares the average reuse rates of the plurality of the pools to a threshold to dynamically determine whether a pool should reuse memory from the existing pages of the same pool or rebalance memory from one or more victim pools.

Abstract: Embodiments of the present invention are directed to a computer-implemented method for controller address contention assumption. A non-limiting example computer-implemented method includes a shared controller receiving a fetch request for data from a first requesting agent, the receiving via at least one intermediary controller. The shared controller performs an address compare using a memory address of the data.

Abstract: A method and system for controlling multiple client access to cache memory and a single CAM device. Each client has a corresponding integrity controller in communication with the CAM device and all the other integrity controllers associated with the other clients in the system. Each integrity controller monitors states of the other clients, and inhibits its respective client from executing any operation when a common lookup index is detected during a co-pending operation with a first client. Once the operations of the first client are completed, its integrity controller signals the integrity controller of other clients to exit their inhibit or hold states, thereby allowing the other clients to resume their operations. Another advantage of the integrity controller is that its algorithms also prevents multiple host memory fetches of the same key, thereby saving time and improving system performance.

Abstract: Provided are a method, system, and article of manufacture for monitoring patterns of processes accessing addresses in a storage device to determine access parameters to apply. Processes accessing addresses of data in a storage device are monitored. The processes are granted access to the addresses according to first access parameters that indicate how to arbitrate access by processes to the addresses. A condition occurring in response to a pattern of processes accessing addresses is detected. A determination is made of one of the processes in the pattern and the address accessed by the determined process. Indication is made that second access parameters apply for the determined address. The second access parameters are used to grant access to the determined address for subsequent accesses of the indicated address.

Abstract: Disclosed is a method and apparatus for crossbar arbitration. In one embodiment, the crossbar arbitration includes a memory, a plurality of functional units that transfer data to and from the memory, a crossbar unit that provides a data path from each unit to the memory, and an arbitration unit that monitors data traffic generated by each functional unit through the crossbar unit and assigns a priority to each functional unit based on the data traffic. In another embodiment, the crossbar arbitration includes a method for data transfer arbitration including monitoring data transfers for a plurality of devices, and assigning a priority to each device corresponding to the amount of data transfers generated by the device.