In Hierarchically Structured Memory Systems, E.g., Virtual Memory Systems, Etc. (epo) Patents (Class 711/E12.016)
- Using pseudo-associative means, e.g., set-associative, hashing, etc. (EPO) (Class 711/E12.018)
- For peripheral storage systems, e.g., disc cache, etc. (EPO) (Class 711/E12.019)
- With dedicated cache, e.g., instruction or stack, etc. (EPO) (Class 711/E12.02)
- Using selective caching, e.g., bypass, partial write, etc. (EPO) (Class 711/E12.021)
- Using clearing, invalidating, or resetting means (EPO) (Class 711/E12.022)
- Multi-user, multiprocessor, multiprocessing cache systems (EPO) (Class 711/E12.023)
- With multilevel cache hierarchies (EPO) (Class 711/E12.024)
- With a network or matrix configuration (EPO) (Class 711/E12.025)
- Cache consistency protocols (EPO) (Class 711/E12.026)
- Using directory methods (EPO) (Class 711/E12.027)
- Copy directories (EPO) (Class 711/E12.028)
- Associative directories (EPO) (Class 711/E12.029)
- Distributed directories, e.g., linked lists of caches, etc. (EPO) (Class 711/E12.03)
- Limited pointers directories; state-only directories without pointers (EPO) (Class 711/E12.031)
- With concurrent directory accessing, i.e., handling multiple concurrent coherency transactions (EPO) (Class 711/E12.032)
- Using a bus scheme, e.g., with bus monitoring or watching means, etc. (EPO) (Class 711/E12.033)
- With software control, e.g., non-cacheable data, etc. (EPO) (Class 711/E12.036)
- With cache invalidating means (EPO) (Class 711/E12.037)
- With shared cache (EPO) (Class 711/E12.038)
- For multiprocessing or multitasking (EPO) (Class 711/E12.039)
- With main memory updating (EPO) (Class 711/E12.04)
- Organization and technology of caches (EPO) (Class 711/E12.041)
- Multiple simultaneous or quasi-simultaneous cache accessing (EPO) (Class 711/E12.044)
- Cache access modes (EPO) (Class 711/E12.052)
- With pre-fetch (EPO) (Class 711/E12.057)
- Using page tables, e.g., page table structures, etc. (EPO) (Class 711/E12.059)
- Using associative or pseudo-associative address translation means, e.g., translation look-aside buffer (TLB), address translation buffer (ATB), address cache, etc. (EPO) (Class 711/E12.061)
- Decentralized address translation, e.g., in distributed shared memory systems, etc. (EPO) (Class 711/E12.066)
- For peripheral accesses to main memory, e.g., DMA, etc. (EPO) (Class 711/E12.067)
- For multiple virtual address spaces, e.g., segmentation, etc. (EPO) (Class 711/E12.068)
- Using a replacement algorithm (EPO) (Class 711/E12.07)
- Of the least frequently used type, e.g., with individual count value, etc. (EPO) (Class 711/E12.071)
- With age list, e.g., queue, MRU-LRU list, etc. (EPO) (Class 711/E12.072)
- With special data handling, e.g., priority of data or instructions, pinning, errors, etc. (EPO) (Class 711/E12.075)
- Adapted to multidimensional cache systems, e.g., set-associative, multi-cache, multi-set, or multilevel, etc. (EPO) (Class 711/E12.077)