Being Generated By Decoding Array Or Storage (epo) Patents (Class 711/E12.074)
  • Patent number: 11567690
    Abstract: A semiconductor memory device is provided. The semiconductor memory device includes a memory core including a plurality of memory cells configured to store a plurality of data received from an external processor; and a statistical feature extractor disposed on a data path between the external processor and the memory core, the statistical feature extractor being configured to analyze statistical characteristics of the plurality of data, identify at least one statistical feature value associated with the statistical characteristics, store the at least one statistical feature value and transmit the at least one statistical feature value to the external processor.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: January 31, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoungyoung Kim, Sangsoo Ko, Byeoungsu Kim, Jaegon Kim, Sanghyuck Ha
  • Patent number: 8140819
    Abstract: The invention describes apparatus and method for receiving and decoding a multiplexed data stream organized in sectors containing payload portions individually destined for one of two or more decoders. The apparatus is connected to a memory device addressable in an address space. At least one of the decoders generates read and/or write addresses from within a predetermined address range that is a true subset of the address space. For avoiding additional memory accesses caused by moving data already contained in the memory into the decoder address range, the apparatus has an address translator which translates the decoder addresses into translated addresses and uses the translated addresses for accessing the memory device.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: March 20, 2012
    Assignee: Thomson Licensing
    Inventor: Marco Winter
  • Patent number: 7958305
    Abstract: This invention is a system and method for managing one or more data storage networks using a new architecture. A method for handling logical to physical mapping is included in one embodiment with the new architecture. A method for handling errors is included in another embodiment with the new architecture.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: June 7, 2011
    Assignee: EMC Corporation
    Inventors: Fernando Oliveira, Bradford B. Glade, Jeffrey A. Brown, Peter J. McCann, David Harvey, James A. Wentworth, III, Walter M. Caritj, Matthew Waxman, Lee W. VanTine
  • Patent number: 7739448
    Abstract: This invention is a system and method for managing one or more data storage networks using a new architecture. A method for handling logical to physical mapping is included in one embodiment with the new architecture. A method for handling errors is included in another embodiment with the new architecture.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: June 15, 2010
    Assignee: EMC Corporation
    Inventors: Fernando Oliveira, Bradford B. Glade, Jeffrey A. Brown, Peter J. McCann, David Harvey, James A. Wentworth, III, Walter M. Caritj, Matthew Waxman, Lee W. VanTine