Abstract: A manner of processing data for transmission in a data communication network. A node having a main memory and an interleaver is provided. Received data is stored in the main memory and a bandwidth map is prepared. The data is then selectively read out and pre-processed according to the bandwidth map and stored in an interleaver memory. The data is later read out and post-processed before interleaving into a downstream data frame. The pre- and post-processing provide the data in a more efficient form for interleaving.
Type:
Grant
Filed:
September 30, 2013
Date of Patent:
May 30, 2017
Assignee:
Alcatel Lucent
Inventors:
Dusan Suvakovic, Adrian J. de Lind van Wijngaarden
Abstract: A data updating method, a memory system and a memory device in which the memory device is connectable to a host device and has a memory section and a memory controller, the memory section consists of a first memory section which can be divided into partitions having multiple different attributes, and a work space which is managed by the memory controller, and the method of updating data which is stored in the memory device uses one of the writing methods which has been selected from among multiple different writing methods of writing data into the partition, depending on the attribute of the partition, to perform an updating process, and can securely update the data.
Abstract: A system and method for creating an on-demand virtual drive from dedicated storage on a plurality of partners in a peer-to-peer network using an agent installed on each of the partners. The agent has a contributing program and a requesting program. The contributing program creates a first storage unit and a second storage unit, formatting the second storage unit so that it is not visible to the operating system of the partner and transmitting the size of the second storage unit to the other partners. The requesting partner creates a virtual drive using space on selected partner's second drives, and directs data blocks in and out of the virtual drive. A rules engine incorporating RAID algorithms governs the selection of the partners and allocation of available space.
Type:
Application
Filed:
July 17, 2008
Publication date:
January 21, 2010
Inventors:
Carl Phillip Gusler, Rick Allen Hamilton, II, James Wesley Seaman, Timothy Moffett Waters
Abstract: A method for translating memory addresses in a plurality of nodes, that includes receiving a first memory access request initiated by a processor of a first node of the plurality of nodes, wherein the first memory access request comprises a process virtual address and a first memory operation, translating the process virtual address to a global system address, wherein the global system address corresponds to a physical memory location on a second node of the plurality of nodes, translating the global system address to an identifier corresponding to the second node, and sending a first message requesting the first memory operation to the second node based on the identifier, wherein the second node performs the first memory operation on the physical memory location.
Type:
Application
Filed:
September 28, 2007
Publication date:
April 2, 2009
Applicant:
SUN MICROSYSTEMS, INC.
Inventors:
Christopher A. Vick, Anders Landin, Olaf Manczak, Michael H. Paleczny, Gregory M. Wright