Active/idle Mode Processing Patents (Class 713/323)
  • Patent number: 11157761
    Abstract: An object recognition device, method and computer program product, the device including a sensor having a plurality of pixels, a mask, where the pixels include a non-masked first group that receives a first wavelength, and a masked second group that receives a second wavelength differing from the first, where the mask passes at most 10% of energy of the first wavelength, and the second group are a majority of the pixels, a light source radiating in the second wavelength, and a processor for operating in a first mode where light in the first wavelength is received by the first group, including capturing a first image by the first group, and analyzing the first image, to recognize a trigger event, and subject to the trigger event, operating in a second mode, including: activating the light source, capturing a second image by the second group, and analyzing the second image.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: October 26, 2021
    Assignee: EMZA VISUAL SENSE LTD.
    Inventor: Tomer Kimhi
  • Patent number: 11157063
    Abstract: A control system includes: a controller that controls a control unit of a control device, the control unit controlling multiple function units; and a restorer that is capable of receiving a first instruction for restoration from an energy-saving mode from a user who is in a proximate location near the controller, and a second instruction for the restoration from a user who is in a location further away than the proximate location, the restorer altering a timing for restoration of the control unit between a case where there the first instruction is received and a case where the second instruction is received.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: October 26, 2021
    Assignee: FUJIFILM Business Innovation Corp.
    Inventors: Shinho Ikeda, Asahito Shioyasu, Tomoki Tanihata, Hisashi Noda, Kenta Nomura
  • Patent number: 11157329
    Abstract: A processor comprises multiple cores and power management control logic to determine (a) a preliminary frequency for each of the cores and (b) a maximum frequency, based on the preliminary frequencies. The power management control logic is also to determines a dynamic tuning frequency, based on the maximum frequency and a reduction factor. In response to the dynamic tuning frequency for a selected core being greater than the preliminary frequency for that core, the power management control logic is to set the core to a frequency that is at least equal to the dynamic tuning frequency. In response to the preliminary frequency for the selected core being greater than the dynamic tuning frequency for that core, the power management control logic is to set the core to a frequency that is at least equal to the preliminary frequency. Other embodiments are described and claimed.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: October 26, 2021
    Assignee: Intel Corporation
    Inventors: Eliezer Weissmann, Hisham Abu-Salah, Nir Rosenzweig, Efraim Rotem
  • Patent number: 11157302
    Abstract: A system and method are disclosed for managing idle processors in virtualized systems. A hypervisor executing on a host comprising one or more physical processors receives an anticipated idle time for a physical processor of the one or more physical processors of the host from a guest operating system of a virtual machine executing on the host. In response to determining that a function of the anticipated idle time exceeds an exit time of a first power state of the physical processor, the physical processor is caused to be halted and placed in the first power state.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: October 26, 2021
    Assignee: Red Hat, Inc.
    Inventors: Henri Han van Riel, Michael Tsirkin
  • Patent number: 11157067
    Abstract: A power controller that controls power usage of a heterogeneous system is provided. The power controller receives a power usage cap for a heterogeneous system that includes multiple components. The power controller assigns priorities that respectively correspond to the multiple components. The power controller assigns power shifting ratios that respectively correspond to the multiple components. The power controller adjusts a total power usage of the multiple components to be within a threshold of the power usage cap by adjusting the power usage of individual components in a sequence defined by the assigned priorities. The power controller shifts a power usage from a first-priority component to a second-priority component (and so on) according to the assigned power shifting ratios.
    Type: Grant
    Filed: December 14, 2019
    Date of Patent: October 26, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eun Kyung Lee, Alper Buyuktosunoglu, Martha Broyles, Todd Rosedahl
  • Patent number: 11151254
    Abstract: A secure communications system that includes a trusted platform for securing user data and managing manifestation of user data to third parties in response to requests. The trusted platform may include a platform execution environment that coordinates with a trusted execution environment (TEE) for individual secure user profiles to manage requests for access. In some examples, partners may deploy partner programs to the TEE of a secure user profile for execution against secured user data in the secure user profile. All transactions in the trusted platform may be recorded in a ledger to provide an auditable history for all platform activity. All communication within the trusted platform may be by a secure communications protocol with a security gateway.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: October 19, 2021
    Assignee: AMARI.AI INCORPORATED
    Inventors: Jonathan Alan Simmons, Eddie B. Satterly
  • Patent number: 11150714
    Abstract: Embodiments of the present disclosure provide a storage device and a method for powering the storage. The storage device is powered by a main power supply and the storage device comprises a processor, a baseboard management controller (BMC), a plurality of disks, a first backup power supply and a second backup power supply. The first backup power supply is at least coupled to the processor, and the second backup power supply is at least coupled to the baseboard management controller. Embodiments of the present disclosure enable flexible spatial arrangement of backup power supplies by arranging a plurality of backup power supplies in the storage device.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: October 19, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Jesse Xizhi Cui, Alice Aiqin Liu, Haifang Zhai, Tao Yang, Jing Chen
  • Patent number: 11138017
    Abstract: A system and method for partition administrative (admin) targeting in an application server, cloud, or other computing environment. An application server can include one or more partitions, wherein each partition provides an administrative and runtime subdivision of a domain. An administrative virtual target associated with a partition enables an administrator to identify an administrative resource group, including one or more administrative applications or resources, for use with the partition. A partition administrative lifecycle state (e.g., SHUTDOWN) can be associated with various substates (e.g., BOOTED or HALTED). When a partition is associated with a first state or substate (e.g., SHUTDOWN.BOOTED), the administrative resource group in that partition continues to run at an associated target, while other resource groups are shut down. When a partition is associated with a second state or substate (e.g., SHUTDOWN.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: October 5, 2021
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Joseph Dipol, Timothy Quinn, Romain Grecourt
  • Patent number: 11139511
    Abstract: A control circuit for controlling a battery core includes a power input terminal electrically connected to the battery core, a ferromagnetic random access memory having a dynamic mode and a non-volatile mode, and a control unit electrically connected with the ferromagnetic random access memory and the power input terminal. The control unit is configured to acquire state information of the battery core and store the state information to the ferromagnetic random access memory, and switch on or off an electrical connection between the power input terminal and the battery core to switch the ferromagnetic random access memory to the dynamic mode or the non-volatile mode.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: October 5, 2021
    Assignee: SZ DJI TECHNOLOGY CO., LTD.
    Inventors: Dayang Zheng, Lei Wang, Wentao Wang, Juncheng Zhan, Bogao Xu
  • Patent number: 11132470
    Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which security measures may be implemented to control access to a fuse array (or other secure features) of the memory devices based on a secure access key. In some cases, a customer may define and store a user-defined access key in the fuse array. In other cases, a manufacturer of the memory device may define a manufacturer-defined access key (e.g., an access key based on fuse identification (FID), a secret access key), where a host device coupled with the memory device may obtain the manufacturer-defined access key according to certain protocols. The memory device may compare an access key included in a command directed to the memory device with either the user-defined access key or the manufacturer-defined access key to determine whether to permit or prohibit execution of the command based on the comparison.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: September 28, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Brenton P. Van Leeuwen, Nathaniel J. Meier
  • Patent number: 11132667
    Abstract: Various embodiments are described herein that relate to data transmission system and methods that may be implemented in a system configured between a source device and a destination device. Data generated at the source device may be received at the data transmission system and processed to determine appropriate modifications. Modified data may then be transmitted to the destination device. In the event that the data transmission system is unable to process data, the system transmits the data directly to the recipient device to ensure continued operation of the source and destination devices. The data transmission system is capable of converting any form of signal into USB and/or UART signals for processing.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: September 28, 2021
    Assignee: Copper Inc.
    Inventors: Tobias Schneider, Dickson Chu
  • Patent number: 11126240
    Abstract: A communication node in a vehicle network may comprise a medium access control (MAC) layer; a physical (PHY) layer; a first port connected to the PHY layer; a second port connected to the PHY layer; and a switch controlling a connection between the first port and the second port. The switch may turn on or off the connection between the first port and the second port under control of the MAC layer.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: September 21, 2021
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Dong Ok Kim, Kang Woon Seo, Jin Hwa Yun
  • Patent number: 11128163
    Abstract: A solar power generation control device controls a solar power generation system storing electric power generated by a solar panel in a battery. The solar power generation control device includes a detection unit configured to detect a state of the battery, and a controller configured to control, based on the state of the battery, a sleep time for temporarily stopping the solar power generation system when a predetermined sleep condition is satisfied.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: September 21, 2021
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Tatsuya Miyoshi, Kazumi Yamada, Koichi Go, Haruki Matsuoka
  • Patent number: 11099622
    Abstract: An IHS Handling System (IHS) may be transported within various types of bags. Upon reaching a new location, a user removes the IHS from the bag and prefers that the IHS is ready for use as quickly as possible. Embodiments reduce response times of an IHS that is transported within a bag. While the IHS is configured in a standby power state, sensor readings are collected from sensors of the IHS. Based on the collected sensor readings, a first likelihood is determined of whether the IHS is located in a computer bag. Further based on the collected sensor readings, a second likelihood is determined of whether the IHS will be removed from the computer bag. The IHS is woken from the standby power state and configured for use based on the first likelihood or the second likelihood.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: August 24, 2021
    Assignee: Dell Products, L.P.
    Inventors: Daniel L. Hamlin, Vivek Viswanathan Iyer
  • Patent number: 11093384
    Abstract: An access method of a nonvolatile memory device included in a user device includes receiving a write request to write data into the nonvolatile memory device; detecting an application issuing the write request, a user context, a queue size of a write buffer, an attribute of the write-requested data, or an operation mode of the user device; and deciding one of a plurality of write modes to use for writing the write-requested data into the nonvolatile memory device according to the detected information. The write modes have different program voltages and verify voltage sets.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: August 17, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sangkwon Moon, Kyung Ho Kim, Seunguk Shin, Sung Won Jung
  • Patent number: 11095466
    Abstract: A packet transmission control method used in a packet transmission circuit is provided that includes the steps outlined below. A packet receiving circuit, processing circuits and a packet sending circuit of the packet transmission circuit are kept in a non-operation status. The packet receiving circuit is woken up to the operation status to receive the packet stream and is restored to the non-operation status. The processing circuits are woken up to an operation status respectively according to an operation order thereof to receive, transmit and process the packet stream within a respective process time period and are restored to the non-operation status after the packet stream is processed. The packet sending circuit is woken up to the operation status to transmit the packet stream processed by the processing circuits to an external device and is restored to the non-operation status after the packet stream is transmitted.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: August 17, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventor: Chung-Chang Lin
  • Patent number: 11095204
    Abstract: A circuit is disclosed. The circuit includes a power supply node and a system configured to receive current from the power supply node at a regulated voltage and to generate one or more control signals indicating an anticipated change in the current. The circuit also includes a voltage regulator configured to provide the current to the power supply node and to drive the power supply node with the regulated voltage, where the value of the regulated voltage is based at least in part on the one or more control signals.
    Type: Grant
    Filed: July 4, 2019
    Date of Patent: August 17, 2021
    Assignee: Empower Semiconductor, Inc.
    Inventors: Parag Oak, David Lidsky
  • Patent number: 11079261
    Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: August 3, 2021
    Assignee: Apple Inc.
    Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal
  • Patent number: 11074958
    Abstract: A memory refresh method is applied to a computer system including a processor, a memory controller, and a dynamic random access memory (DRAM). The memory controller receives a first plurality of access requests from the processor. The memory controller refreshes a first rank in a plurality of ranks at shortened interval set to T/N when a quantity of target ranks to be accessed by the first plurality of access requests is less than a first threshold and a proportion of read requests in the first plurality of access requests or a proportion of write requests in the first plurality of access requests is greater than a second threshold. T is a standard average refresh interval, and N is greater than 1. The memory refresh technology provided in this application can improve performance of the computer system in a memory refresh process.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: July 27, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xing Hu, Chuanzeng Liang, Shihai Xiao, Kanwen Wang
  • Patent number: 11073889
    Abstract: A computing device and method controls power consumption of a graphics processing unit in the computing device by the GPU determining an allocated power for the USB device connected through a USB port, such as a USB-C port. The GPU issues allocated power information for the external USB device to cause the allocated power to be provided to the USB device and includes issuing allocated power information to a power delivery (PD) controller that is connected to a USB port. In some implementations, the GPU shifts at least a portion of the allocated power from the USB device back to the GPU in response to a usage change event associated with the USB device for improving GPU performance. The usage change event can be a disconnect event of the USB device, a power renegotiation event between the USB device and the GPU, or any other suitable usage change event.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: July 27, 2021
    Assignee: ATI Technologies ULC
    Inventors: Vincent Cueva, Gia Tung Phan
  • Patent number: 11068036
    Abstract: A control method of a portable electronic device (PED) includes following steps. A trigger event is received. Next, an accelerator detects a first behavior of the PED and produces a first signal. If the first signal satisfies a first preset condition, the accelerator detects a second behavior of the PED and produces a second signal. If the second signal satisfies a second preset condition, the PED performs an action.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: July 20, 2021
    Assignee: PEGATRON CORPORATION
    Inventor: Shih-Hao Chen
  • Patent number: 11057300
    Abstract: An energy-efficient traffic scheduling algorithm based on multiple layers of virtual sub-topologies is provided. First, a mathematical optimization model for an energy-efficient traffic scheduling problem is established, to minimize network energy consumption while ensuring the capability of bearing all network data flows. Then, the mathematical optimization model is resolved using an energy-efficient traffic scheduling algorithm based on a multi-layer virtual topology, to obtain an energy-efficient scheduling scheme of the data flows. The virtual topology and switch ports in an upper layer are made dormant to save energy. The method can dynamically adjust the working state of the virtual sub-topology in the upper layer according to current link utilization. A path with a minimum number of hops and lowest maximum link utilization can be found in the booted sub-topology, to route the data flow, solving the problem that a “rich-connection” data center network has low energy resource utilization at low load.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: July 6, 2021
    Assignee: Inner Mongolia Agricultural University
    Inventors: Honghui Li, Xueliang Fu, Weidong Li
  • Patent number: 11054870
    Abstract: Particular embodiments described herein provide for an electronic device that can include a first housing, a second housing, where the second housing is rotatably coupled to the first housing using a hinge, and at least one thermal sensor to detect the position of a user relative to the electronic device, wherein the thermal sensor includes an array of thermopiles.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: July 6, 2021
    Assignee: Intel Corporation
    Inventors: Gokul V. Subramaniam, Arvind Sundaram
  • Patent number: 11049437
    Abstract: An object is to provide a semiconductor device with low power consumption. The semiconductor device includes a controller, a register, and an image processing portion. The image processing portion has a function of taking image data from a frame memory and a parameter from the register and processing the image data by using the parameter. The frame memory has a function of retaining the image data while power supply is stopped. The register has a function of retaining the parameter while power supply is stopped. The controller controls power supply to the register, the frame memory, and the image processing portion. The register includes first and second scan chain registers. The first scan chain register stores a parameter related to a first display region. The second scan chain register stores a parameter related to a second display region. A parameter is changed by loading of data of the first or second scan chain register.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: June 29, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshiyuki Kurokawa
  • Patent number: 11048313
    Abstract: Described herein are automated hierarchical feed-back driven control mechanisms and methods, including an apparatus comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may be operable to receive a system operating characteristic guidance. The second circuitry may be operable to provide one or more manufacturing characteristics. The third circuitry may be operable to store one or more system operating characteristics based upon the system operating characteristic guidance and the one or more manufacturing characteristics.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: June 29, 2021
    Assignee: Intel Corporation
    Inventors: Siddhartha Jana, Federico Ardanaz, Jonathan M. Eastep, Yaxin Shui, Keith Underwood
  • Patent number: 11036275
    Abstract: Described are mechanisms and methods for applying Machine Learning (ML) techniques for power management at different levels of a power management stack. An apparatus may comprise a first circuitry, a second circuitry, and a third circuitry. The first circuitry may have a plurality of memory registers. The second circuitry may be operable to establish values for a plurality of features based on samples of values of the plurality of memory registers taken at one or more times within a range of time of predetermined length. The third circuitry may be operable to compare the plurality of features against a plurality of learned parameters for a reference workload.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: June 15, 2021
    Assignee: Intel Corporation
    Inventors: Shravan Kumar Belagal Math, Noor Mubeen, Harinarayanan Seshadri
  • Patent number: 11033176
    Abstract: The present disclosure relates to a surgical system, a surgical device, and a surgical method with which startup time can be shortened. Upon receipt of an instruction from a startup execution process, a high-speed startup driver creates a high-speed startup image and writes it to an SSD. The startup execution process is a process that is executed first after an OS is started up, and has the function of executing, in cooperation with the high-speed startup driver, startup of various processes in an endoscope program, creation of a high-speed startup image, and return from the high-speed startup image. The present disclosure can be applied to, for example, a surgical system provided with an imaging device including an endoscope or a microscope.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: June 15, 2021
    Assignee: SONY CORPORATION
    Inventors: Koji Obata, Makoto Korehisa, Kazumi Sato, Kan Iibuchi, Kazunori Yamamoto
  • Patent number: 11036634
    Abstract: Provided are an apparatus, system, and method to flush modified data from a first memory to a persistent second memory. A first memory controller coupled to the first memory includes at least one RAS controller to read a range of addresses in the first memory. In response to receiving a command from the power control unit, the at least one RAS controller is invoked to read data from at least one range of addresses specified for the RAS controller from the first memory. A second memory controller transfers data read from the first memory determined to be modified to the second memory. The first memory controller sends a signal to the power control unit to indicate that the modified data in the range of addresses specified for the RAS controller was flushed to the second memory in response to the RAS controller completing reading the range of addresses.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: June 15, 2021
    Assignee: Intel Corporation
    Inventors: Wei Chen, Rajat Agarwal, Jing Ling, Daniel W. Liu
  • Patent number: 11036668
    Abstract: An electronic apparatus includes a semiconductor integrated circuit, another semiconductor integrated circuit connected to the semiconductor integrated circuit via a peripheral component interconnect (PCI) bus, and devices (a hard disk drive (HDD), and a dynamic random access memory (DRAM)) connected to the another semiconductor integrated circuit. The semiconductor integrated circuit transmits a predetermined instruction to the another semiconductor integrated circuit, and the another semiconductor integrated circuit shifts the PCI bus to a non-communicable state or a state communicable at low speed. Thereafter, the another semiconductor integrated circuit shifts the devices (the HDD and the DRAM) to a power saving state.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: June 15, 2021
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshio Yoshihara, Hiroaki Niitsuma
  • Patent number: 11029743
    Abstract: Provided is an information processing device that includes an acquisition unit configured to acquire sensing data and a mode changing unit configured to change a mode on a basis of the sensing data. The acquisition unit changes sensing data to be acquired on a basis of the change of the mode.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: June 8, 2021
    Assignee: SONY CORPORATION
    Inventor: Yasutaka Fukumoto
  • Patent number: 11023337
    Abstract: An information processing system includes a plurality of control apparatuses communicably coupled to each other. A first control apparatus of the plurality of control apparatuses includes a first memory configured to store first instructions and a first processor configured to operate using standby power before a power-on selection is made. The first processor executes the first instructions causing a process including collecting first identification information of each of the plurality of control apparatuses other than the first control apparatus. The process includes storing the first identification information in the first memory. The process includes determining a role of the first control apparatus based on a comparison result derived by comparing second identification information of the first control apparatus with the first identification information.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: June 1, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Tatsuya Shinozaki, Takanori Ishii, Keisuke Yamasaki
  • Patent number: 11016857
    Abstract: A method, computer program product, and computer system to maintain high availability of a service processor. An embodiment provides program code with a location of a second service processor (the second service processor is communicatively coupled to the first service processor). The program code stops a virtual machine during runtime, including instruction execution and IO operations, where during runtime, the virtual machine executes one or more processes to service and manage computing resources in the distributed computing environment. The program code generates a micro-checkpoint of the virtual machine. The program code resumes the instruction execution of the virtual machine and transmits the micro-checkpoint to a second service processor based on the location and then resumes IO operations. The second service processor utilizes the micro-checkpoint to enable a hypervisor on the second service processor to start a virtual machine on the second service processor.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: May 25, 2021
    Assignee: International Business Machines Corporation
    Inventors: Bradley W. Bishop, Lee N. Helgeson, Michael R. Hines, James A. O'Connor
  • Patent number: 11016549
    Abstract: Aspects of the embodiments are directed to systems, methods, and apparatuses for controlling power management states using a clock request message across a 3.3 volt GPIO pin. Systems can include a CPU root port to transmit to a platform controller hub (PCH) compliant with a PCIe protocol, a first clock request message, the first clock request message comprising a first bit set to assert a clock request transmit (CLKREQ TX assert) on a 3.3 volt general purpose input/output (GPIO) pin local to the PCH; detect that a connected device is entering into a power management state; and transmit, from the CPU root port, to the PCH, a second clock request message, the second clock request message comprising the first bit set to deassert the clock request transmit (CLKREQ TX deassert) and a second bit to assert a clock request protocol (CLKREQ#) on a 3.3 volt GPIO pin.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: May 25, 2021
    Assignee: Intel Corporation
    Inventors: Poh Thiam Teoh, Mikal C. Hunsaker, Su Wei Lim, Gim Chong Lee, Hooi Kar Loo, Shashitheren Kerisnan, Siang Lin Tan, Ming Chew Lee, Ngeok Kuan Wai, Li Len Lim
  • Patent number: 11009937
    Abstract: Systems and methods for detecting touch events with an accelerometer are disclosed. In one aspect, a method includes measuring first accelerometer data at a first rate, detecting a first touch event based on the first accelerometer data, in response to detecting the first touch event, measuring second accelerometer data at a second rate, determining whether a second touch event is detected based on the second accelerometer data, measuring third accelerometer data at the first rate in response to an absence of the second touch event being detecting in the second accelerometer data over a predetermined threshold period of time.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: May 18, 2021
    Assignee: Snap Inc.
    Inventors: Yu Jiang Tham, Xing Mei
  • Patent number: 11003593
    Abstract: A method for managing a cache memory, including executing first and second processes, when the second process modifies the state of the cache memory, updating the value of an indicator associated with this second process, and comparing the value of this indicator to a predefined threshold and, when this predefined threshold is exceeded, detecting an abnormal use of the cache memory by the second process, in response to this detection, modifying pre-recorded relationships in order to associate with the identifier of the second process a value of a parameter q different from the value of the parameter q associated with the first process so that, after this modification, when the received address of a word to be read is the same for the first and second processes, then the set addresses used to read this word from the cache memory are different.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: May 11, 2021
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Thomas Hiscock, Mustapha El Majihi, Olivier Savry
  • Patent number: 10990126
    Abstract: A wireless communication terminal includes: a body; a touch panel on a front surface and having top and bottom edges longer than left and right edges; a battery storage space; a pen storage space; and a substrate. The battery storage space is between a center line and a bottom edge of the body. A center point of the battery storage space is within a belt-shaped area having a width of 2 cm that spreads in a left-right direction and including the center point of the front surface. The pen storage space is between a bottom edge of the substrate and a top edge of the battery storage space and has a longitudinal axis parallel to a top of the battery storage space. A wiring connecting power terminals of two batteries stored in the battery storage space to the substrate does not intersect the pen storage space.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: April 27, 2021
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventor: Hidehiko Amaki
  • Patent number: 10979591
    Abstract: An image forming apparatus and method for managing an image forming apparatus by using an external server are provided. In various examples, a system environment setting of an image forming apparatus is changed based on context information stored in the external server, without direct intervention of an administrator and without use of additional hardware.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: April 13, 2021
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Jin Hyung Kim
  • Patent number: 10969851
    Abstract: In some examples, an electronic device may determine a target time to which the remaining battery charge is to last, such as based on a user input or historical usage of the electronic device. Additionally, the electronic device may determine a current amount of the battery charge remaining, and may determine user activities likely to occur between the present time and the target time. Based at least partially on the amount of the battery charge remaining and the user activities determined to be likely to occur before the target time, the electronic device may apply one or more power management restrictions to one or more resources of the electronic device.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: April 6, 2021
    Assignee: Razer (Asia-Pacific) Pte. Ltd.
    Inventors: Michael A Chan, William Duncan McVicker, Tom Moss
  • Patent number: 10965477
    Abstract: A technique establishes a powered link over a transmission line. The technique includes, after determination of a power level to be provided to a powered device coupled to the transmission line, providing an output signal having a power-saving signal level to the transmission line until detecting an event. The event may be a power-up or a disconnect of the powered device. The technique may further include changing the output signal from the power-saving signal level to the powered-mode output signal level. The technique may include providing the powered-mode output signal level until detecting a disconnect of the powered device. The technique may include providing a second output signal to an additional powered device coupled to an additional transmission line until detecting the event. The technique may include changing the second output signal from the power-saving signal level to a second powered-mode output signal level synchronous with changing the output signal.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: March 30, 2021
    Assignee: Silicon Laboratories Inc.
    Inventor: Miklós Lukács
  • Patent number: 10963975
    Abstract: A heuristic method of reducing energy consumption in a system having a plurality of subsystems is disclosed which includes identifying one or more approximation parameters in each of a plurality of subsystems, for an application that is run on the system with a predefined quality minimum approximating performance of each of the plurality of subsystems, determining energy savings for the system based on the approximation, sorting the plurality of subsystems based on system-level energy savings, classifying each of the plurality of subsystems into coarse and fine subsystems based on energy savings, and optimizing approximation of the one or more subsystems by i) approximating the coarse subsystems, and ii) approximating the fine subsystems.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: March 30, 2021
    Assignee: Purdue Research Foundation
    Inventors: Vijay Raghunathan, Arnab Raha
  • Patent number: 10962912
    Abstract: An image forming apparatus includes a detection unit configured to detect an object and a power-supply control unit. The power-supply control unit shifts the image forming apparatus to a second power state, in response to a lapse of a predetermined time following no detection of the object, when a job has not been executed until the detection unit detects no object, after the power-supply control unit shifts the image forming apparatus to the first power state. The power-supply control unit shifts the image forming apparatus to the second power state before a lapse of the predetermined time, when a job has been executed until the detection unit detects no object, after the power-supply control unit shifts the image forming apparatus to the first power state.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: March 30, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Ryotaro Okuzono
  • Patent number: 10955865
    Abstract: An integrated circuit includes a processor coupled to a voltage bus of a cable and located within a universal serial bus (USB) compatible power supply device. A current sense amplifier (CSA) is coupled to a sense resistor to monitor a current of the voltage bus. A first comparator is coupled to the CSA and the processor and to trigger in response to detecting that a monitored current value from the CSA is greater than or equal to a first reference value, which includes a hysteresis offset value. An analog-to-digital converter (ADC) is coupled to the CSA and the processor. In response to detecting trigger of the first comparator, the processor is to trigger the ADC to measure an absolute current value of voltage bus, and cause an additional voltage, equal to a voltage drop across the cable based on the absolute current value, to be supplied to the voltage bus.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: March 23, 2021
    Assignee: Cypress Semiconductor Corporation
    Inventors: Jeevith Kumar N M, Kailas Iyer, Debraj Bhattacharjee
  • Patent number: 10952146
    Abstract: A method for dynamically adjusting an energy-saving grade of a terminal, a non-transitory computer-readable storage medium, and the terminal are provided. The method includes: acquiring an application identifier of a currently displayed application; determining, by querying a preset first white list, a first energy-saving grade corresponding to the application according to the application identifier, and acquiring display effect parameters corresponding to the first energy-saving grade, where the first white list defines an association relationship between a plurality of application identifiers and a plurality of energy-saving grades; and setting an energy-saving grade of the terminal according to the first energy-saving grade, and processing a to-be-displayed image according to the display effect parameters corresponding to the first energy-saving grade.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: March 16, 2021
    Assignee: GUANGDONG OPPO MOBILE TELECoMMUNICATIONS CORP., LTD.
    Inventors: Yongpeng Yi, Deliang Peng, Shengjun Gou, Xiaori Yuan, Gaoting Gan, Zhiyong Zheng, Hai Yang
  • Patent number: 10950184
    Abstract: A display device includes pixels each having: a first transistor having a first electrode, second electrode, and gate electrode; a second transistor having a first electrode connected to a data line, a second electrode connected to the first electrode of the first transistor, and a gate electrode connected to a first scan line; a third transistor having a first electrode connected to the second electrode of the first transistor, a second electrode connected to the gate electrode of the first transistor, and a gate electrode connected to the first scan line; and a fourth transistor having a first electrode connected to the gate electrode of the first transistor, a second electrode connected to an initialization voltage line, and a gate electrode connected to a second scan line. A first scan signal is applied in each frame period of a first driving mode and a second driving mode.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: March 16, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventor: Min Seok Bae
  • Patent number: 10948717
    Abstract: One aspect disclosed is a method including determining a location from a positioning system receiver, determining, using a hardware processor and the location, that the location is approaching a path of direction of visual direction information, displaying the visual direction information on a display of a wearable device in response to the determining, determining, using the positioning system receiver, whether the turn of the visual direction information has been made, determining, by the hardware processor, a first period of time for display of the content data based on whether the turn of the visual direction information has been made, powering on the display and displaying, using the display, content data for the first period of time, turning off the display and the hardware processor following display of the content data.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: March 16, 2021
    Assignee: Snap Inc.
    Inventors: Alex Bamberger, Peter Brook, Nicolas Dahlquist, Matthew Hanover, Russell Douglas Patton, Jonathan M Rodriguez, II
  • Patent number: 10942560
    Abstract: A method of controlling a hard disk and an electronic device, comprising: determining a number of power cycles that have been completed by the hard disk at a time point within a predetermined period of time, a power cycle including a total duration of the hard disk in a spin-on mode and an immediately neighboring spin-off mode; and in response to the number of power cycles that have been completed being below an upper limit number for the power cycles of the hard disk in the predetermined period of time, determining remaining time of the predetermined period of time starting from the time point, and determining, based on the remaining time, the number of power cycles that have been completed, and the upper limit number, a threshold idle duration for controlling the hard disk to enter the spin-off mode.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: March 9, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Chen Wang, Ao Sun, Gary Jialei Wu, Lu Lei, Peter Jie Song
  • Patent number: 10915160
    Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: February 9, 2021
    Assignee: Apple Inc.
    Inventors: Anand Dalal, Joshua P. de Cesare
  • Patent number: 10908667
    Abstract: An integrated circuit and method are provided for managing power domains. The integrated circuit has first circuitry provided within a first power domain, and a distributed power controller for controlling transition of the first power domain between a plurality of power states. The distributed power controller comprises at least power control circuitry in a second power domain and additional power control circuitry in a third power domain. Whilst the current power state of the first power domain is in any one of at least two of the plurality of power states, the second power domain is allowed to be placed in a power saving state where the power control circuitry loses knowledge of the current power state of the first power domain. However, the third power domain is prevented from entering that power saving state.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: February 2, 2021
    Assignee: Arm Limited
    Inventors: Christopher Vincent Severino, Dominic William Brown, Ashley John Crawford
  • Patent number: 10908854
    Abstract: An image forming system includes an image forming apparatus and a mobile terminal device. In the image forming apparatus, when a first short-range communication device receives second identification information after a first control device allows formation of an image on a recording paper sheet and storage of first identification information, the first control device determines correspondence or non-correspondence between the first and second identification information. In a power-saving sleep mode of the image forming apparatus, the first control device maintains the sleep mode in the case of the correspondence or cancels the sleep mode in the case of the non-correspondence.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: February 2, 2021
    Assignee: KYOCERA Document Solutions Inc.
    Inventor: Katsunori Masai
  • Patent number: 10908853
    Abstract: An image processing apparatus is provided. In a case where a transition from a certain power state to a first power saving state is made, the image processing apparatus stores first time information indicating a time of the transition to the first power saving state in a memory. In a case where a return from the first power saving state is made, the image processing apparatus notifies a management server of an event, which includes the first time information read out from the memory and indicates that the transition to the first power saving state has been made.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: February 2, 2021
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hidetaka Nakahara