Abstract: An example image forming device includes a wakeup source to detect an event for cancelling a power saving mode of the image forming device, a display, a processor, and a memory to store instructions executable by the processor. By executing the instructions, the processor is to display, through the display, a setting screen including a user interface to set an operation of the wakeup source, obtain information on a condition for cancelling the power saving mode based on setting information of the wakeup source received from the setting screen, and cancel the power saving mode in a case where a cancellation condition included in the information on the condition for cancelling the power saving mode is met in the power saving mode.

Abstract: An electronic apparatus including a display includes a facing-direction detection unit that detects a direction of a facing direction representing a direction in which a user of the electronic apparatus is facing, a line-of-sight detection unit that detects a line of sight direction of the user, a determination unit that, based on a detection result of the facing-direction detection unit and a detection result of the line-of-sight detection unit, determines whether to execute a normal mode indicating a normal drive state or a power saving mode where power consumption is less than in the normal mode, and a control unit that executes a mode based on a result of the determination of the determination unit.

Abstract: In an embodiment a method for managing a low-power mode of an electronic device includes at a first request for transitioning an electronic device to a low-power mode, storing values of a first counter and a second counter of the electronic device on a first edge of a first clock and at a second request for transitioning the electronic device out of the low-power mode calculating a number of periods of a second clock between a second edge of the first clock and the first edge, the second edge being later than the first edge and updating the value of the second counter with a calculated value, wherein the first clock drives the first counter and the second clock drives the second counter, the second clock being faster than the first clock.

Abstract: A data recorder capable of reducing adverse effects caused by radiation is provided. In one aspect of a data recorder of the present disclosure, an input interface includes a first buffer memory, the input interface accepts input of data from outside and records the data in the first buffer memory, a control unit switches a state of a power supply for non-volatile memory to an on state at a timing determined on the basis of an amount of data recorded in the first buffer memory and a mode of the input of the data from the outside via the input interface, the input interface transfers the data recorded in the first buffer memory to the non-volatile memory in a case where the power supply for non-volatile memory is in an on state.

Abstract: A chip frequency modulation method and apparatus of a computing device, a hash board, a computing device, and a storage medium are disclosed. The computing device is provided with at least one operational chip, and the operational chip is provided with a plurality of cores. The chip frequency modulation method includes: operating each of the plurality of cores in the operational chip configured with a plurality of frequencies to run at a working frequency, the working frequency being one of the plurality of frequencies; analyzing a computing performance indicator of each of the plurality of cores at the working frequency; and modulating a working frequency of at least one core up or down according to the computing performance indicator, a modulated working frequency being one of the plurality of frequencies.

Abstract: Described herein are methods and a system for placing a network and devices in life support when it is determined that a network event necessitates such. Interconnected devices on the network are monitored, devices providing status such as temperature. Based on status, a life support event is determined. If it is determined that life support is needed, devices and services are prioritized. Monitoring is performed as to changes in the network and devices. The network and devices are returned to normal operation if the monitoring determines a normal status.

Abstract: A power on/off circuit includes: a sensor for generating a corresponding first control signal based on a user operation; a first switch element, a first end of the first switch element being connected to a voltage input end, a second end of the first switch element being connected to a voltage output end, the voltage input end being connected to a power supply voltage; and a capacitor connected between a third end of the first switch element and the sensor, the capacitor controlling an on-off of the first switch element based on the first control signal.

Abstract: Implementations of the present disclosure disclose a memory system and an operation method thereof. The memory system comprises at least one memory device and a memory controller coupled with the at least one memory device. The memory controller is configured to: in respond to an instruction of a host coupled with the memory system, control the memory system to enter a first activation mode and a transition mode sequentially. The transition mode includes an idle mode and a first sleep mode. A power of the memory system in the first sleep mode is less than a power of the memory system in the idle mode. The power of the memory system in the idle mode is less than a power of the memory system in the first activation mode.

Abstract: There is provided an image reading apparatus in which a low output mode is a mode that can be controlled in a coupling state where a low power-feeding USB device is coupled, a high output mode is a mode that can be controlled in a coupling state where a high power-feeding USB device capable of feeding power higher than the low power-feeding USB device is coupled, and a control section does not perform image reading at a second reading speed faster than a first reading speed and performs image reading at the first reading speed in the low output mode.

Abstract: A system on a chip (SoC) includes a first subsystem, a second subsystem and a compression block connected to the first and second subsystems, wherein the compression block includes a decoder and an encoder. The compression block receives spill data generated by a compute element in one of the first and second subsystems, compresses the spill data using the encoder and stores the compressed spill data in a data block in local memory of one of the compute elements.

Abstract: A technique for power aware event scheduling including receiving, from a wireless access point, an indication of a scheduled reference event, determining, for an application event, an amount of time to generate data for a wireless uplink transmission associated with the application event, receiving timing information, the timing information indicating an amount of time to divide the generated data into data frames, determining an adjusted time based on the amount of time to generate data, the received timing information, and the scheduled reference event, triggering the application event at the adjusted time, and transmitting the data frames based on the scheduled reference event.

Abstract: A method for recognizing a motion state of an object by using a millimeter wave radar having at least one antenna is disclosed. The method includes the following steps. A region is set to select an object in the region, wherein the object has M ranges and M azimuths between the object and the at least one antenna during a first motion time. Each of the M ranges and the M azimuths are projected on a two-dimensional (2D) plane to form M frames. The M frames are sequentially arranged into a first consecutive candidate frames having a time sequence. The first consecutive candidate frames are inputted into an artificial intelligence model to determine a motion state type of the first consecutive candidate frames.

Abstract: Devices and methods for cache prefetching are provided. A device is provided which comprises a quality of service (QOS) component having first assigned registers used to store data to execute a program, a plurality of non-QOS components having second assigned registers used to store data to execute the program and a power management controller, in communication with the QOS component and the non-QOS components. The power management controller is configured to issue fences for the non-QOS components when it is determined that one or more of the non-QOS components are idle, issue a fence for the QOS component when the fences for the non-QOS components are completed and enter a reduced power state when the fences for the non-QOS components and the fence for the QOS component are completed.

Abstract: If a secure element accesses a resource that is separate from the secure element, conducting a secure transaction can be inefficient in terms of power or time. Power usage is inefficient if the resource is never permitted to sleep, and transaction time is inefficient if the resource is permitted to sleep, and the user experiences a delay. To enable dual efficiency, a resource entity is permitted to be powered down. The resource entity is then powered up speculatively by an activation controller. The activation controller predicts an upcoming secure transaction based on sensor output, such as a position fix or a detected electromagnetic field. Based on monitored sensor output, the activation controller issues an activation signal to power up the secure element or the resource entity prior to initiation of the upcoming secure transaction. Thus, power can be conserved without introducing a transaction-processing latency.

Abstract: A disclosed method for improving latency or power consumption may include (i) receiving, at a power-state processing circuit, a power-state signal indicating whether a processing unit is entering a low-power-state, (ii) transmitting, in response to the power-state signal indicating that the processing unit is entering the low-power-state, a control signal from the power-state processing circuit to a latching circuit, and (iii) storing, by the latching circuit and in response to the control signal, a state of an input/output pad that is coupled to the processing unit. Various other apparatuses, systems, and methods are also disclosed.

Abstract: Techniques are provided for acceptance status classification of product-related data structures using models with multiple training periods. One method comprises obtaining data for a given product-related data structure; evaluating first features related to the given product-related data structure using the obtained data; applying the first features related to the given product-related data structure to one or more models trained using multiple different training periods to obtain a plurality of second features, wherein each of the second features indicates a prediction related to an acceptance status of the given product-related data structure by at least one model for a respective training period; and aggregating at least the second features to obtain a classification related to an aggregate acceptance status of the given product-related data structure. A weighting of at least some of the first and second features can be learned during a training phase.

Abstract: A method for setting a shipping mode of an electronic device. The method includes the following steps: receiving a shipping instruction sent by a host computer to enter the shipping mode; and sending a shipping-mode feedback instruction to the host computer, where the shipping-mode feedback instruction is a valid-response instruction for a successful entry into the shipping mode or an invalid-response instruction for a failed entry into the shipping mode. An electronic device and a computer readable storage medium are also provided in this application. The method for setting the shipping mode, the electronic device and the computer readable storage medium can accurately feed back whether the electronic device has successfully entered the shipping mode, to avoid a problem that the electronic device not really entering the shipping mode can leave the factory due to omission, improving users' experience.

Abstract: A method for reception mode switching and a terminal are provided. The method includes: switching a reception mode of the terminal from a first reception mode to a second reception mode if a reception mode switching event occurs wherein the first reception mode corresponds to a first quantity of receiving elements of the terminal, and the second reception mode corresponds to a second quantity of receiving elements of the terminal; wherein the receiving element is a receive antenna, a receive antenna port, a receiving port, a receiving channel, a receiving radio frequency channel, or a receive antenna panel.

Abstract: A storage system comprises one or more storage devices, power supplies supplying power to the storage device, a processor that performs in response to determining that the total power consumption of the one or more storage devices is less than a first percentage threshold of a load of the active power supplies, deactivating one or more of the active power supplies until the total power consumption is equal to or greater than the first percentage threshold of a load of each of the active power supplies, and in response to determining that the total power consumption is equal to or greater than a second percentage threshold of a load of each of the active power supplies, activating one or more of the deactivated ones of the power supplies until the total power consumption is less than the second percentage threshold of the load of each of the active power supplies.

Abstract: Systems and methods are provided that may be implemented to dynamically change the solid state drive (SSD) power and peripheral component interconnect express (PCIe) link state transition time for solid state drive for SSD operation based on current remaining battery power capacity during a battery-only power mode of an information handling system. In one example, an intelligent algorithm in software and SSD firmware may be implemented that will dynamically change the SSD power and PCIe link state transition based on current remaining battery power capacity during battery-only power mode of an information handling system. In this way additional power saving may be realized when current remaining battery power capacity is low during a battery-only power mode so as to extend the battery life for an information handling system.

Abstract: A method includes instructing an always-on first processor to operate in a follow-on query detection mode, and while the always-on first processor operates in the follow-on query detection mode: receiving follow-on audio data captured by the assistant-enabled device; determining, using a voice activity detection (VAD) model executing on the always-on first processor, whether or not the VAD model detects voice activity in the follow-on audio data; performing, using a speaker identification (SID) model executing on the always-on first processor, speaker verification on the follow-on audio data to determine whether the follow-on audio data includes an utterance spoken by the same user. The method also includes initiating a wake-up process on a second processor to determine whether the utterance includes a follow-on query.

Abstract: In one embodiment, a processor includes: a plurality of cores; a first storage to store parameter information for a voltage regulator to couple to the processor via a voltage regulator interface; and a power controller to control power consumption of the processor. The power controller may determine a performance state for one or more cores of the processor and include a hardware logic to generate a message for the voltage regulator based at least in part on the parameter information, where this message is to cause the voltage regulator to output a voltage to enable the one or more cores to operate at the performance state. Other embodiments are described and claimed.

Abstract: A method for managing power resource in an augmented reality (AR) device is described. In one aspect, the method includes configuring a low-power mode to run on a low-power processor of the AR device using a first set of sensor data, and a high-power mode to run on a high-power processor of the AR device using a second set of sensor data, operating, using the low-power processor, a low-power application in the low-power mode based on the first set of sensor data, detecting a request to operate a high-power application at the AR device, in response to detecting the request, activating the second set of sensors of the AR device corresponding to the high-power mode, and operating, using the high-power processor, a high-power application in the high-power mode based on the second set of sensors.

Abstract: Dynamically controlled interrupt coalescing is performed by enabling interrupt coalescing when the queue depth of the submission queue is high and disabling interrupt coalescing when the queue depth of the submission queue is low to maintain a required quality of service for a solid state drive. The minimum number of completions in the completion queue to trigger an interrupt is modified based on the queue depth of the submission queue. The minimum number of completions is increased when there is an increase in the queue depth of the submission queue and decreased when there is a decrease in the queue depth of the submission queue.

Abstract: A wafer-level method of testing an integrated circuit (IC) device includes: (i) applying a plurality of test operation signals to a wafer containing the IC device, (ii) generating a test enable signal in response to detecting, on the wafer, a toggling of at least one of the plurality of test operation signals, and then (iii) testing at least a portion of the IC device in response to the generating the test enable signal. The generating may also include generating a test enable signal in response to detecting, on the wafer, an inactive-to-active transition of a toggle detection signal.

Abstract: Example apparatus disclosed herein compare one or more audio latency characteristics with one or more audio latency requirements in response to detection of an audio silence event, the audio latency characteristic(s) associated with at least one of a hardware layer or a device layer of an audio stack of a compute device, the audio latency requirement(s) associated with an application. Disclosed example apparatus also control a device layer of the audio stack to enter a device layer low power mode in response to a first determination that the audio latency requirement(s) is/are met by the audio latency characteristic(s). Disclosed example apparatus further control a hardware layer of the audio stack to enter a hardware layer low power mode in response to the first determination and a second determination that an operation condition for entry into the hardware layer low power mode is met.

Abstract: An emulated wireless access point (AP) at a first PMC device (PMC1) establishes a first tunneled direct link setup (TDLS) session between a first station module (STA1) incorporated into the PMC1 and a second station module (STA2) incorporated into a second PMC device (PMC2). Following establishment of the TDLS session, the wireless AP is allowed to sleep; and most infrastructure management duties are handled by the STA1 during the session. PMC device battery charge may be conserved as a result. The emulated wireless AP may also establish a second TDLS link to a third station module (STA3) incorporated into a third PMC device (PMC3). The STA1 may then bridge data traffic flow between the STA2 and the STA3. Such bridging operation may enable communication between two PMC devices otherwise unable to decode data received from the other.

Abstract: Systems, apparatuses, and methods for implementing a dynamic power estimation (DPE) unit that adapts weights in real-time are described. A system includes a processor, a DPE unit, and a power management unit (PMU). The DPE unit generates a power consumption estimate for the processor by multiplying a plurality of weights by a plurality of counter values, with each weight multiplied by a corresponding counter. The DPE unit calculates the sum of the products of the plurality of weights and plurality of counters. The accumulated sum is used as an estimate of the processor's power consumption. On a periodic basis, the estimate is compared to a current sense value to measure the error. If the error is greater than a threshold, then an on-chip learning algorithm dynamically adjust the weights. The PMU uses the power consumption estimates to keep the processor within a thermal envelope.

Abstract: A method and apparatus for managing power states in a computer system includes, responsive to an event received by a processor, powering up a first circuitry. Responsive to the event not being serviceable by the first circuitry, powering up at least a second circuitry of the computer system to service the event.

Abstract: There is provided a network control apparatus that realizes an in-vehicle network with low power consumption. The network control apparatus comprises a vehicle state acquisition part that acquires the state of a vehicle; a control profile acquisition part that acquires a control profile, according to the acquired vehicle state, from one or more control profiles including settings for controlling equipment connected to an in-vehicle network; and a control part that controls equipment within the in-vehicle network on the basis of the acquired control profile.

Abstract: A storage device may determine first priority parameters and second priority parameters for a plurality of memory dies on the basis of temperatures of the plurality of memory dies measured at a first time point and a second time point. The storage device may determine priorities of the plurality of memory dies for a read operation or a write operation on the basis of the first priority parameters and the second priority parameters for the plurality of memory dies.

Abstract: There are provided an ultrasound diagnostic apparatus and a control method for an ultrasound diagnostic apparatus capable of activating an ultrasound probe only by an operation of an apparatus main body and achieving power saving. The ultrasound probe includes an ultrasound unit that acquires ultrasound image data, a probe-side first communication circuit and a probe-side second communication circuit each of which performs wireless communication with the apparatus main body and which have transmission capacities different from each other and power consumptions different from each other, and a power supply controller that selects one communication circuit among the probe-side first communication circuit and the probe-side second communication circuit according to a power supply mode of the ultrasound probe and performs wireless communication with the apparatus main body by using the selected communication circuit.

Abstract: A transmission device communicates with a reception device via a control data bus in a communication standard of I3C. The transmission device includes a transfer mode switching section and a data transmission section. The transfer mode switching section switches a transfer mode of the control data bus from a first transfer mode having a first transfer rate to a second transfer mode having a second transfer rate faster than the first transfer rate by transmitting a switching command instructing to switch to the second transfer mode after issuance of an IBI request using a function of the I3C in the first transfer mode. The data transmission section transmits data to the reception device via the control data bus in the second transfer mode.

Abstract: Provided is a method for regulating, via a hardware performance throttling block (PTB) of a memory module, the performance of a memory system in response to read and write requests from a processing system which hosts the memory system. The host system sends memory service requests to the memory system in the form of memory read requests and memory write requests. The host system sends requests to throttle, that is, to limit the responses of the memory system in response to memory requests; the host system sends to the memory system various parameters indicative of current memory usage. In response to the throttling request, the PTB of the memory module either stops any reception of memory requests, or limits (throttles) the number of memory read requests, write requests, or both for a specified number of clock/command cycles. The PTB also determines when full, un-throttled performance may be resumed.

Abstract: The present disclosure is directed to a device configured to detect whether the device is in a bag or being taken out of the bag. The device determines whether the device is in a bag or being taken out of the bag based on motion measurements generated by a motion sensor and electrostatic charge measurements generated by an electrostatic charge sensor. By using both distance measurements and motion measurements, the device is able to detect whether the device is in the bag or being taken out of the bag with high efficiency, accuracy, and robustness.

Abstract: Various embodiments relate to power reset. A system may include a power source and a load configured to couple to the power source. The system may also include a modem configured to receive a first signal from a remote device and generate a second signal responsive to receipt of the first signal. Further, the system may include circuitry. The circuitry may be configured to responsive to the second signal, disconnect the load from the power source for a time duration. The circuitry may further be configured to reconnect the load to the power source after the time duration. Associated methods and mobile units are also disclosed.

Abstract: An electronic wake-up device and a wake-up method thereof are provided. The electronic wake-up device includes: a power switch device, an electronic device, a gravity sensor, and a wake-up circuit. The wake-up circuit is coupled to the gravity sensor and the electronic device. The wake-up circuit is configured to generate an execution signal according to a sensing activation signal, and generate an electronic device control signal according to the execution signal and a gravity signal to wake up the electronic device.

Abstract: A pixel includes: an organic light emitting diode; a first transistor including a gate that is connected to a first node, wherein the first transistor is connected between a second node and a third node; a second transistor including a gate that is connected to a corresponding scan line, wherein the second transistor is connected between a data line and the second node; a storage capacitor connected between the first node and a first voltage; a third transistor including a gate that is connected to the corresponding scan line, the third transistor is connected between the first node and the third node; and a fourth transistor connected between a first end of the first transistor and a second voltage.

Abstract: A method for operating a control unit of a motor vehicle, wherein a state management module of a runtime environment initiates a standby mode of the runtime environment as a function of a stop request. The invention provides that, as a function of the stop request, the state management module first sends out to at least one application a respective backup request which requests the respective application to store respective predetermined runtime data in a non-volatile data memory, and then, however, if a resume request is subsequently received within a waiting time period, the normal operating mode is continued without the planned switch-over to the standby mode.

Abstract: A clock buffer device for a memory module includes a first clock input coupled to an input of a first phase-locked loop (PLL), and a second clock input coupled to an input of a second PLL. An output of the first PLL is selectably coupled to clock output buffers, and an output of the second PLL is selectably coupled to a subset of the clock output buffers. The clock buffer device receives a first indication that a first information handling system is configured to provide a first clock signal on the first clock input but to not provide a second clock signal on the second clock input, and, in response to the indication, couples the output of the first PLL to the clock output buffers and to disables the second PLL.

Abstract: A relationship between at least a first metric of an integrated circuit (IC) design and a power supply voltage of the IC design may be determined based on a set of IC designs that have different power supply voltages. Next, the power supply voltage and at least the first metric of the IC design may be modified by interpolating values of the first metric based on the relationship between the first metric and the power supply voltage of the IC design.

Abstract: An expansion apparatus with a power management function includes a power supply device, an expansion module and a control module. The power supply device includes a controller and an output terminal, and provides a predetermined power through the output terminal. The expansion module includes an input port coupled to the output terminal, and multiple output ports operable to be coupled to multiple electronic apparatuses. The control module has a full-power output mode and a disabled mode, and receives a device identifier provided by the controller through the input port to learn the predetermined power, so as to selectively adjust the output ports to operate in the full-power output mode or the disabled mode based on the predetermined power, thereby limiting a total power consumed by the electronic apparatuses and the expansion module to be less than or equal to the predetermined power.

Abstract: A power management method for an electronic device is provided. The electronic device includes a processing unit with a core and configured to execute an application program and a functional element. The power management method includes the following steps: determining a maximum frame count per second of a scene; down-tuning a frequency setting value of the core; detecting an actual frame count per second of the scene; determining a change in power consumption of the processing unit and a temperature of the functional element when the actual frame count per second is equal to the maximum frame count per second; and down-tuning the frequency setting value when the power consumption does not increase and the temperature is lower than a preset temperature value, and restoring the frequency setting value when the power consumption increases or the temperature is higher than or equal to the preset temperature value.

Abstract: Systems and devices can include power management circuitry to manage the entry and exit of active state power management (APSM) link states, such as the transition between an active (L0) state and a low power state (e.g., L1). The power management circuitry can cause a downstream component to initiate an ASPM link state change negotiation based on an ASPM link state change condition being met. An ASPM event analysis logic can identify and track events that occur proximate in time to the ASPM link state change and can correlate the occurrences of the event with ASPM link state changes. An ASPM policy tuning logic can use a correlation between the occurrences of the event and ASPM link state changes to adjust or tune the ASPM link state change condition.

Abstract: Methods, systems and computer program products are provided for touch detection of computing device position. A touch filter monitor signals generated by one or more touch input devices for a signature of one or more other input devices proximate to the touch input device, which may indicate a user physically manipulated the computing device to render the input device(s) inoperable, such as by closing a portable computer. The touch filter controls the computing device to enter or remain in a power saving mode based on detection of one or more signatures of one or more other input devices in a signal generated by the monitored touch input device(s).

Abstract: An apparatus includes a processor, a sleep state duration prediction module, and a system management unit. The sleep state duration prediction module is configured to predict a sleep state duration for component of the processing device. The system management unit is to transition the component into a sleep state selected from a plurality of sleep states based on a comparison of the predicted sleep state duration to at least one duration threshold. Each sleep state of the plurality of sleep states is a lower power state than a previous sleep state of the plurality of sleep states.

Abstract: The disclosure provides a multi-path failover group management method, which includes: acquiring Small Computer System Interface (SCSI) address information of a physical volume, and determining physical link information in the SCSI address information; determining target port group information of a storage to which the physical volume belongs; determining whether port group information corresponding to a storage array subscript value is null; when the port group information is null, creating first subscript port group information corresponding to the storage array subscript value, creating a failover group node according to the physical link information, and adding the physical volume to the failover group node; when the port group information is not null, determining whether the port group information is consistent with the target port group information; and when the port group information is inconsistent with the target port group information, updating the storage array subscript value and reselecting appro

Abstract: An electronic device is provided. The electronic device includes a camera module for acquiring image data, a memory for storing a program module for controlling the camera module, and a processor electrically connected to the camera module or the memory, wherein the program module includes an application associated with the camera module, a framework for processing one or more requests received by the application, a hardware interface for interfacing with the camera module, and a solution layer for interlinking the hardware interface and the framework, and performing a post-processing operation of the image data by using at least a part of the camera module.

Abstract: A control method of a power delivery device includes communicating with a power adaptor through a configuration channel pin of a connector to acquire a power supply quota of the power adaptor and generate a power consumption threshold based on the acquired power supply quota, selecting a corresponding scenario mode from a plurality of scenario modes according to a scenario setting signal generated by a setting circuit when a total power consumption of a system circuit is greater than the power consumption threshold, selecting a corresponding exclusion parameter from a plurality of exclusion parameters according to the corresponding scenario mode, excluding a corresponding power-down procedure from a plurality of power-down procedures according to the corresponding exclusion parameter to generate a selected power-down group, and performing at least one power-down procedure in the selected power-down group to reduce the total power consumption.

Abstract: When a host-slave system including a host device and a slave device transitions to a power-down mode, the host device drives a CMD line in order of a high level, a low level, and a high level, and stops supplying a clock signal after a predetermined time elapses. During a power-down mode period, the slave device stops supplying a power to a back-end module. When the host device resumes the supply of the clock signal, the host-slave system returns from the power-down mode.