Active/idle Mode Processing Patents (Class 713/323)
  • Patent number: 11609597
    Abstract: An integrated circuit device, having functional circuitry driven by a clock signal, includes a first clock path for accepting an external clock signal where the first clock path includes first biasing circuitry configured to controllably pass the external clock signal, a second clock path for accepting an external frequency reference signal where the second clock path includes internal clock generation circuitry configured to generate an internal clock signal from the external frequency reference signal and second biasing circuitry configured to controllably pass the external frequency reference signal to the internal clock generation circuitry, and selector circuitry configured to select, based on user input, a clock output to drive the functional circuitry of the integrated circuit device. The clock output is selected from between (i) an output of the first clock path, and (ii) an output of the second clock path.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: March 21, 2023
    Assignee: Marvell Asia Pte Ltd
    Inventors: Li Cai, Sau Siong Chong, Chang-Feng Loi, Lawrence Tse
  • Patent number: 11604592
    Abstract: A method and apparatus for identifying data that is to be accessible in a low power state of a data storage device, and store this data in a physical (or logical) block that will be accessible in a low power state of the data storage device. Low power accessible data may be identified by host metadata of the data, indicating access is needed in a low power state. In other embodiments, the data storage device may learn the power state in which data should be accessible. In these embodiments, a controller stores information regarding the power state of a namespace in which the data is stored as an indicator to make the data accessible in a low power state. Alternatively, the controller stores a previous power state in which the data was accessed as an indicator to make the data accessible in a low power state.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: March 14, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ramanathan Muthiah, Lakshmi Sowjanya Sunkavelli, Stella Achtenberg
  • Patent number: 11606743
    Abstract: A radio access network (RAN) for a wireless communication network transmits, to user equipment (UE), information about NPN services provided by a non-public network (NPN) supported by the wireless network, where the UE is not subscribed to the NPN. In some embodiments, the NPN service information is periodically broadcasted to the UE; in other embodiments, the information is transmitted in response to receiving a request from the UE. In response to receiving the NPN service information, the UE transmits and the RAN receives an on-boarding request from the UE to on-board the UE to the NPN, which the RAN forwards to an on-boarding network (OBN) of the wireless network. In response, the RAN receives NPN credentials for the UE from the OBN, which the RAN forwards to the UE, which uses the NPN credentials to register to the NPN, thereby enabling the non-subscribing UE to subscribe to the NPN.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: March 14, 2023
    Assignee: Charter Communications Operating, LLC
    Inventors: Umamaheswar Kakinada, Curt Wong, Yildirim Sahin
  • Patent number: 11599179
    Abstract: A system, method, and non-transitory computer-readable medium are disclosed for intelligently controlling a power supply system of an information handling system. At least one embodiment is directed to a method that includes receiving power from an adapter and providing the power from the adapter to a switching power supply. At least one embodiment of the method also includes controlling the plurality of power switching elements to provide system power to an information handling system through the switching power supply; detecting a light loading power condition of the information handling system. In response to detecting the light loading power condition, the switching power supply is deactivated and a bypass control module is activated. In at least one embodiment, activation of the bypass control module directs power from the adapter through the bypass control module to the information handling system as the system power.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: March 7, 2023
    Assignee: Dell Products L.P.
    Inventors: Chih-Lang Lin, Chia Ting Hu, Hui-Chuan Chang
  • Patent number: 11586263
    Abstract: An information processing apparatus includes a processor that can take plural power control modes different in rated power from one another, a fan that rotates to dissipate heat generated by the processor, and a power control unit that controls the power consumption of the processor. The plural power control modes include two or more stages of dynamic control modes different in rated power from one another and a unified communication mode. The power control unit selects any one of the dynamic control modes based on an event in which a power consumption state of the processor continues for a predetermined duration or more, and when the unified communication works, the power control unit preferentially selects the unified communication mode.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: February 21, 2023
    Assignee: LENOVO (SINGAPORE) PTE. LTD.
    Inventors: Atsunobu Nakamura, Takuroh Kamimura, Akinori Uchino
  • Patent number: 11579876
    Abstract: A method of save-restore operations includes monitoring, by a power controller of a parallel processor (such as a graphics processing unit), of a register bus for one or more register write signals. The power controller determines that a register write signal is addressed to a state register that is designated to be saved prior to changing a power state of the parallel processor from a first state to a second state having a lower level of energy usage. The power controller instructs a copy of data corresponding to the state register to be written to a local memory module of the parallel processor. Subsequently, the parallel processor receives a power state change signal and writes state register data saved at the local memory module to an off-chip memory prior to changing the power state of the parallel processor.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: February 14, 2023
    Assignees: Advanced Micro Devices, Inc., ATI TECHNOLOGIES ULC
    Inventors: Anirudh R. Acharya, Alexander Fuad Ashkar, Ashkan Hosseinzadeh Namin
  • Patent number: 11580057
    Abstract: An integrated circuit (IC) can include a processor system configured to execute program code, a programmable logic, and a platform management controller coupled to the processor system and the programmable logic. The platform management controller is adapted to configure and control the processor system and the programmable logic independently.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: February 14, 2023
    Assignee: Xilinx, Inc.
    Inventors: Ahmad R. Ansari, Sagheer Ahmad
  • Patent number: 11579680
    Abstract: A method for power management based on synthetic machine learning benchmarks, including generating a record of synthetic machine learning benchmarks for synthetic machine learning models that are obtained by changing machine learning network topology parameters, receiving hardware information from a client device executing a machine learning program or preparing to execute a machine learning program, selecting a synthetic machine learning benchmark based on the correlation of the hardware information with the synthetic machine learning models, and determining work schedules based on the selected synthetic machine learning benchmark.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: February 14, 2023
    Assignee: Alibaba Group Holding Limited
    Inventors: Wei Wei, Lingjie Xu, Lingling Jin, Wei Zhang
  • Patent number: 11579443
    Abstract: Eyewear including a support structure defining a region for receiving a head of a user. The support structure supports optical elements, electronic components, and a use detector. The use detector is coupled to the electronic components and is positioned to identify when the head of the user is within the region defined by the support structure. The electronic components monitor the use detector and transition from a first mode of operation to a second mode of operation when the use detector senses the head of the user in the region.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: February 14, 2023
    Assignee: Snap Inc.
    Inventors: Julio Cesar CastaƱeda, Rajeev Ramanath
  • Patent number: 11561599
    Abstract: An information processing apparatus to which an external device is attachable includes an initialization unit configured to, when the information processing apparatus is activated from a power-off state, execute initialization of the external device, and not to, when the information processing apparatus is returned from a power-saving state, execute the initialization of the external device.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: January 24, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shinichi Kanematsu
  • Patent number: 11556167
    Abstract: A system for computing devices includes a central processing unit (CPU that is configured to perform in a plurality of power modes, each power mode being pre-defined to have a different code-execution performance capability than remaining ones of the plurality of power modes. The system further includes a sampling peripheral, an electrical output, and a memory device. The memory device is configured to select and execute a specific module from the plurality of modules based on the context-identifying input triggering the specific module. If triggered, each module is executed to receive the context-identifying input from the sampling peripheral, and to operate the CPU in a dedicated power mode of the plurality of power modes.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: January 17, 2023
    Assignee: Ambiq Micro, Inc.
    Inventor: Carlos Morales
  • Patent number: 11557257
    Abstract: A pixel includes a first transistor, a second transistor, a third transistor, a capacitor, and a light emitting diode. During a non-emission period of a low frequency mode, the third transistor electrically connects a first terminal of the light emitting diode to an initialization voltage line in response to a second scan signal. An initialization voltage transferred from the initialization voltage line has a first voltage level during a normal mode different from the low frequency mode, and has a second voltage level different from the first voltage level during the non-emission period of the low frequency mode.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: January 17, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Junghwan Hwang, Yang-Hwa Choi
  • Patent number: 11552621
    Abstract: A processing system comprising a first sub-circuit configured to be powered by a first supply voltage and a second sub-circuit configured to be powered by a second supply voltage. The first sub-circuit comprises a general-purpose input/out register. The second sub-circuit comprises: a storage circuit configured to selectively store configuration data from the general-purpose input/out register; an input/output interface, at least one peripheral and a selection circuits to exchange signals of the peripherals, and the stored configuration data with the input/output interface. A power management circuit is configured to manage a normal operating mode, and a low-power mode during which the configuration data are maintained stored and the first sub-circuit is switched off. The power management circuit activates the low-power mode in response to receiving a command, and resumes the normal operating mode in response to a wake-up event.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: January 10, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Francesco Pirozzi, Santi Carlo Adamo
  • Patent number: 11546843
    Abstract: In some embodiments, an apparatus includes first and second signal processing circuitry configured to perform signal processing operations and second signal processing circuitry configured to perform signal processing operations, wherein the second signal processing circuitry includes a smaller amount of processing resources than the first signal processing circuitry. In some embodiments, the apparatus includes one or more storage elements configured to store context information for the second signal processing circuitry and the one or more storage elements are accessible to the first signal processing circuitry. The apparatus may be configured to select one of the first and second signal processing circuitry based on the complexity of input problems, the amount of transmission resources assigned to the apparatus, etc. In some embodiments, intermediate results of from the second signal processing circuitry are used as inputs to an operation performed by the first signal processing circuitry.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: January 3, 2023
    Assignee: Apple Inc.
    Inventors: Matthias Sauer, Bernd W. Adler
  • Patent number: 11543878
    Abstract: A local power control arbiter is provided to interface with a global power control unit of a processing platform having a plurality of processing entities. The local power control arbiter controls a local processing unit of the processing platform. The local power arbiter has an interface to receive from the global power control unit, a local performance limit allocated to the local processing unit depending on a global power control evaluation and processing circuitry to determine any change to one or more processing conditions prevailing in the local processing unit on a timescale shorter than a duration for which the local performance limit is applied to the local processing unit by the global power control unit and to select a performance level for the local processing unit depending on both the local performance limit and the determined change, if any, to the prevailing processing conditions on the local processing unit.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: January 3, 2023
    Assignee: Intel Corporation
    Inventors: Efraim Rotem, Eliezer Weissmann, Eric Dehaemer, Alexander Gendler, Nadav Shulman, Krishnakanth Sistla, Nir Rosenzweig, Ankush Varma, Ariel Szapiro, Arye Albahari, Ido Melamed, Nir Misgav, Vivek Garg, Nimrod Angel, Adwait Purandare, Elkana Korem
  • Patent number: 11543996
    Abstract: A method and apparatus for data storage devices, or other devices that are L1 sub-state capable, to enter these sub-states while on the same network or bus as a device not enabled for transition to an L1 power sub-state. According to certain embodiments, a PCI FW register is configured to place a CLKREQ de-assert signal to a MAC of the data storage device, independent of the power state of the host. The CLKREQ de-assert signal causes the MAC to place the data storage device in an L1 power substate such as L1.2. A sensor of the controller remains active to detect a wakeup signal from the host that causes the data storage device to transition to a higher power state.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: January 3, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Asaf Heller, Nissim Elmaleh, Ishai Asa
  • Patent number: 11544258
    Abstract: A database node selects one of a number of database mirror hosts to perform a database read query. In theory, mirror hosts store redundant database entries. In practice, some mirror hosts fail to receive or retain some entries, e.g. if a mirror host was down for maintenance, a mirror host was overburdened, etc. The health of a mirror host, quantified as a health score, represents a likelihood that an insert statement was received and retained. Health scores are generated based on health metricsā€”data periodically retrieved from mirror hosts used to infer how well the database was operating, e.g. a count of entries that were inserted, a count of errors encountered while the entries were inserted, etc. If the database read query specifies entries inserted during a specific time period, the mirror host may be selected based on the health scores representing that time period.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: January 3, 2023
    Assignee: eBay Inc.
    Inventors: Suresh Anamanamuri, Mahesh Somani
  • Patent number: 11537375
    Abstract: An apparatus and method is described that digitally coordinates dynamically adaptable clock and voltage supply to significantly reduce the energy consumed by a processor without impacting its performance or latency. A signal is generated that indicates a long latency operation. This signal is used to reduce power supply voltage and frequency of the adaptable clock. An early resume indicator is generated a few nanoseconds before normal operations are about to resume. This early resume signal is used to power up the power-downed voltage regulator, and/or can increase frequency and/or supply voltage back to normal level before normal processor operations are about to resume.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: December 27, 2022
    Assignee: Intel Corporation
    Inventors: Julien Sebot, Edward A. Burton, Nasser A. Kurd, Jonathan Douglas
  • Patent number: 11522869
    Abstract: In one aspect, a first device includes at least one processor and storage accessible to the at least one processor. The storage includes instructions executable by the at least one processor to determine that an application stored at the first device is programmed to communicate with a second device. The instructions are then executable to, based on the determination, present an indication at the first device of a current location of the second device and/or a domain name associated with the second device. The instructions are also executable to receive user input approving the application to communicate with the second device subsequent to presenting the indication, and then to permit the application to communicate with the second device via the first device responsive to the user input.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: December 6, 2022
    Assignee: Lenovo (Singapore) Pte. Ltd.
    Inventors: Nathan J. Peterson, Russell Speight VanBlon, John Carl Mese, Arnold S. Weksler, Mark Patrick Delaney
  • Patent number: 11521698
    Abstract: A system includes a volatile storage device, a read-only memory (ROM), a memory built-in self-test (BIST) controller and a central processing unit (CPU). The CPU, upon occurrence of a reset event, executes a first instruction from the ROM to cause the CPU to copy a plurality of instructions from a range of addresses in the ROM to the volatile storage device. The CPU also executes a second instruction from the ROM to change a program counter. The CPU further executes the plurality of instructions from the volatile storage device using the program counter. The CPU, when executing the plurality of instructions from the volatile storage device, causes the ROM to enter a test mode and the memory BIST controller to be configured to test the ROM.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: December 6, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Prakash Narayanan, Nikita Naresh, Prathyusha Teja Inuganti, Rakesh Channabasappa Yaraduyathinahalli, Aravinda Acharya, Jasbir Singh, Naveen Ambalametil Narayanan
  • Patent number: 11522738
    Abstract: High-speed communication links with self-aligned scrambling on a communication link that sends scrambled signals may include a slave device that may self-align by initially detecting an unscrambled preamble symbol and more particularly detect an edge of the unscrambled preamble symbol. Based on the detected edge, a fine alignment adjustment may be made by testing subsequent scrambled data for a repeated pattern such as an IDLE symbol by comparing the repeated pattern to a candidate scrambled sequence that has been received through the communication link. The comparison may use an exclusive OR (XOR) circuit on some bits to derive a scrambler seed that is used to test for a match for the remaining bits. If there is a match, the scrambler seed and frame alignment have been detected and alignment is achieved.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: December 6, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Tomer Rafael Ben-Chen, Sharon Graif, Lior Amarilio
  • Patent number: 11513842
    Abstract: Systems, computer-implemented methods, and computer program products that can facilitate performance biased resource scheduling based on runtime performance of a certain workload type on one or more nodes are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a performance component that assigns performance points to different nodes based on execution of one or more workload types. The computer executable components can further comprise a scheduler extender component that modifies a scheduling decision to run a workload type on a node based on the performance points.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: November 29, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chen Wang, Stefania V. Costache, Alaa S. Youssef, Ali Kanso, Tonghoon Suk, Asser Narsreldin Tantawi
  • Patent number: 11513574
    Abstract: A system and method are provided for controlling a reset procedure. The system has a plurality of power domains, where each power domain comprises a plurality of components, and a plurality of power controllers, wherein each power controller has at last one associated power domain and is arranged to control a supply of power to each associated power domain. The plurality of power controllers are arranged in a hierarchical arrangement comprising two or more hierarchical levels. A given power controller at a given hierarchical level is arranged to implement a reset procedure requiring a reset to be performed in a given reset domain, where the given reset domain comprises at least a subset of the components provided in multiple power domains associated with multiple power controllers provided in at least one hierarchical level below the given hierarchical level.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: November 29, 2022
    Assignee: Arm Limited
    Inventors: Csaba Kelemen, Gergely Kiss, BalƔzs MƩszƔros
  • Patent number: 11516481
    Abstract: A video encoding method includes a first mode selection step of selecting at least one mode as a first candidate mode from a predetermined first mode group for encoding a video, a second mode selection step of selecting one mode as an encoding mode from a predetermined second mode group, based on the selected first candidate mode, and an encoding step of encoding the video in the selected encoding mode.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: November 29, 2022
    Assignee: SOCIONEXT INC.
    Inventors: Satoshi Yamaguchi, Masao Kitagawa
  • Patent number: 11516356
    Abstract: In a normal mode that is a mode when a user performs a printing work, a wireless operation unit shifts to a second mode when the wireless operation unit is not operated for a first predetermined time in a first mode. In a maintenance mode when a repairman performs a maintenance work, the wireless operation unit does not shift to the second mode even if the wireless operation unit is not operated for the first predetermined time in the first mode. In addition, in the maintenance mode, if the remaining amount of a battery is equal to or greater than a predetermined amount in the first mode, the wireless operation unit does not shift to the second mode, and if the remaining amount of the battery is less than the predetermined amount, the wireless operation unit shifts to the second mode.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: November 29, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Shozo Yamasaki
  • Patent number: 11507170
    Abstract: A system includes a multicore chip configured to perform machine learning (ML) operations. The system also includes a power monitoring module configured to measure power consumption of the multicore chip on a main power rail of the multicore chip. The power monitoring module is further configured to assert a signal in response to the measured power consumption exceeding a first threshold. The power monitoring module is further configured to transmit the asserted signal to a power throttling module to initiate a power throttling for the multicore chip.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: November 22, 2022
    Assignee: Marvell Asia Pte Ltd
    Inventors: Atul Bhattarai, Srinivas Sripada, Avinash Sodani, Michael Dudek, Darren Walworth, Roshan Fernando, James Irvine, Mani Gopal
  • Patent number: 11507169
    Abstract: Systems and methods for managing power and data usage in a mobile electronic communications device entail detecting a sleep state of a user of the device, and entering an idle mode when the sleep state of the user is deep sleep, wherein the idle mode restricts device CPU and network activities to exclude user-centric operations. When the sleep state of the user changes from the deep sleep state, the device exits the idle mode and enters an operative state to execute any pending user-centric operations.
    Type: Grant
    Filed: April 4, 2019
    Date of Patent: November 22, 2022
    Assignee: Motorola Mobility LLC
    Inventors: Amit Kumar Agrawal, Rachid Alameh, Jyothsna Bandameedipalli
  • Patent number: 11501699
    Abstract: A display device includes a display panel including a pixel and a panel driver which drives the display panel at a first panel frequency in a first driving mode and drives the display panel at a second panel frequency in a second driving mode. The pixel includes a light emitting element and first, second, third, and fourth transistors. The first transistor is connected between a power line and the light emitting element. The second transistor is connected between a data line and the first transistor and receives a first scan signal. The third transistor is connected between the first transistor and an initialization voltage line and receives a second scan signal. The fourth transistor is connected between the first transistor and a reset voltage line and receives a third scan signal. The third scan signal is inactivated in the first driving mode and is activated in the second driving mode.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: November 15, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yang-Hwa Choi, Junghwan Hwang
  • Patent number: 11500402
    Abstract: A power-availability-based power delivery configuration system includes a power scaling system that is coupled to a device and a power system. The power scaling system includes an adjustable power scaling circuit that is configured to convert power received from the power system from a first power level to a second power level. A power scaling controller is coupled to the device, the power system, and the power scaling circuit. The power scaling controller identifies a power amount available from the power system and, based on the power amount available from the power system, determines power delivery settings for the adjustable power scaling circuit and configures the adjustable power scaling circuit using the power delivery settings. The power scaling controller may also determine device settings for the device based on the power amount available from the power system and configure the device using the device settings.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: November 15, 2022
    Assignee: Dell Products L.P.
    Inventor: Cyril Adair Keilers
  • Patent number: 11494522
    Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which self-lock security may be implemented to control access to a fuse array (or other secure features) of the memory devices based on a predefined event associated with the memory device operation. The predefined event may include an operating parameter of the memory device, one or more commands directed to the memory device, or both. The memory device may monitor the predefined event and determine that the predefined event satisfies a threshold. The threshold may be related to a time elapsed since the predefined event has occurred or a certain pattern in the one or more commands. Subsequently, the memory device may disable a circuit configured to access the fuse array based on the determination such that an access to the fuse array is no longer allowed.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: November 8, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Nathaniel J. Meier, Brenton P. Van Leeuwen
  • Patent number: 11494238
    Abstract: Neural network workload re-allocation in a system-on-chip having multiple heterogenous processors executing one or more neural network units may be based on measurements associated with the processors' conditions and on metadata associated with the neural network units. Metadata may be contained in an input file along with neural network information. Measurements characterizing operation of the processors may be obtained and compared with one or more thresholds. A neural network unit executing on a processor may be identified as a candidate for re-allocation based on metadata associated with the neural network unit and results of the comparisons. A target processor may be identified based on the metadata and results of the comparisons, and the candidate neural network neural network unit may be re-allocated to the target processor.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: November 8, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Hee Jun Park, Wilson Kwan
  • Patent number: 11481021
    Abstract: An information processing apparatus includes: a power supply unit that supplies power to a connection terminal for connection to an external device; a communication control unit that performs data communication with an external device connected to the connection terminal; an operating state detection unit that detects a signal indicating that a controller including at least the communication control unit has entered hibernation; and a power supply control unit that stops power supply to the connection terminal when the signal indicating that the controller has entered hibernation is detected by the operating state detection unit.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: October 25, 2022
    Assignee: Lenovo (Singapore) Pte. Ltd.
    Inventors: Yuta Tagami, Yuichiro Seto, Koudai Horinouchi
  • Patent number: 11481637
    Abstract: An electronic device that includes a controller functional block and a computational functional block having one or more computational elements performs operations associated with a training operation for a generative adversarial network, the generative adversarial network including a generative network and a discriminative network. The controller functional block determines one or more characteristics of the generative adversarial network. Based on the one or more characteristics, the controller functional block configures the one or more computational elements to perform processing operations for each of the generative network and the discriminative network during the training operation for the generative adversarial network.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: October 25, 2022
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Nicholas P. Malaya
  • Patent number: 11474588
    Abstract: In accordance with an aspect of the present disclosure, there is provided a method of controlling power efficiency of a processor based on polling I/O. The method comprises checking at every predetermined time period whether a polling count is generated by a polling I/O operation for checking for a completion in response to an I/O request in storage; when it is checked that no polling count is generated, resetting a maximum frequency of the processor to have a default value; and converting a current operation frequency of the processor based on the polling count and an I/O sensitivity of the processor, when it is checked that the polling count is generated.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: October 18, 2022
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Young Ik Eom, Yong Ju Song, Sungwoo Lee
  • Patent number: 11476887
    Abstract: A Controller Area Network, CAN, transceiver configured to be connected to a CAN bus comprising; a transmitter arrangement configured to transmit signalling on the CAN bus based on transmit data, configured to operate in a first or second transmission mode, the first transmission mode configured to transmit said signalling with a first property and the second transmission mode configured to transmit said signalling with a second, different, property; a receiver arrangement configured to receive signalling from the CAN bus; a receive output configured to provide received data to the CAN controller; and wherein the transmitter arrangement is configured to operate in one of the first or second transmission modes based on a determination that the transmit data is encoded with a first line code and otherwise operate in the other transmission modes, and wherein the transceiver includes a decoder configured to decode the first line code of the transmit data.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: October 18, 2022
    Assignee: NXP B.V.
    Inventor: Clemens Gerhardus Johannes de Haas
  • Patent number: 11474585
    Abstract: A wake-up control method for a Body Control Module (BCM) includes: step S1 writing IDs and wake-up level information of all Micro Controller Unit (MCU) pins serving as an external wake-up source to a retention RAM; step S2, setting a wake-up detection timer, and triggering a system to enter a low power consumption mode; step S3, after a wake-up detection time set by the wake-up detection timer expires, enabling power supply to all MCU pins, setting the corresponding MCU pin as an input pin according to the pin ID information written in step S1, and acquiring level information of the input pin; and step S4, comparing the level information of the input pin with the wake-up level information written in step S1, if they are consistent, writing the ID of the input pin that is to serve as a wake-up source to the retention RAM and triggering the system to enter a normal operating mode, and if they are inconsistent, disabling the power supply to the MCU pin. A wake-up control device for a BCM is further provided.
    Type: Grant
    Filed: November 23, 2017
    Date of Patent: October 18, 2022
    Assignee: GUANGZHOU AUTOMOBILE GROUP CO., LTD.
    Inventors: Wenlong Zhang, Shaotang Huang, Zhide Zhang, Guangwei Ran
  • Patent number: 11470215
    Abstract: A control device includes a processor and a first storage portion. The processor executes a control process based on data stored in a main memory. The first storage portion stores a first memory image related to the main memory after a process of starting-up an operating system by the processor is completed. The control device loads the first memory image into the main memory if the operating system is started up.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: October 11, 2022
    Assignee: TOSHIBA TEC KABUSHIKI KAISHA
    Inventor: Yasuhiro Inagaki
  • Patent number: 11469815
    Abstract: A system, apparatus, method, and non-transitory computer readable medium for accurately and efficiently determining communication offsets between at least one user equipment (UE) device and at least one non-terrestrial network (NTN) device may include a UE device including: a memory storing computer readable instructions and at least one processor configured to, determine location information of the UE device; receive group information from a NTN device, the group information including a plurality of group IDs corresponding to a plurality of group coverage areas within a beam coverage area, each of the plurality of group IDs including location information of a corresponding reference point, and group offset information associated with the corresponding reference point; select a group ID from the plurality of group IDs based on the location information of the UE device and the plurality of reference points; and perform UL transmission based on the group offset information.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: October 11, 2022
    Assignee: Nokia Technolgies Oy
    Inventors: Tzu-Chung Frank Hsieh, Ryan Keating
  • Patent number: 11470252
    Abstract: A method may include enabling operation of a time of flight (TOF) proximity sensor at an information handling system and initializing execution of a software service. The method may further include receiving, at the software service, an alert signal from the TOF proximity sensor indicating movement proximate to the information handling system. In response to receiving the alert signal, a camera at the information handling system may be configured to capture an image. The image may be analyzed by a vision system coupled to the camera to determine a gaze direction of a user at the information handling system. Operation of the information handling system may be configured based on the gaze direction.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: October 11, 2022
    Assignee: Dell Products L.P.
    Inventor: Karun Palicherla Reddy
  • Patent number: 11467647
    Abstract: A wireless mobile device in a public communication network receives network-initiated signaling or messaging, while operating in a battery-conserving mode, or modes that, keep(s) minimal baseband processing functions awake. The baseband processing functions process incoming signaling or data in a received message to determine whether to act further on information in the incoming message by enabling additional processing capability in the mobile device. The mobile device may have permanent template criteria values, either coded in firmware or implemented in hardware, or temporary template criteria values, stored in RAM or processor registers, that are compared to values of an incoming message or datagram from the mobile network to determine whether to perform additional actions, such as awakening an application processor.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: October 11, 2022
    Assignee: M2MD TECHNOLOGIES, INC.
    Inventor: Charles M. Link, II
  • Patent number: 11464205
    Abstract: A pet monitoring device (101) for monitoring a sub-dermal RFID microchip (103), the pet monitoring device comprising: a wearable item (1) bearing 1 to 5 turns of electrical conductor (7) wound circumferentially to form a wearable item resonator; and an RFID reader (9) attachable and detachable to said wearable item, wherein said RFID reader comprises: a driving circuit (1100) comprising a primary inductance (Lp) inductively coupled to said wearable item when said RFID reader is attached to said wearable item; a secondary inductance (Ls) and resonance capacitor (Cs) conductively coupled to said wearable item when said RFID reader is attached to said wearable item, wherein the secondary inductance and resonance capacitor form the wearable item resonator with said electrical conductor, wherein the wearable item resonator comprises a circuit (1004) to automatically adjust said resonance capacitor to compensate for a size of said wearable item when fitted to said pet; wherein the driving circuit is operable to dri
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: October 11, 2022
    Assignee: SureFlap Ltd.
    Inventor: Nicholas Patrick Roland Hill
  • Patent number: 11446551
    Abstract: A method includes: supporting a normal operation mode, during which functionalities of a portable apparatus are available through an operating system of the apparatus, wherein the operating system includes a plurality of layers including a kernel and library functions layer; supporting a limited operation mode during which the apparatus is configured to execute a physical activity algorithm based on physical activity data corresponding to a physical activity session performed by a user of the apparatus, wherein the physical activity algorithm applies a direct low-level hardware access bypassing at least the layers above the kernel and the library functions-layer; and switching between the normal operation mode and the limited operation mode.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: September 20, 2022
    Assignee: Polar Electro Oy
    Inventors: David Munoz, Mikko Tuunanen, Matti Korpela, Markku Karjalainen, Jarmo Torvinen
  • Patent number: 11451684
    Abstract: An apparatus includes a control unit that switches a power state between first and second power states, the first power state being a state where one of a plurality of cores is usable and the other cores are unusable, the second power state being a state where the plurality of cores is unusable. Based on reception of the predetermined signal in a case where the apparatus is in the second power state, the control unit causes the apparatus to transition from the second power state to the first power state, and under a first condition to be met after the transition to the first power state in a case where the apparatus is in the first power state, the control unit causes the apparatus to transition from the first power state to the second power state.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: September 20, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Atsushi Hikichi
  • Patent number: 11448148
    Abstract: A method and system of power generating is provided to reduce a startup time of a genset for providing requested power to a utility grid or a load. The genset includes a generator, a turbocharger, and an energy storage. The generator includes an engine. The genset responds to a genset start signal by accelerating an engine speed of the generator to reach a synchronous speed. The engine speed is accelerated more rapidly by activating the energy storage device to supply power to at least one of the generator and the turbocharger. The generator then supplies power to the utility grid or load.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: September 20, 2022
    Assignee: CUMMINS INC.
    Inventors: Axel O. zur Loye, Mark A. Bargent, Andrew G. Kitchen, Robin J. Bremmer, Philipe F. Saad, Milan K. Visaria, Timothy P. Lutz
  • Patent number: 11442518
    Abstract: An extended system includes at least one peripheral component interconnect express (PCIE) connector and a control device. The PCIE connector is suitable for connecting to at least one server device. The control device is connected to PCIE connector. According to at least one working voltage generated by the server device, the control device turns on the extended system and ignores a power control signal generated by the extended system, or the control unit generates at least one wakeup signal according to the power control signal generated by the extended system and transmits the wakeup signal to the server device, so that the server device may turn on and generate a working voltage.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: September 13, 2022
    Assignee: WISTRON CORP.
    Inventors: Zh-Wei Zhang, Syu-Siang Lee
  • Patent number: 11435816
    Abstract: In one embodiment, a processor includes at least one core to execute instructions and a power controller coupled to the at least one core. The power controller may include a first logic to cause the at least one core to exit an idle state and enter into a maximum performance state for a first time duration, thereafter enter into an intermediate power state for a second time duration, and thereafter enter into a sustained performance state. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: September 6, 2022
    Assignee: Intel Corporation
    Inventors: Efraim Rotem, Doron Rajwan, Eliezer Weissmann, Nir Rosenzweig, Eric Distefano, Ishmael F. Santos, James G. Hermerding, II
  • Patent number: 11429370
    Abstract: A software updating apparatus includes a power consumption amount determining section that determines a power consumption amount when a software update is performed, based on a power consumption of a vehicle when the software update is performed and time needed to perform the software update, and an update possibility determining section that determines whether the software update is possible, based on the power consumption amount determined by the power consumption amount determining section and an amount of power present in a battery included in the vehicle.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: August 30, 2022
    Assignee: Honda Motor Co., Ltd.
    Inventor: Genta Inoue
  • Patent number: 11429335
    Abstract: A display control method executed by a computer, the method includes creating information that indicates settings for a new screen and storing the created information in a memory, in response to receiving a drawing request to cause a terminal device to draw the new screen, from an application that controls input and output of a screen by a sequential process that executes processes in a predetermined processing order; treating the new screen as the input target screen and transmitting drawing data to draw the new screen to the terminal device, based on the information for the new screen; and treating the new screen among screens as the input target screen and transmitting drawing data to draw the screens collectively, to the terminal device, based on information for each of the screens, when the information for the screens is stored in the memory.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: August 30, 2022
    Assignee: FUJITSU LIMITED
    Inventors: Yojiro Mori, Shun Kudo, Takamasa Uramoto, Takashi Yamamoto, Takashi Ohata
  • Patent number: 11422613
    Abstract: An information handling system may use algorithms implemented in hardware or software for allocating system resources to prioritize applications based on user interaction with the information handling system. An information handling system may optimize the power consumption in an information handling system or electronic device by adjusting performance parameters that redirect available thermal and power headroom to applications that the user is interacting with. The information handling system may monitor user interaction with windows rendered by the information handling system, whether on an internal display or external display. For example, a refresh rate of a monitor displaying a rendered window with less interaction than other rendered windows may be reduced to reduce power consumption related to operation of that monitor. Additional thermal headroom of the information handling system may be used to improve responsiveness of rendered windows with which the user is interacting.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: August 23, 2022
    Assignee: Dell Products L.P.
    Inventors: Farzad Khosrowpour, Jong Seo Lee
  • Patent number: 11425582
    Abstract: A location monitoring system, such as an alarm system employed at a house or other location, can include a wireless, battery-operated camera. The camera can have a low power mode in which all components other than a low power communications module are deactivated. The camera can be activated by a signal received by the low power communications module, and the camera can establish a direct communications link with, and send video image data to, a remote server. Where the camera/server direct communications link is inoperable, a link to a local controller is established, and at least a portion of the video image data sent to the controller, which can send a portion of the video image data via an alternate network.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: August 23, 2022
    Assignee: SimpliSafe, Inc.
    Inventors: Charles Laurans, Rahul Subramany, Darrell Andrew Holigan, Michael E. Noonan