By Shutdown Of Only Part Of System Patents (Class 713/324)
  • Patent number: 11269677
    Abstract: Data Center (DC) server power management monitors resource utilization and energy consumption characteristics of an individual host server, and a Virtual Machine (VM) and the applications running inside any VM of DC servers. An analysis and learning module identifies trends and opportunities to optimize DC resources by releasing the underutilized host servers. It derives power metrics to measure the energy footprint of the VMs and the associated applications. It suggests optimal destination servers to migrate each of the VMs with corresponding applications from the underutilized host servers. The power consumption of these VMs with their applications on the power-efficient destination servers is less after the migration. Powering off the underutilized freed-up servers saves energy impacting the overall power consumption of the data center.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: March 8, 2022
    Assignee: Vigyanlabs Innovations Private Limited
    Inventors: Mousumi Paul, Sanjaya Ganesh, Srivatsa Krishnaswamy, Srinivas Varadarajan
  • Patent number: 11265142
    Abstract: The disclosure concerns a method of protecting a calculation on a first number and a second number, including the steps of: generating a third number including at least the bits of the second number, the number of bits of the third number being an integer multiple of a fourth number; dividing the third number into blocks each having the size of the fourth number; successively, for each block of the third number: performing a first operation with a first operator on the contents of a first register and of a second register, and then on the obtained intermediate result and the first number, and placing the result in a third register; and for each bit of the current block, performing a second operation by submitting the content of the third register to a second operator with a function of the rank of the current bit of the third number, and then to the first operator with the content of the first or of the second register according to state “0” or “1” of said bit, and placing the result in the first or second re
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: March 1, 2022
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Ibrahima Diop, Yanis Linge
  • Patent number: 11249900
    Abstract: Techniques for efficiently purging non-active blocks in an NVM region of an NVM device using virtblocks are provided. In one set of embodiments, a host system can maintain, in the NVM device, a pointer entry (i.e., virtblock entry) for each allocated data block of the NVM region, where page table entries of the NVM region that refer to the allocated data block include pointers to the pointer entry, and where the pointer entry includes a pointer to the allocated data block. The host system can further determine that a subset of the allocated data blocks of the NVM region are non-active blocks and can purge the non-active blocks from the NVM device to a mass storage device, where the purging comprises updating the pointer entry for each non-active block to point to a storage location of the non-active block on the mass storage device.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: February 15, 2022
    Assignee: VMWARE, INC.
    Inventors: Xavier Deguillard, Ishan Banerjee, Julien Freche, Kiran Tati, Preeti Agarwal, Rajesh Venkatasubramanian
  • Patent number: 11237756
    Abstract: According to one embodiment, a memory system receives from a host a first write request including a first block identifier designating a first write destination block to which first write data is to be written. The memory system acquires the first write data from a write buffer temporarily holding write data corresponding to each of the write requests, and writes the first write data to a write destination page in the first write destination block. The memory system releases a region in the write buffer, storing data which is made readable from the first write destination block by writing the first write data to the write destination page. The data made readable is a data of a page in the first write destination block preceding the write destination page.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: February 1, 2022
    Assignee: Toshiba Memory Coiporation
    Inventors: Shinichi Kanno, Hideki Yoshida, Naoki Esaka
  • Patent number: 11216059
    Abstract: Dynamic tiering of datacenter power for workloads is disclosed. A power capacity, including redundant power capacity and granular power capacity values within a datacenter, is determined. An outage time duration requirement for the power capacity that was determined is evaluated, where the outage time duration requirement is a number of minutes. A hold time duration requirement for the power capacity is evaluated, where the hold time duration is a number of minutes. A number of allowable occurrences of power outage for the power capacity is evaluated. A power requirement metric, based on the outage time duration requirement, the hold time duration requirement, and the number of occurrences, is calculated. A power topology within the datacenter is modified based on the power requirement metric. The modifying provides dynamic power tiering within the datacenter. The dynamic tiering includes a variable service level agreement for power within the datacenter.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: January 4, 2022
    Inventors: Clark A. Jeria Frias, Karimulla Raja Shaikh, Shankar Ramamurthy
  • Patent number: 11209939
    Abstract: Aspects of the present invention relate to user interface control of a head-worn computer.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: December 28, 2021
    Assignee: Mentor Acquisition One, LLC
    Inventors: Nicholas Benjamin Pelis, Sean Tomas Mostajo O'Hara, Robert Michael Lohse, Andrew Carl Heisey
  • Patent number: 11189327
    Abstract: Memory devices, memory systems, and methods of operating the same are disclosed in which a memory device, in response to receiving a mode register read (MRR) command directed to one or more write-only bits of a mode register, reads data indicative of a status of the memory device about the memory device from one or more cells of a memory array of the memory device that are different from the write-only mode register. The data can include device settings, environmental conditions, usage statistics, metadata, feature support, feature implementation, device status, temperature, etc. The status information mode can be optionally enabled or disabled. The memory devices can include DDR5 DRAM memory devices.
    Type: Grant
    Filed: March 11, 2020
    Date of Patent: November 30, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Matthew A. Prather, Randall J. Rooney
  • Patent number: 11146721
    Abstract: In a communication system comprising a first communication apparatus and a second communication apparatus, the first communication apparatus transmits a first notification for connection processing in short-range wireless communication during an operation in a first power mode, and transmits a second notification, different from the first notification, for the connection processing in the short-range wireless communication during an operation in a second power mode in which power is saved more than in the first power mode. The second communication apparatus starts, if the first notification is received, the connection processing at an arbitrary timing, and starts, if the second notification is received, the connection processing at a timing restricted as compared to the case in which the first notification is received.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: October 12, 2021
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kaori Ikeda, Toshiyuki Takagi
  • Patent number: 11126242
    Abstract: Disclosed techniques include time-varying power management within datacenters. A set of power policies for managing power within a datacenter is obtained. The set of policies varies over time. A priority is determined for a policy within the set of policies for managing the power within the datacenter. The policy within the set varies over time. A situation within the datacenter is identified where the situation matches that described in the policy within the set of policies. A power arrangement within the datacenter is modified based on the policy within the set of policies. The power arrangement within the datacenter applies to a section of the datacenter including one or more IT racks. The modifying includes powering a set of loads within the datacenter by a specific power source, changing a topology within the datacenter, powering down a portion of the datacenter, or changing a service level agreement support level.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: September 21, 2021
    Assignee: Virtual Power Systems, Inc.
    Inventors: Karimulla Raja Shaikh, Clark A. Jeria Frias, Martin P Leslie
  • Patent number: 11126247
    Abstract: A method for updating a power mode parameter combination, includes identifying a current hardware combination of a client host; loading and executing a current application program; loading a default profile according to the current application program to update a current power mode parameter combination of the current hardware combination; receiving a user-defined parameter combination to update the current power mode parameter combination of the current hardware combination; correlating the current application program, the current hardware combination and the updated current power mode parameter combination to generate a current profile as an updated default profile; and transmitting the current profile to a server as a candidate profile.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: September 21, 2021
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Ching-Hung Chao, Hou-Yuan Lin, Mou-Ming Ma, Chun-Kun Lan, Po-Chang Tseng, Hung-Yen Chen, Chun-Yu Wang, Yih-Neng Lin
  • Patent number: 11126254
    Abstract: Systems and methods, according to the present disclosure, determines a duration of the current queue of commands in the controller, executes all full commands capable of being executed prior to the beginning of a low power cycle. Commands that are not executed may be re-fetched when the device enters a power mode. In an alternate embodiment, a portion of a command that is executable prior to the beginning of a low power cycle is executed, with the un-executed portion of the command being stored on the device, in an “always on” or AON memory. This un-executed portion is fetched and executed when the device enters the power mode.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: September 21, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Amir Segev, Shay Benisty
  • Patent number: 11126546
    Abstract: This application provides a garbage data scrubbing method and a device, and relates to the field of terminals, to resolve a problem that delivering a discard message in a file system transaction affects a user foreground operation. The method includes: obtaining an IO busy/idle status of a terminal at a current moment, where the IO busy/idle status includes a busy state and an idle state (S301); and if the IO busy/idle status of the terminal at the current moment is the idle state, delivering a discard message to a storage device (S302), where the discard message includes an initial address and a size of to-be-scrubbed physical space in the storage device, and the discard message is used to unbind a mapping relationship between a physical address of the to-be-scrubbed physical space and a corresponding logical address.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: September 21, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Chao Yu, Hao Chen, Bifeng Tong, Chengliang Zheng, Xiyu Zhou
  • Patent number: 11112849
    Abstract: A communications processor is operative in a plurality of modes including at least a high performance mode, a power savings mode with lower computational capability, and a shutdown mode with a wakeup capability. A memory for the communications processor has a high speed segment and a low speed segment, the high speed segment and low speed segment respectively on a high speed data bus and a low speed data bus, the high speed data bus and low speed data bus coupled by a bidirectional bridge.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: September 7, 2021
    Assignee: Silicon Laboratories Inc.
    Inventors: Partha Sarathy Murali, Suryanarayana Varma Nallaparaju, Kriyangbhai Vinodbhai Shah, Venkata Rao Gunturu, Subba Reddy Kallam, Mani Kumar Kothamasu
  • Patent number: 11115930
    Abstract: A controlling method for an electronic device is provided, including the following steps: receiving a feedback signal; determining a signal strength value of the feedback signal; obtaining a first threshold value and a second threshold value; comparing the signal strength value with the first threshold value and the second threshold value, where the first threshold value is less than the second threshold value; controlling a screen to operate in a first mode when the signal strength value is greater than the second threshold value; comparing the signal strength value with a predetermined value when the signal strength value is greater than the first threshold value but not greater than the second threshold value, and adjusting the first threshold value to be the signal strength value when the signal strength value is greater than the predetermined value.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: September 7, 2021
    Assignee: ASUSTEK COMPUTER INC.
    Inventor: Kun-Hsin Chiang
  • Patent number: 11094488
    Abstract: According to one embodiment, a port connection circuit includes a controller includes a first port configured to selectively switch to an input state or to an output state, a second port configured to output a switch control signal, a third port configured to detect an event, an input contact connected to or disconnected from an output contact of an external connector and connected to the third port, a switch connected between the input contact and the first port, and a switch control circuit configured to close or open the switch based on a voltage of the input contact.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: August 17, 2021
    Assignee: TOSHIBA CLIENT SOLUTIONS CO., LTD.
    Inventor: Motoaki Ando
  • Patent number: 11086388
    Abstract: A memory controller, an application processor, and a method of operating the memory controller can control performance and power consumption of an input/output device. The method includes allowing the memory device to enter a power down mode after an idle state is maintained for a first time period corresponding to a first setting value which is currently set, allowing the memory device to enter from the power down mode into an active state when access to the memory device occurs, determining a maintenance time of the power down mode to change the first setting value to a second setting value, based on a result obtained by monitoring a driving pattern of the memory device, and when the idle state is maintained for a second time period different from the first time period, allowing the memory device to enter the power down mode, based on the second setting value.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: August 10, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Joon Kang, Tae-Hun Kim
  • Patent number: 11048438
    Abstract: In some aspects, the present disclosure provides a method for managing data communication rates of a memory device. The method includes receiving an input/output (I/O) operation to be performed by the memory device, detecting a temperature of the memory device, and determining whether the detected temperature satisfies a threshold condition. The threshold condition is satisfied if the detected temperature is above a first temperature threshold or below a second temperature threshold. If the threshold condition is satisfied, selecting a gear from a plurality of gears based on a ranking of the plurality of gears at the detected temperature, wherein each gear of the plurality of gears correspond to a respective one of a plurality of data rates used by the memory device for performing I/O operations, and serving, to the memory device, the I/O operation with an indication to perform the I/O operation using the selected gear.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: June 29, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Madhu Yashwanth Boenapalli, Sai Praneeth Sreeram, Surendra Paravada, Venu Madhav Mokkapati
  • Patent number: 11048319
    Abstract: A data processing device communicating with a memory device via a memory interface includes: at least one data processor configured to generate first data; a data converter configured to generate second data written to the memory device from the first data; and a controller configured to enable the data converter to generate the second data having a size less than that of the first data.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: June 29, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyun-Gu Kang, Se-Hyoung Kim
  • Patent number: 11036270
    Abstract: Systems and methods for providing power to a home entertainment integrated circuit chip are disclosed. The home entertainment integrated circuit chip can operate in at least two power control modes: “power on” mode and “standby” mode. In power on mode, power is supplied to IC core module from a main power supply. The power supplied to the IC core module is isolated from power supplied to a standby island. Accordingly, during the second mode power is applied only to the standby power island through a regulator internal to the integrated circuit chip. The regulator is coupled to an external peripheral input/output (I/O) power supply that is independent of the main power supply.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: June 15, 2021
    Assignee: Entropic Communications, LLC
    Inventor: Branislav Petrovic
  • Patent number: 11039004
    Abstract: A processor-based personal electronic device (such as a smartphone) is programmed to automatically respond to data sent by various sensors from which the user's activity may be inferred. One or more alarms on the device may be temporarily disabled when sensor data indicates that the user is asleep. One or more of the sensors may be worn by the user and remote from the device. A wireless communication link may be used by the device to obtain remote sensor data. Data from on-board sensors in the device—such as motion sensors, location sensors, ambient light sensors, and the like—may also be used to deduce the user's current activity. User data (such as calendar entries) may also be used to determine likely user activity and set alarms accordingly. Biometric data from a second, nearby person may also be used to automatically select certain alarm modes on a first person's device.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: June 15, 2021
    Assignee: Apple Inc.
    Inventors: Shannon M. Ma, Devrim Varoglu, Mohammad Bidabadi, Paolo D. Concha
  • Patent number: 11036273
    Abstract: There are provided a memory system and an operating method thereof. A memory system includes a plurality of memory devices for performing operations, a power consumption profile table storing section for storing a power consumption profile table of power consumption values with respect to times when the memory devices perform the operations, and a processor for deriving a total power consumption value for the plurality of memory devices based on the power consumption profile table, and determining whether to release or hold a queued command based on the derived total power consumption value.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: June 15, 2021
    Assignee: SK hynix Inc.
    Inventors: Dong Sop Lee, In Jae Yoo, Dong Yeob Chun
  • Patent number: 11032772
    Abstract: A wireless communication device (UE) may include a paging subsystem that performs paging-monitoring as part of wireless communications of the wireless communication device. The UE may place wireless communication system resources not required during paging-monitoring into either a low-power state or a power-down state, and those system resources may remain in one of those respective states during paging-monitoring. The wireless communication system resources not required during the paging-monitoring may include at least a wireless communications protocol stack used during the wireless communications of the UE, and at least system resources used for performing uplink related tasks independently of wireless communication system resources used for performing downlink related tasks.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: June 8, 2021
    Assignee: Apple Inc.
    Inventors: Moustafa M. Elsayed, Tarik Tabet
  • Patent number: 10999733
    Abstract: An always-listening-capable computing device is disclosed, comprising: a first electronic sensor configured to receive user input, a second electronic sensor configured to receive a signal indicating that a user depressed a physical button, a gate-keeping module implemented by a processor, wherein data from the first electronic sensor passes through the gate-keeping module while a gatekeeping function is disabled, no data from the first electronic sensor passes through the communications module while the gatekeeping function is enabled, all data input to the gate-keeping module is received via an exclusive input lead from the first electronic sensor, and all data output from the gate-keeping module is transmitted via an exclusive output lead to a component other than the first electronic sensor. The device receives the signal indicating that the user has depressed the physical button; and enables or disables a functionality of a second computing device.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: May 4, 2021
    Inventor: Thomas Stachura
  • Patent number: 10996727
    Abstract: In one or more embodiments, one or more systems, processes, and/or methods may determine that an external power supply coupling is coupled to an information handling system (IHS); may determine that power is not being received via the external power supply coupling; may, after determining that determining that power is not being received via the external power supply coupling, determine that a battery power supply of the IHS is able to power the IHS; may determine that a user is not present; may save a state of the IHS to a non-volatile memory medium; and may power down the IHS. In one or more embodiments, the one or more systems, processes, and/or methods may further receive power via the external power supply coupling; may power up the IHS; and may restore the state of the IHS from the non-volatile memory medium.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: May 4, 2021
    Assignee: Dell Products L.P.
    Inventors: Richard C. Thompson, Karthikeyan Krishnakumar
  • Patent number: 10990498
    Abstract: A data storage device includes a nonvolatile memory device including dies; and a controller. The controller includes a processor configured to transmit operation commands to the nonvolatile memory device, and output control signals instructing to generate power consumption profiles for dies which operate; and a power management unit configured to operate according to the control signals. The power management unit includes a power profile command table in which power profile commands corresponding to each of the operation commands are stored; a power profile command processing circuit configured to generate the power consumption profiles, by processing the power profile commands corresponding to each control signal; and a power budget scheduler configured to determine whether to transmit the operation commands to the nonvolatile memory device, depending on a total power consumption amount summed at each set unit time based on the power consumption profiles.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: April 27, 2021
    Assignee: SK hynix Inc.
    Inventors: Injae Yoo, Dong Yeob Chun
  • Patent number: 10983577
    Abstract: An information handling system (IHS) includes a power supply unit (PSU) and a power assist unit (PAU). The PSU provides power to a power rail at a first voltage level when he IHS is in a first platform state, and at a second voltage level when the IHS is in a second platform state. The PAU includes a power storage element, a converter coupled to the power storage element and to the power rail, and a controller. The controller determines whether the IHS is operating in the first or second platform state, directs the converter to provide power from the power storage element to the power rail at the first voltage level when the information handling system is in the first platform state, and to direct the converter to provide power from the power storage element to the power rail at the second voltage level when the information handling system is in the second platform state.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: April 20, 2021
    Assignee: Dell Products L.P.
    Inventors: John E. Jenne, Terence K. Rodrigues
  • Patent number: 10976791
    Abstract: An access point, which is a Power over Ethernet (PoE) Powered Device (PD) measures input voltage and input current. The access point determines a power requirement of the access point based on the measured current, measured voltage, and information about power requirements of access point components or devices coupled to the access point a power requirement of the access point. The access point communicates the determined power request to a power sourcing equipment (PSE), e.g., a network switch. In some embodiments, the access point further communicates one of: measured input current and measured input voltage to the PSE. The PSE uses the information received from the access point, e.g., power request and power measurements to determine an amount of power to be granted to the access point. If the access point does not receive the requested power level the access point selects internal components and/or external devices to de-power.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: April 13, 2021
    Assignee: Juniper Networks, Inc.
    Inventors: Josh Rosenthal, John Musante, Oscar Ernohazy
  • Patent number: 10969850
    Abstract: An operation method of a communication node in a vehicle network may include detecting a local event; transitioning an operation mode of the communication node from a sleep mode to a normal mode when the local event is detected; generating a wake-up signal including a wake-up pattern corresponding to the local event; and transmitting the wake-up signal.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: April 6, 2021
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Dong Ok Kim, Kang Woon Seo, Jin Hwa Yun
  • Patent number: 10972534
    Abstract: Cloud services require the outward appearance of unlimited resources with flexible availability for varying demand. However, while on-demand allocation and deallocation of resources may seem efficient, there are significant cases where simply allocating and deallocating resources just in response to demand results in inefficiencies. As discussed herein, cloud services can be made more efficient by deallocating resources based on delays incurred between when resources are requested to be deallocated and reallocated and when they actually are deallocated and allocated, and for how long the resource would be returned to the cloud before needing to be reallocated. Deallocating resources more efficiently not only gives a direct performance improvement, but also indirect, since deallocated resources may not be available again when demand increases.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: April 6, 2021
    Assignee: AT&T Intellectual Property I, L.P.
    Inventor: Robert Todd Stephens
  • Patent number: 10956051
    Abstract: Techniques are described for organizing data within a storage system. In one or more embodiments, a storage system monitors access to a first set of objects comprising (a) a first subset of objects associated with at least a first attributes and (b) a second subset of objects associated with at least a second attribute. Based on the monitoring, the storage system identifies a pattern of accessing objects in the second subset of objects subsequent to accessing objects in the first subset of objects. Responsive to receiving a request to store a second set of objects, the storage system generates a file in which a first object associated with at least the first attribute and a second object associated with at least the second object are stored consecutively.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: March 23, 2021
    Assignee: Oracle International Corporation
    Inventor: Aditya Sawhney
  • Patent number: 10936214
    Abstract: Briefly, in accordance with one or more embodiments, an apparatus comprises a memory comprising one or more physical memory chips, and a processor to implement a working set monitor to monitor a working set resident in the one or more physical memory chips. The working set monitor is to adjust a number of the physical memory chips that are powered on based on a size of the working set.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventors: Travis T. Schluessler, Prasoonkumar Surti, Aravindh V. Anantaraman, Abhishek R. Appu, Joydeep Ray, Altug Koker, Balaji Vembu
  • Patent number: 10911345
    Abstract: A method is described that involves determining that utilization of a logical link has reached a first threshold. The logical link comprises a first number of active physical links. The method also involves inactivating one or more of the physical links to produce a second number of active physical links. The second number is less than the first number. The method also involves determining that the second number of active physical links have not been utilized for a period of time and inactivating another set of links.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: February 2, 2021
    Assignee: Intel Corporation
    Inventors: Hemant G. Rotithor, An-Chow Lai
  • Patent number: 10902819
    Abstract: A connection device to which a PC and a head-mounted image display unit that includes a right display unit and a left display unit configured to display an image are connected, the connection device including a control unit configured to control the right display unit and the left display unit to enable execution of functions including a display function of displaying an image input from the PC and a display stop function of stopping display, wherein the control unit activates the image display unit in a display mode based on a display condition when power supply to the connection device is started, and the display mode includes at least a first display mode in which the image is displayed on the right display unit and the left display unit and the display stop function is disabled.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: January 26, 2021
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Fusashi Kimura, Kazuma Sakata, Kazuma Kitadani, Yuichi Kunitomo
  • Patent number: 10885910
    Abstract: Systems, methods, and computer-readable media are disclosed for systems and methods for voice-forward graphical user interface mode management. Example methods include determining that a device is coupled to an accessory device, determining that being coupled to the accessory device causes the device to deactivate a first operating mode and activate a second operating mode, where the second operating mode has a lower content density than the first operating mode, and determining that an application setting of an application executing on the device is causing the device to remain in the first operating mode. Example methods may include determining that a new value is associated with the application setting, and causing the device to activate the second operating mode.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: January 5, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Kynan Dylan Antos, Jenny Toi Wah Lam, Mark Yoshitake, Ankur Narendra Bhai Vachhani, Blade Imsande McRae, Robert Williams, James Martin Conway, Nedim Fresko, Michael Wendling, Mustafa Husain
  • Patent number: 10877921
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to facilitate communication with electronic devices supported by an interface specification and electronic devices unsupported by the interface specification. An example apparatus includes a first firmware interface to facilitate communication between an operating system and a first electronic device, the first electronic device supported in an interface specification. The example apparatus includes a second firmware interface instantiated to facilitate communication with a second electronic device that is not supported in the interface specification, the second firmware interface configured to communicate with the first firmware interface to route communication between the operating system and the second electronic device via the first firmware interface and the second firmware interface.
    Type: Grant
    Filed: July 13, 2016
    Date of Patent: December 29, 2020
    Assignee: Intel Corporation
    Inventors: Nivedita Aggarwal, Reuven Rozic, Amir Levy, Chia-Hung Kuo
  • Patent number: 10871926
    Abstract: There is provided a control apparatus for controlling a static random access memory (SRAM) capable of shifting from a first power mode to a second power mode that is capable of holding data and saving more power than the first power mode or a third power mode that is not capable of holding data but is capable of saving more power than the second power mode. The control apparatus includes a first instruction unit configured to output an instruction for shifting the SRAM to the second power mode based on a state of the control apparatus and a second instruction unit configured to output an instruction for shifting the SRAM to the third power mode based on a state of the control apparatus.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: December 22, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Daisuke Matsunaga
  • Patent number: 10860078
    Abstract: An information handling system (IHS), power operation controller and method provide for execution of delegated processes in a cluster without inadvertent interruption due to a power operation of the IHS. The power operation controller of the IHS has a processing subsystem that is communicatively coupled to a network interface and a memory containing a power operation utility. The processing subsystem executes, via the network interface, a delegated process on a network resource. The processing subsystem executes the power operation utility to cause the IHS to determine whether a request for a power operation of the IHS is received. In response to determining that a power operation is received, the processing subsystem transfers the delegated process to another network resource. In addition, during a transference of the delegated process, the processing subsystem prevents the IHS from performing a power operation of the IHS that would cause interruption of the delegated process.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: December 8, 2020
    Assignee: Dell Products, L.P.
    Inventors: Vaideeswaran Ganesan, Balamurugan Gnanasambandam, Tamilarasan Janakiram, Sreeram Muthuraman
  • Patent number: 10846086
    Abstract: A method for managing a computation task on a functionally asymmetric multi-core processor includes a plurality of cores at least one of which comprises at least one hardware extension for executing specialized instructions, comprising the following steps: a) starting the execution of the computation task on a core of the processor; b) monitoring a parameter indicative of a quality of service of the computation task, and at least a number of specialized instructions loaded by the core; c) identifying instants splitting an application period of the computation task into a predetermined number of portions; d) computing costs or gains in quality of service and in energy consumption corresponding to different management options of the computation task; and e) making a management choice according to the costs or gains thus computed. Computer program product, processor and computer system for implementing such a method are also provided.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: November 24, 2020
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Karim Ben Chehida, Paul-Antoine Arras
  • Patent number: 10839042
    Abstract: Simulation data is summarized and queried. A user provides an indication of simulation data that will be subsequently queried. The queried simulation data comprises (i) a set of key attributes, (ii) a set of events, and/or (iii) a set of causality relationships between a plurality of the events. First level summaries summarize simulation executions of scenarios of a combinatorial process and comprise (i) a summary of the frequency distribution of key attribute values, (ii) a timestamp for each event, and (iii) an indication of causality between events observed during the simulation. Second level summaries summarize executions of the given scenario and comprise (i) a consolidated distribution probability for the key attributes, (ii) a frequency distribution of occurrences of the events in a single execution, and (iii) a frequency of observations of the causality between pairs of events.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: November 17, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Jonas F. Dias, Jaumir Valença da Silveira Junior, Vinicius Michel Gottin, Angelo E. M. Ciarlini
  • Patent number: 10838761
    Abstract: A method of managing a plurality of applications on a computing device. The method comprises receiving, by a first application running on the computing device, a lock message comprising a timestamp and a digital signature associated with the timestamp, from a second application miming on the computing device. Upon receipt of the lock message, the first application verifies the digital signature to confirm the authenticity of the timestamp. Once the timestamp has been confirmed by the first application, the first application locks the first application. Accordingly, a lock event with respect to an application in the plurality of applications can be propagated to other applications in the plurality of applications.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: November 17, 2020
    Assignee: BlackBerry Limited
    Inventors: Sean Michael Quinlan, Haniff Somani, Sanjiv Maurya
  • Patent number: 10834190
    Abstract: Clustered containerized applications are implemented with scalable provisioning. Methods include receiving a data storage request to store one or more data values in a storage volume implemented across a storage node cluster, the storage node cluster including a plurality of storage nodes including one or more storage devices having storage space allocated for storing data associated with the storage volume. Methods may further include identifying a cluster hierarchy associated with the storage node cluster, the cluster hierarchy identifying storage characteristics of the plurality of storage nodes, the cluster hierarchy also identifying physical location information for the plurality of storage nodes, the physical location information indicating node-to-node proximity on a network graph.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: November 10, 2020
    Assignee: Portworx, Inc.
    Inventors: Goutham Rao, Vinod Jayaraman, Ganesh Sangle
  • Patent number: 10831568
    Abstract: A method, computer system, and computer program product for an electronic alarm management system. The method may include detecting a trigger event that causes a user device to be shut down. The method may include determining whether there is an event for a user of the user device that is scheduled to occur within a first time period closely following a time of the trigger event. In response to determining that there is an event occurring within the time period closely following the time of the trigger event, the method may include determining whether the event is associated with an importance score that exceeds a threshold. The event that has the importance score exceeding the threshold is deemed a critical event. The method may include generating and displaying a notification on the user device reminding the user of the critical event.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: November 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Eliza Farley, Maureen Kraft, Alexander Rice, Fang Lu
  • Patent number: 10819607
    Abstract: A method includes obtaining component utilization data for multiple components of a compute node during at least one previous execution of a workload. The method further includes using the component utilization data to identify a first component having a utilization level that is less than a threshold utilization level during the at least one previous execution of the workload, wherein the first component is one of the multiple components of the compute node. The method still further includes, during a subsequent execution of the workload on the compute node, throttling the first component to prevent the first component from exceeding the threshold utilization level.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: October 27, 2020
    Assignee: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
    Inventors: Srihari V. Angaluri, Gary D. Cudak, Ajay Dholakia, Chulho Kim
  • Patent number: 10819870
    Abstract: An image processing apparatus includes an image-data processor, an interface, a power source, and a controller. The controller selects a first mode, a second mode, or a third mode as a power supply mode. In the first mode, electric power is supplied from the power source to the image-data processor and the interface. In the second mode, supply of the electric power from the power source to the image-data processor and the interface is in a stopped state. In the third mode, the electric power is supplied from the power source to the interface, but supply of the electric power to the image-data processor is in a stopped state. The controller switches the power supply mode from the second mode to the third mode in response to receiving a power supply request from an external device via the interface in the second mode.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: October 27, 2020
    Assignee: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Naoki Abe, Hajime Usami
  • Patent number: 10809896
    Abstract: A display apparatus and a method of controlling a display apparatus are provided. The display apparatus includes a display configured to display a screen including a plurality of objects, an input device configured to receive a predefined user command while the screen is displayed, and at least one processor configured to, in response to the predefined user command being input, enter a setting mode for selecting an always-on display object, in response to at least one of the plurality of objects being selected by user input during the setting mode, set a selected object to an always-on display object, and in response to a mode of the display apparatus being changed to a standby mode, control the display to display the selected object on a monochrome background screen.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: October 20, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hun-seop Jeong, Keun-seob Kim, Jin-woo Song, Hong-uk Woo
  • Patent number: 10804800
    Abstract: To provide a power supplying control apparatus, a power supplying apparatus, and a power supplying control method which control power supply appropriately. A power supplying apparatus according to the present embodiment is equipped with a plurality of ports corresponding to a USB (Universal Serial Bus) PD (Power Delivery) standard, a plurality of electric power supplying circuits which are provided corresponding to the ports and supply power to power receiving devices coupled to the ports, and a controller which holds a table of power profiles to which power receiving capabilities for each power receiving device are set, and controls the electric power supplying circuits, based on the table in such a manner that total supply power supplied from the electric power supplying circuits does not exceed a prescribed value.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: October 13, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Kiichi Muto
  • Patent number: 10782758
    Abstract: A framework for system power control of a dual-port non-volatile memory storage device is provided. The electronic system includes a storage device, two hosts and a control circuit within each of the two hosts. Each host filters signals for shortly turning off a power supply of the storage device during a process of boot and reboot of the host. When one of the hosts enters a turn-off state, it is detected whether another one of the hosts is running, and the one of the hosts does not control the power supply if the another one of the hosts is running. Two control signals of the two hosts control the power supply of the storage device through an AND gate.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: September 22, 2020
    Assignee: Wistron Corporation
    Inventors: Syu-Siang Lee, Zh-Wei Zhang
  • Patent number: 10769072
    Abstract: Methods and apparatus relating to techniques for avoiding cache lookup for cold cache. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to receive, in a read/modify/write (RMW) pipeline, a cache access request from a requestor, wherein the cache request comprises a cache set identifier associated with requested data in the cache set, determine whether the cache set associated with the cache set identifier is in an inaccessible invalid state, and in response to a determination that the cache set is in an inaccessible state or an invalid state, to terminate the cache access request. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: September 8, 2020
    Assignee: INTEL CORPORATION
    Inventors: Abhishek R. Appu, Altug Koker, Joydeep Ray, Prasoonkumar Surti, Kamal Sinha, Kiran C. Veernapu, Balaji Vembu
  • Patent number: 10755020
    Abstract: Computing assemblies, such as blade servers, can comprise a plurality of modular computing elements coupled onto an associated circuit board assembly. Assemblies and systems having enhanced individual computing module placement and arrangement are discussed herein, as well as example systems and operations to manufacture such assemblies. In one example, a method includes executing a performance test on a plurality of computing modules to determine at least variability in power consumption across the plurality of computing modules, and binning the plurality of computing modules according to graduated levels of the variability in power consumption. The method also includes selecting from among the graduated levels for placement in an assembly of ones of the computing modules in a progressively lower power consumption arrangement with relation to an airflow of the assembly.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: August 25, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Andres Felipe Hernandez Mojica, William Paul Hovis, Garrett Douglas Blankenburg
  • Patent number: RE48190
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: September 1, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Fubito Igari