Error Detection Or Notification Patents (Class 714/48)
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Patent number: 12271259Abstract: Out-of-bounds recovery circuits configured to detect an out-of-bounds violation in an electronic device, and cause the electronic device to transition to a predetermined safe state when an out-of-bounds violation is detected. The out-of-bounds recovery circuits include detection logic configured to detect that an out-of-bounds violation has occurred when a processing element of the electronic device has fetched an instruction from an unallowable memory address range for the current operating state of the electronic device; and transition logic configured to cause the electronic device to transition to a predetermined safe state when an out-of-bounds violation has been detected by the detection logic.Type: GrantFiled: February 27, 2023Date of Patent: April 8, 2025Assignee: Imagination Technologies LimitedInventors: Ashish Darbari, Iain Singleton
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Patent number: 12273715Abstract: Various embodiments provide methods, vehicle computing devices, storage media, and systems for briefly providing PathHistory information in Broadcast Safety Messages (BSMs) sent from a vehicle when PathHistory information is not required to be included in all BSMs. Various embodiments may include broadcasting BSMs including PathHistory information during a period of time following a change of the vehicle's pseudonym certificate and broadcasting BSMs without PathHistory information at all other times. Some embodiments may further include determining whether sufficient path history points are available for PathHistory information generation, accumulating path history points in response to determining that sufficient path history points are not available for PathHistory information generation, and broadcasting BSMs including PathHistory information during the period of time once sufficient path history points have been accumulated.Type: GrantFiled: June 16, 2020Date of Patent: April 8, 2025Assignee: QUALCOMM IncorporatedInventors: Yan Li, Shuping Chen, Yue Yin
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Patent number: 12273188Abstract: According to various embodiments, an electronic device includes a communication circuit for supporting a Bluetooth™ communication, and at least one processor functionally connected to the communication circuit. The at least one processor is configured to establish, via the communication circuit, a Bluetooth™ low energy (BLE) communication link with an external electronic device, to generate a first data packet from first audio data using a first coding scheme, and generate a second data packet from first audio data using a second coding scheme, and through the BLE communication link, to transmit the first data packet to the external electronic device in a first time interval of a predetermined time interval, and transmit the second data packet to the external electronic device in a second time interval of the predetermined time interval.Type: GrantFiled: September 23, 2022Date of Patent: April 8, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Gupil Cheong, Kyusang Ryu, Hyungseoung Yoo, Doosuk Kang, Kyungtae Kim
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Patent number: 12267213Abstract: Aspects of the subject disclosure may include, for example, obtaining first information indicative of one or more historical operating characteristics of a network; obtaining second information indicative of one or more current operating characteristics of the network; comparing, via a first computer-implemented process that requires no manual intervention, the first information to the second information to make a prediction of a potential future network event, resulting in a predicted future network event; classifying, via a second computer-implemented process that requires no manual intervention, the predicted future network event into one of a plurality of classes of network events; and responsive to the classifying, facilitating, via a third computer-implemented process that requires no manual intervention, an action to at least partially avoid an occurrence of the predicted future network event. Other embodiments are disclosed.Type: GrantFiled: October 12, 2022Date of Patent: April 1, 2025Assignee: AT&T Intellectual Property I, L.P.Inventors: Subrat Patra, Abdulla Udaipurwala
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Patent number: 12267403Abstract: Disclosed is an improved approach to implement the XA architecture, which permits a TM to call back to a RM via an AP. This approach avoids the need for the TM to maintain authentication/authorization credentials for each RM that will be contacted by the TM. This approach therefore also eliminates the need to establish a direct connection between the TM and the RM. An approach is also provided to integrate a traditional XA application with an XA transaction.Type: GrantFiled: January 7, 2022Date of Patent: April 1, 2025Assignee: Oracle International CorporationInventors: Todd Little, Zhenyu Li, Shun Li
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Patent number: 12265478Abstract: The present disclosure generally relates to a XTS cache operation during a power down event. Upon detection of power loss, data that is waiting to be encrypted needs to be flushed to the memory device. For any unaligned data or data less than a flash management unit (FMU) size, the data is grouped together and, if necessary, padded to reach the FMU size and then encrypted, merged with other data FMUs, and written to the memory device. Grouping the unaligned data reduces the amount of padding necessary to reach FMU size and also reduces the amount of data to be encrypted. As such, data flushing can be accomplished using the limited amount of remaining power during the power loss event.Type: GrantFiled: July 21, 2022Date of Patent: April 1, 2025Assignee: Sandisk Technologies, Inc.Inventors: Amir Segev, Shay Benisty
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Patent number: 12265648Abstract: The present invention allows a CEC system to automatedly track the use, storage, access, and modification of sensitive information/data in the system through desktop monitoring. Further, through desktop, video, and audio monitoring of CSRs the system can automatedly determine the improper use, access, storage, and modification of sensitive information by implementing sensitive data use rules that allow a system to be specialized for the user. Finally, the system can automatedly determine and implement violation actions for the improper use, storage, access, and manipulation of sensitive information. This provides an intelligent system capable of locating all sensitive data in the system and regulating the use, access, and storage of sensitive data in the system.Type: GrantFiled: April 2, 2024Date of Patent: April 1, 2025Assignee: Verint Americas, IncInventors: Michael Johnston, Neil Eades, Ashish Sood
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Patent number: 12265728Abstract: A flash memory controller is used in a storage device and coupled to a flash memory device of the storage device through a specific communication interface and includes an input/output (I/O) circuit and a processor. The I/O circuit is coupled to the flash memory device through the specific communication interface, and used for sending commands and data between the flash memory device and the processor. The processor is used for controlling the I/O circuit sending a specific boundary check command signal or a specific boundary check set-feature signal via the specific communication interface to the flash memory device, to make the flash memory device read out more page data of multiple page units from a specific block in the memory cell array and to make the flash memory device determine whether the multiple page units are empty pages.Type: GrantFiled: May 30, 2023Date of Patent: April 1, 2025Assignee: Silicon Motion, Inc.Inventors: Tsu-Han Lu, Hsiao-Chang Yen
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Patent number: 12266201Abstract: An information processing apparatus includes a processor configured to extract from one or more electronic documents viewed before by a user a region of interest on which the user focuses attention and create a thumbnail of an electronic document to be viewed by the user in accordance with the region of interest by extracting an image corresponding to the region of interest from the electronic document.Type: GrantFiled: February 5, 2021Date of Patent: April 1, 2025Assignee: FUJIFILM Business Innovation Corp.Inventor: Yuzo Katayama
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Patent number: 12262057Abstract: A method for compressing images based on joint photographic experts group (JPEG) standard includes: compressing data of one or more first image blocks with a first compression level to produce compression data of the one or more first image blocks; adjusting the first compression level to obtain a second compression level according to at least one of a data size-related index regarding the compression data of the one or more first image blocks or a transmission-related index regarding transmission of the compression data of the one or more first image blocks; and compressing data of a second image block with the second compression level.Type: GrantFiled: March 22, 2022Date of Patent: March 25, 2025Assignee: Realtek Semiconductor Corp.Inventors: Hsu-Jung Tung, Chi-Wang Chai, Weimin Zeng, Yi-Chen Tseng
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Patent number: 12259285Abstract: A semiconductor-based stress sensor can include a bipolar transistor device with first and second collector terminals. An excitation circuit can provide an excitation signal to an emitter terminal of the bipolar transistor device, and a physical stress indicator for the semiconductor can be provided based on a relationship between signals measured at the collector terminals in response to the excitation signal. The signals can indicate a charge carrier mobility characteristic of the semiconductor, which can be used to provide an indication of physical stress. In an example, the physical stress indicator is based on a current deflection characteristic of a base region of the transistor device.Type: GrantFiled: August 2, 2022Date of Patent: March 25, 2025Assignee: Analog Devices, Inc.Inventors: George Pieter Reitsma, Kalin V. Lazarov
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Patent number: 12254335Abstract: A storage device is disclosed. The storage device may include at least one controller for a virtual machine (VM) that is on a source host. Storage in the storage device may store data for the VM. A second storage may store a storage state for the VM. A storage device controller may process at least one read request received from the controller for the VM using the first storage and at least one write request received from the controller for the VM using the first storage. A VM migration state monitor and capture module may assist in the migration of the VM from the source host to a destination host.Type: GrantFiled: August 28, 2020Date of Patent: March 18, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ramdas P. Kachare, Oscar P. Pinto, Yang seok Ki
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Patent number: 12253912Abstract: Disclosed is an operating method of a memory, and the operating method may include reading, from selected memory cells included in the memory, codewords including data and an error correction code; detecting errors in the codewords; correcting the errors in the codewords; re-writing the error-corrected codewords to the selected memory cells; re-reading the re-written error-corrected codewords from the selected memory cells; and determining whether the errors are permanent errors in response to a determination that an error is present in the re-read error-corrected codewords.Type: GrantFiled: February 17, 2023Date of Patent: March 18, 2025Assignee: SK hynix Inc.Inventors: Jin Ho Jeong, Dae Suk Kim, Munseon Jang
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Patent number: 12248460Abstract: Transaction processing systems in accordance with aspects of the invention may process a variety of transactions. Transaction processing systems may include a transaction processing device and a distributed processing system. The transaction processing device obtains transaction requests from a variety of client devices and process the transaction requests. The distributed processing system may also obtain the transaction requests and maintain a transaction history of the transaction requests obtained and/or processed by the transaction processing device. Both the distributed processing system and the transaction processing device may send a transaction succeeded event based on the transaction being processed successfully. The transaction processing device and distributed ledger may also maintain an indication of if a particular transaction has been processed.Type: GrantFiled: February 14, 2024Date of Patent: March 11, 2025Assignee: Capital One Services, LLCInventor: Jacob Creech
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Patent number: 12230995Abstract: An auxiliary power supply device includes a storage circuit having first and second electrical double layer capacitors connected in series between first and second nodes, a first switch element having a first terminal coupled to the first node, and a second terminal, a first discharging resistor provided between the second terminal and a fourth node, a second discharging resistor provided between the fourth node and ground, a second switch element having a third terminal coupled to a third node between the first and second electrical double layer capacitors, and a fourth terminal coupled to the fourth node, and a measurement controller. The measurement controller performs a procedure to compute a capacitance value of the storage circuit as a first process, and a procedure to connect the first switch element and connect the second switch element as a second process.Type: GrantFiled: March 25, 2022Date of Patent: February 18, 2025Assignee: MINEBEA MITSUMI Inc.Inventor: Susumu Osawa
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Patent number: 12230588Abstract: A laser detecting circuit is provided. The laser detecting circuit includes a latch circuit with a first inverter configured to invert a first output signal at a first node to generate a second output signal at a second node, and a second inverter configured to generate the first output signal based on the second output signal. The second inverter includes a plurality of PMOS transistors connected in series between a first source voltage and the first node, and a plurality of NMOS transistors. A gate of each of the plurality of PMOS transistors is connected to the second node, and a drain of each of the plurality of NMOS transistors is connected to the first node. The plurality of NMOS transistors includes dummy NMOS transistors and normal NMOS transistors.Type: GrantFiled: July 8, 2022Date of Patent: February 18, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Cheolhwan Lim, Kwangho Kim, Sangjin Lim, Haejung Choi, Donghun Heo
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Patent number: 12223167Abstract: Provided is a method for cleaning residual paths on a host end, including: acquiring device information of subordinate devices of a plurality of paths; determining, according to the device information, whether links corresponding to the subordinate devices are all abnormal; acquiring a global identification number and connection information of each subordinate device in a case that the links corresponding to the subordinate devices are all abnormal; when the global identification number is not null and the connection information is successfully acquired, querying a mapping state of a volume corresponding to the global identification number and a mapped host according to the global identification number and the connection information; and when the volume is not in the mapping state or the mapped host is not a target host, deleting the plurality of paths and the subordinate devices.Type: GrantFiled: October 29, 2021Date of Patent: February 11, 2025Assignee: INSPUR SUXHOU INTELLIGENT TECHNOLOGY CO., LTD.Inventor: Zhenguang Zhang
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Patent number: 12217407Abstract: Provided is a method in which a processor (1) accesses a database which contains a set of data records containing a focus data record, (2) selects first data records from the set of data records, the first context information of which does not correspond to the first context information of the focus data record, and the second context information of which corresponds to the second context information of the focus data record, (3) lines up a focus graphic, (4) selects second data records from the set of data records, the first context information of which corresponds to the first context information of the focus data record, and the second context information of which does not correspond to the second context information of the focus data record, and (5) lines up second graphics.Type: GrantFiled: December 17, 2021Date of Patent: February 4, 2025Assignee: SIEMENS AKTIENGESELLSCHAFTInventor: Axel Platz
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Patent number: 12210411Abstract: Systems, apparatuses, and methods related to host-based error correction are described. Error correction operations can be performed on a host computing system as opposed to on a memory system. For instance, data containing erroneous bits can be transferred from a memory system to a host computing system and error correction operations can be performed using circuitry resident on the host computing system. In an example, a method can include receiving, by a host computing system, data that comprises a plurality of uncorrected bits from a memory system coupleable to the host computing system, determining an acceptable error range for the data based at least in part on an application associated with the data, and performing, using error correction logic resident on the host computing system, an initial error correction operation on the data based at least in part on the acceptable error range.Type: GrantFiled: November 21, 2022Date of Patent: January 28, 2025Assignee: Micron Technology, Inc.Inventors: Reshmi Basu, Richard C. Murphy
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Patent number: 12212476Abstract: This disclosure generally relate to a method and system for network policy simulation in a distributed computing system. The present technology relates techniques that enable simulation of a new network policy with regard to its effects on the network data flow. By enabling a simulation data flow that is parallel and independent from the regular data flow, the present technology can provide optimized network security management with improved efficiency.Type: GrantFiled: August 15, 2022Date of Patent: January 28, 2025Assignee: Cisco Technology, Inc.Inventors: Sunil Kumar Gupta, Navindra Yadav, Michael Standish Watts, Ali Parandehgheibi, Shashidhar Gandham, Ashutosh Kulshreshtha, Khawar Deen
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Patent number: 12212460Abstract: A variable configuration method and a variable configuration device thereof are disclosed. The variable configuration method for the variable configuration device includes receiving an incident prediction notification from a network at a first time instant, determining at least one variable at a second time instant in response to the incident prediction notification, and outputting the at least one variable at a third time instant. The incident prediction notification is used to instruct the variable configuration device to determine the at least one variable to respond to a quality of service (QoS) violation prediction at a fourth time instant later than the third time instant.Type: GrantFiled: July 27, 2023Date of Patent: January 28, 2025Assignee: Wistron CorporationInventor: Chih-Ming Chen
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Patent number: 12212552Abstract: Disclosed herein are systems and methods that allow for secure access to websites and web-based applications. Also described are systems and methods for secure use and retention of user credentials, as well as methods for dynamic authentication of users and integrity checking of service providers in online environments. Thus, described in the present specification are systems and methods for constructing and destroying private, secure, browsing environments (a secure disposable browser), insulating the user from the threats associated with being online for the purposes of providing secure, policy-based interaction with online services.Type: GrantFiled: July 31, 2023Date of Patent: January 28, 2025Assignee: Authentic8, Inc.Inventors: Ramesh Rajagopal, James K. Tosh, Fredric L. Cox, Perry F. Nguyen, Jason T. Champion
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Patent number: 12204795Abstract: A host submits a command to a memory device, where a host status indicator (ID) for the host and a memory device status ID for the memory device are assigned with the command in at least one of a status command slot related to the command. An interrupt signal asserted during processing of the command is determined, where the interrupt signal is indicative of a change in at least one of the host status ID and the memory device status ID. After determining that the interrupt signal is asserted at least one of the host status ID and the memory device status ID are read. Based on the read information, a failure in at least one of the host and device is corrected prior to initiation of a timeout process.Type: GrantFiled: August 18, 2022Date of Patent: January 21, 2025Assignee: Micron Technology, Inc.Inventor: Muthazhagan Balasubramani
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Patent number: 12204509Abstract: Techniques for autoscaling a deduplication process include receiving a first plurality of event records in an event stream during a first period of time and determining real-time characteristics of the event stream based on the event records received during the first period of time. Based on the real-time characteristics of the event stream, a level of similarity for a deduplication process is selected to apply for future event records received in the event stream. The deduplication process may also be enabled or disabled based on the real-time characteristics. A second plurality of event records is received in the event stream during a second period of time. If deduplication is enabled, the second plurality of event records are deduplicated based on the level of similarity.Type: GrantFiled: February 9, 2024Date of Patent: January 21, 2025Assignee: Oracle International CorporationInventors: Kourosh Lashgari, Joydeep Halder
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Patent number: 12197279Abstract: This application provide a memory fault handling method and apparatus, and relate to the field of computer technologies, to resolve a problem, in the conventional technology, that a system breaks down due to a memory fault. A specific solution is as follows: A management module obtains error information of a memory. The management module determines, based on the error information of the memory by using a machine learning algorithm, a fault feature mode of the memory or an isolation repair technology used to repair the memory. The management module determines, based on the fault feature mode of the memory or the isolation repair technology used to repair the memory, to repair the memory by using at least one of hardware isolation or software isolation.Type: GrantFiled: February 3, 2023Date of Patent: January 14, 2025Assignee: Huawei Technologies Co., Ltd.Inventors: Quanyang Bao, Lin Han
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Patent number: 12192003Abstract: During the delivery of a sequence of packets from a server to a client device, when an expiration time associated with an initial payload of a data packet belonging to a sliding window for delivery is reached without reception of a corresponding acknowledgment from the device, the server (300) resends the data packet with a new payload corresponding to the initial payload of a next data packet to be transmitted through the sliding window.Type: GrantFiled: November 27, 2019Date of Patent: January 7, 2025Assignee: InterDigital CE Patent Holdings, SASInventors: Yvon Legallais, Charline Taibi Guguen, Remi Houdaille
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Patent number: 12191966Abstract: A communication device configured to operate in a communications network that includes a network node can determine that the communication device will perform a radio link procedure (“RLP”) in a mode of operation. The communication device can further determine information associated with a channel monitoring pattern (“CMP”) based on determining that the communication device will perform the RLP in the mode of operation. The communication device can further monitor a channel between the network node and the communication device based on the information associated with the CMP.Type: GrantFiled: October 22, 2021Date of Patent: January 7, 2025Assignee: Telefonaktiebolaget LM Ericsson (publ)Inventors: Muhammad Ali Kazmi, Santhan Thangarasa, Kazuyoshi Uesaka, Sina Maleki, Ali Nader
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Patent number: 12191907Abstract: Provided are a communication device, a communication controlling method, and a non-transitory computer-readable medium storing a communication controlling program that each make it possible to grasp the condition of communication quality. A communication device (1) includes acquiring means (2) configured to acquire quality information concerning a burst error that has occurred in an optical communication line. The communication device (1) includes estimating means (3) configured to estimate a first index value based on the quality information acquired by the acquiring means (2), the first index value indicating a degree of influence of the burst error on communication quality in a first communication device.Type: GrantFiled: October 31, 2023Date of Patent: January 7, 2025Assignee: NEC CORPORATIONInventor: Yohei Hasegawa
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Patent number: 12190658Abstract: A fault diagnosis device 80 includes an input unit 81 and a generation unit 82. The input unit 81 receives input of fault data obtained from a vehicle when a fault of the vehicle occurs and observation data observed in time series by each device of the vehicle until immediately before the fault occurs. The generation unit 82 generates a feature master that associates a content of the fault indicated by the fault data with features extracted from the corresponding observation data.Type: GrantFiled: October 7, 2020Date of Patent: January 7, 2025Assignee: NEC CORPORATIONInventor: Masayuki Sakata
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Patent number: 12191768Abstract: A circuit for detecting failure of a device includes an on-phase detector, an off-phase detector, and protection switch circuitry. The on-phase detector is configured to determine whether a first failure has occurred at the device based on a rate of change of a current at a high-side switching element. The off-phase detector is configured to determine whether a second failure has occurred at the device based on both a current at a low-side switching element and a voltage at a switch node that is electrically coupled to the high-side switching element and the low-side switch. The protection switch circuitry is configured to electrically disconnect the high-side switching element from a supply circuit in response to the on-phase detector determining that the first failure has occurred at the device or in response to the off-phase detector determining that the second failure has occurred at the device.Type: GrantFiled: May 6, 2022Date of Patent: January 7, 2025Assignee: Infineon Technologies AGInventors: Andrea Zuccollo, Danilo Cellucci, Cristina Chiereghin
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Patent number: 12169462Abstract: An information processing system includes a host and a storage device that transmits a first pulse signal to the host and receives a second pulse signal from the host through a transmission line. The storage device has a first register to store a value of a first parameter and correction circuit to adjust a first duty ratio of the first pulse signal according to the value of the first parameter. The host includes a first calibration processor that measures a plurality of the first duty ratios as output from the storage device for different values of the first parameter to derive a first optimum value based on the measured first duty ratios and transmit the derived first optimum value to the storage device as the value of the first parameter to be stored in the first register.Type: GrantFiled: October 21, 2022Date of Patent: December 17, 2024Assignee: Kioxia CorporationInventor: Masayoshi Sato
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Patent number: 12170608Abstract: Techniques are described for predicting future behavior of links in a network and generating dynamic thresholds for link metrics for use in path selection. In one example, a computing system receives historical values of a link metric for links of a network. The computing system executes a machine learning system which processes the historical values of the link metric to generate: (1) a predicted future value of the link metric for each link; and (2) a threshold for the link metric indicating whether the predicted future value for each link is anomalous. The computing system computes a path based on the predicted future values of the link metric and the threshold for the link metric. The computing system provisions the computed path, thereby enabling a network device to forward network traffic along the computed path.Type: GrantFiled: June 21, 2022Date of Patent: December 17, 2024Assignee: JUNIPER NETWORKS, INC.Inventors: Sanjeev Kumar Mishra, Sabyasachi Mukhopadhyay, Shivaprasad Gali, Hsiuyen Tsai
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Patent number: 12164412Abstract: A computer implemented method includes accessing performance trace data for executed code of multiple services. Symbols corresponding to functions of the executed code are identified. First sequences of functions from the identified symbols are identified and a first performance threshold for each identified first sequence of functions is computed. The method includes receiving an incoming performance trace, detecting second sequences of functions from the incoming performance trace, identifying second sequences equivalent to the first sequences, and comparing performance of the identified second sequences to the first performance threshold for each of the equivalent first sequences to identify second sequences as comprising a performance bottleneck.Type: GrantFiled: November 12, 2021Date of Patent: December 10, 2024Assignee: Microsoft Technology Licensing, LLCInventors: Spandan Garg, Roshanak Zilouchian Moghaddam, Paul Sean Harrington, Chen Wu, Neelakantan Sundaresan
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Patent number: 12158796Abstract: Systems, computer program products, and methods are described herein for dynamic error resolution in an extended reality environment. The present invention identifies user errors in real time based on user selections in an extended reality (XR) environment. In this regard, the present invention focuses on electronic applications (and the electronic work products/electronic data hosted thereon) within an XR environment and uses machine learning processes to identify real time user errors. The invention may then use a second set of machine learning processes to create, in real-time, digital support content which is visible via an XR platform (accessible using a virtual/augmented/mixed reality device). As such, the system may provide specific improvements over prior systems by automatically providing users with custom error resolution support in real time.Type: GrantFiled: July 28, 2022Date of Patent: December 3, 2024Assignee: BANK OF AMERICA CORPORATIONInventor: Naga Vamsi Krishna Akkapeddi
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Patent number: 12153487Abstract: The disclosed computer-implemented method includes receiving, by a first circuit subsystem, a hardware error signal and storing, in response to the hardware error signal, a signal state of the first circuit subsystem in a reset-persistent register. The method also includes sending, by the first circuit subsystem, the hardware error signal to a second circuit subsystem. Various other methods, systems, and computer-readable media are also disclosed.Type: GrantFiled: December 16, 2022Date of Patent: November 26, 2024Assignee: Advanced Micro Devices, Inc.Inventors: Tim Perley, Alexander Nozik, Siddharth K. Shah
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Patent number: 12153483Abstract: Computerized systems and methods are provided to intelligently and dynamically manage a data center comprising at least one server and at least one central manager. The central manager is programmed to access the at least one server on a predetermined schedule to determine whether at least one application is functioning properly by determining a functionality level. Alternatively, the central manager determines whether the at least one server is actively used by determining an activity level for the server. Based on the central manager's determinations, the system dynamically adjusts the power level of the server, resulting in reduced power consumption and a reduction in wasted resources and unnecessary processing power in the management of servers in a data center.Type: GrantFiled: May 15, 2023Date of Patent: November 26, 2024Assignee: Cerner Innovation, Inc.Inventors: Karthikeyan Sukumaran, Sravan Kumar Anumula, Rakesh Reddy Yarragudi, Manipal Reddy Thoomukunta, Deepak Kumar Jain
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Patent number: 12147309Abstract: System for delivering an event journal during a back-up session in a distributed file system is presented. The system includes an event intake module, a load balancer, a plurality of object creation modules, a journal manager, and a journal service module. Each object creation module of the plurality of object creation modules further includes an ingestor and a drainer. A related method is also presented. The system and method provide for reliable and time-ordered delivery of events in the event journal.Type: GrantFiled: December 14, 2020Date of Patent: November 19, 2024Assignee: Druva Inc.Inventors: Pallavi Thakur, Somesh Jain, Milind Vithal Borate, Prahlad Nishal
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Patent number: 12141045Abstract: Techniques for failure prediction of controllers are disclosed. For example, a method comprises collecting data corresponding to operation of a plurality of controllers from one or more devices, and predicting, using one or more machine learning algorithms, at least one of degradation and failure of one or more controllers of the plurality of controllers based, at least in part, on the data corresponding to the operation of the plurality of controllers. Using the one or more machine learning algorithms, one or more corrective actions to prevent the at least one of the degradation and the failure of the one or more controllers are identified. Instructions comprising the one or more corrective actions are generated and transmitted to at least one user device.Type: GrantFiled: November 8, 2022Date of Patent: November 12, 2024Assignee: Dell Products L.P.Inventors: Parminder Singh Sethi, Nithish Kote, Thanuja C
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Patent number: 12124329Abstract: Systems, apparatuses, and methods for transmission failure feedback associated with a memory device are described. A memory device may detect errors in received data and transmit an indication of the error when detected. The memory device may receive data and checksum information for the data from a controller. The memory device may generate a checksum for the received data and may detect transmission errors. The memory device may transmit an indication of detected errors to the controller, and the indication may be transmitted using a line that is different than an error detection code (EDC) line. A low-speed tracking clock signal may also be transmitted by the memory device over a line different than the EDC line. The memory device may transmit a generated checksum to the controller with a time offset applied to the checksum signaled over the EDC line.Type: GrantFiled: June 19, 2023Date of Patent: October 22, 2024Inventors: Peter Mayer, Thomas Hein, Martin Brox, Wolfgang Anton Spirkl, Michael Dieter Richter
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Patent number: 12125028Abstract: In some embodiments, Uniform Resource Locator (URL) parameters may be used to bind access tokens to authorize web-browser-initiated network operations. In some embodiments, a user input at a data exchange gateway associated with a first website to perform a first network operation (e.g., a request to access resources associated with the first website) may be detected. In response to the detected user input, an access token may be generated based on user specific information associated with the user, where the access token is associated with one or more network operation parameters. In response to a use of the access token for authorizing the first network operation and successful authorization of the first network operation, the access token may be configured to be bound to a first URL identifier parameter associated with the first website.Type: GrantFiled: July 26, 2023Date of Patent: October 22, 2024Assignee: Capital One Services, LLCInventors: Varun Gupta, Allison Fenichel, Johanna Davis
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Patent number: 12124323Abstract: Embodiments herein describe integrity check techniques that are efficient and flexible by using local registers in a segment to store check values which can be used to detect errors in the local configuration data in the same segment. In addition to containing local registers storing the check values, each segment can include a mask register indicated which of the configuration registers should be checked and which can be ignored. Further, the segments can include a next segment register indicating the next segment the check engine should evaluate for errors.Type: GrantFiled: August 8, 2022Date of Patent: October 22, 2024Assignee: XILINX, INC.Inventors: Ahmad R. Ansari, David P. Schultz, Felix Burton, Jeffrey Cuppett
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Patent number: 12118495Abstract: In an approach to improve platform modification by dynamically modifying content based on user feedback. Embodiments suggest one or more solutions and recommendations, via a user interface, to one or more users that comply with one or more standards, regulations, and resources of an organization. Further, embodiments verify the solutions and recommendations that comply with the one or more standards, regulations, and resources of the organization, and automatically generate a prototype solution. Additionally, embodiments provide, by the user interface, one or more augmented solutions for the one or more users, wherein augmented solutions are provided to the one or more users requiring a temporary solution; and label and cluster user feedback and associated solutions of the one or more users to provide effective solutions for future users based on a similarity of the feedback of the one or more users.Type: GrantFiled: April 6, 2021Date of Patent: October 15, 2024Assignee: International Business Machines CorporationInventors: Charles Muchiri Wachira, Girmaw Abebe Tadesse, Celia Cintas, Sekou Lionel Remy, Aisha Walcott
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Patent number: 12117898Abstract: The present application provides a three-mode storage method for program blocks based on check, comprising: first dividing the program to be injected into N blocks and checking each block to obtain the first checksum; then injecting the program to be injected and the first checksum twice in the program storage area, and the two injected programs are noted as the main program and the backup program, respectively; dividing the main program into N blocks, and checking each program block to obtain the second checksum during program run; dividing the backup program into N blocks and checking each block to obtain the third checksum; and comparing the checksum, second checksum and third checksum: if the three are consistent, performing no operation; updating the program or checksum and checking again, if the three are inconsistent.Type: GrantFiled: December 20, 2022Date of Patent: October 15, 2024Assignees: INNOVATION ACADEMY FOR MICROSATELLITES OF CAS, SHANGHAI ENGINEERING CENTER FOR MICROSATELLITESInventors: Baojun Lin, Yongshan Dai, Zhichao Chen, Xiaoli Tian, Qianyi Ren, Xinying Lu, Wenbin Gong, Yuan Shen, Zhiyang Yu, Bin Song, Ruiqiang Shao
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Patent number: 12117888Abstract: Novel tools and techniques are provided for implementing intelligent alert automation (“IAA”). In various embodiments, IAA receives alert/event feeds from several different alerting and ticketing systems via input Redis queues, and uses a triage system to determine whether to process the alert/event or disregard it. If so, IAA may create a flow instance, assign a unique instance ID, and place the flow instance in one of a plurality of jobs queues based on alert/event type and/or or source. An abattoir system retrieves a flow instance from one of the jobs queues (in order of the queue's priority), and processes the next node or step in the flow instance. The flow instance is placed back into the jobs queue for subsequent processing by the same or different abattoir system until no additional nodes or steps remain in the flow, at which point the flow instance is considered complete.Type: GrantFiled: October 7, 2022Date of Patent: October 15, 2024Assignee: Level 3 Communications, LLCInventors: Kevin Schneider, Angela A. Rash, Troy G. Pohl, Steven Burrell, Matthew D. Schoenfeldt, Shelli L. Hurd
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Patent number: 12120135Abstract: An automated method for detecting anomalous activity in a private computer network comprises: collecting, over a current time period at an ingesting network device of the computer network, non-routable network packets routed to the ingesting network device from other network devices of the computer network; parsing the current collected network packets into corresponding current network flow records each including a source field and a destination field representing a non-routable network address; and for each distinct source identified in the source fields of the current network flow records: aggregating the current network flow records of that source into a current aggregated flow record; analyzing the current aggregated flow record using an anomaly detection module trained through machine learning on previous aggregated flow records of that source from previous time periods in order to detect anomalous activity in that source; and acting in response to detecting the anomalous activity in that source.Type: GrantFiled: October 12, 2021Date of Patent: October 15, 2024Assignee: Saudi Arabian Oil CompanyInventor: Faisal Talal Wahbo
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Patent number: 12112051Abstract: A valid node management method, a memory storage device and a memory control circuit unit are disclosed. The method includes: establishing a valid node management table corresponding to a first physical management unit; storing valid node management data in the valid node management table, wherein the valid node management data reflects a distribution status of a valid node in the first physical management unit; receiving an operation command from a host system, wherein the operation command is configured to change a data storage status of the first physical management unit; and updating the valid node management data in the valid node management table in response to the operation command.Type: GrantFiled: April 7, 2023Date of Patent: October 8, 2024Assignee: Hefei Core Storage Electronic LimitedInventors: Wei Zhong, Kai-Di Zhu, Zhi Wang, Xiaoyang Zhang
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Patent number: 12111719Abstract: An apparatus and method for supporting communication during error handling in a computing system. A computing system includes a first partition and a second partition, each capable of performing error management based on a respective machine check architecture (MCA). The first partition includes a host processor that executes an exception handler for managing reported errors. A message converter unit of the second partition assists in generating messages based on detected errors in the second partition. The message converter unit receives requests from hardware components of the second partition for handling errors and translates MCA addresses between the first partition and the second partition. To support the message converter unit, during an earlier bootup operation, the second partition communicates the hardware topology of the second partition to the host processor, and the host processor sends address translation information.Type: GrantFiled: June 30, 2022Date of Patent: October 8, 2024Assignee: Advanced Micro Devices, Inc.Inventors: Vilas K. Sridharan, Magiting Talisayon, Srikanth Masanam, Dean A. Liberty
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Patent number: 12112202Abstract: A system and method for evaluating optimization of a hardware engine are described herein. In an example embodiment, a first operation of a desired application is performed using one or more hardware resources each associated with one or more task graphs of a plurality of task graphs. A first result is recorded from a first simulation based on a first task graph of the plurality of task graphs implemented using a first configuration of a first hardware resource associated with the first task graph. A second result is recorded from a second simulation based on a second task graph of the plurality of task graphs implemented using a second configuration of a second hardware resource associated with the second task graph. An interface is generated based on the first result and the second result for rendering by a display device.Type: GrantFiled: May 25, 2020Date of Patent: October 8, 2024Assignee: Synopsys, Inc.Inventors: Amit Garg, Amit Tara, Shripad Deshpande
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Patent number: 12105589Abstract: Methods, systems, and devices for parity-based error management are described. A processing system that performs a computational operation on a set of operands may perform a computational operation, (e.g., the same computational operation) on parity bits for the operands. The processing system may then use the parity bits that result from the computational operation on the parity bits to detect, and discretionarily correct, one or more errors in the output that results from the computational operation on the operands.Type: GrantFiled: February 23, 2022Date of Patent: October 1, 2024Assignee: Micron Technology, Inc.Inventors: Ameen D. Akel, Helena Caminal, Sean S. Eilert
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Patent number: 12107719Abstract: Apparatus and methods for intelligently monitoring multiple bots for failure or predicted failure and notifying a user through a proximate Internet-of-Things (“IoT”) device are provided. A program may receive configuration files for each IoT device and access to monitor each bot. The program may monitor each bot through a resiliency scanner module. The program may generate a report about a failure or predicted failure of a bot. The program may activate a self-healing engine to attempt to heal the bot. The program may activate an event-stream engine. The event-stream engine may determine which IoT device to transmit a report and notify the user through that IoT device to the failure or predicted failure. The user may respond through the IoT device or another device.Type: GrantFiled: October 27, 2022Date of Patent: October 1, 2024Assignee: Bank of America CorporationInventors: Siva Kumar Paini, Sudhakar Balu, Anup Kumar Kedia