Safe Shutdown Patents (Class 714/24)
  • Patent number: 10488906
    Abstract: A power storage adapter may use a method for power delivery based on temperature and other factors. In particular, when electrical power is being supplied to a portable information handling system, a temperature of the power storage adapter may increase. Power storage adapter may reduce the electrical power being supplied to the portable information handling system based on the temperature to prevent the power storage adapter from potentially overheating.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: November 26, 2019
    Assignee: Dell Products L.P.
    Inventors: Andrew Thomas Sultenfuss, Richard Christopher Thompson
  • Patent number: 10289466
    Abstract: A mechanism is provided for improving error data collection in a storage network component. Each time an associated error code generated by a device coupled to the storage network component occurs, each error counter in a set of error counters associated with the error code generated by the device in the storage network component is incremented and the error is legged in an error log area associated with the device in the storage network component. Responsive to one or more clip levels in a set of clip levels being met, a notification associated with the one or more clip levels that are met is triggered thereby causing the error associated with the device to be addressed. The set of clip levels is associated with the error log area and each error counter in the set of error counters associated with the error code generated by the device.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: May 14, 2019
    Assignee: International Business Machines Corporation
    Inventors: Erik Rueger, Christof Schmitt
  • Patent number: 10289400
    Abstract: A system and method for seamlessly and automatically handling outdated resources in a cloud and/or performing a multiple-version upgrade within the cloud with little visibility of interim operations to end users are presented. Mechanisms ensure that outdated resources do not communicate with the rest of the cloud (for example, via distributed data models and Application Programming Interfaces (APIs) before they are upgraded to a target software level. A multiple-version upgrade is implemented in the cloud by a single upgrade operation, by which internal paths for upgrading through various interim versions of software are concealed from end users of the cloud.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: May 14, 2019
    Assignee: Amplidata N.V.
    Inventors: Ruben De Zaeytijd, Carl Rene D'Halluin, Frederik Jacqueline Luc De Schrijver
  • Patent number: 10146610
    Abstract: Systems and methods for agentless remediation and recovery. In an illustrative, non-limiting embodiment, an Information Handling System (IHS) may include a Central Processing Unit (CPU); a Basic Input/Output System (BIOS) coupled to the CPU; a logic controller coupled to the CPU; and a memory coupled to the logic controller, the memory having program instructions stored thereon that, upon execution by the logic controller, cause the IHS to: during a first stage, check an operational state of a plurality of hardware components within the IHS in the absence of any involvement by the CPU or the BIOS; and during a second stage following the first stage, identify a failed hardware component amongst the plurality of hardware components in the absence of any involvement by the CPU or the BIOS.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: December 4, 2018
    Assignee: Dell Products, L.P.
    Inventors: Abeye Teshome, Joseph Kozlowski
  • Patent number: 10120760
    Abstract: The invention relates to a vehicle infotainment system, comprising a system-on-chip with a restart monitoring device. In this arrangement, the restart monitoring device is designed to determine a number of restarts of the system-on-chip and to deactivate the system-on-chip or to switch it in an idle mode when the number of restarts of the system-on-chip exceeds a predetermined threshold value. In this manner, the restart monitoring device can prevent a discharge of the battery of the vehicle by a faulty loop of restarts.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: November 6, 2018
    Assignee: Continental Automotive GmbH
    Inventors: Holger Braun, Wolfgang Weber
  • Patent number: 9804960
    Abstract: A data storage module includes a non-volatile memory and a controller. A method performed in the data storage module includes receiving an overprovision capacity instruction from a host device. The method further includes updating a file system table of the non-volatile memory to indicate, by designating logical addresses in the file system table as being in use, that the logical addresses are used without reducing an amount of free physical space in the non-volatile memory.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: October 31, 2017
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Aki Bleyer, Tal Heller
  • Patent number: 9672920
    Abstract: This disclosure provides a memory device. The memory device includes a plurality of memory cells and a control circuit coupled to the memory cells. The control circuit is configured to provide a first programming voltage to the memory cells; verify the memory cells against an interim level verify voltage to divide the memory cells into a first group of memory cells and a second group of memory cells according to whether the memory cells do not reach or do reach the interim level verify voltage, respectively; provide a second programming voltage to the first group of memory cells and inhibit the second group of memory cells from receiving the second programming voltage, the second programming voltage being greater than or equal to the first programming voltage; and verify the first group of memory cells and the second group of memory cells against a desired level voltage.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: June 6, 2017
    Assignee: Macronix International Co., Ltd.
    Inventors: Chih-Chang Hsieh, Ti Wen Chen, Yungchun Li, Hang Ting Lue
  • Patent number: 9606944
    Abstract: A first memory buffer has a first high speed memory channel and a second high speed memory channel. A second memory buffer is connected to the first memory buffer through a first connection. The second memory buffer has a third high speed memory channel and a fourth high speed memory channel. The first connection connects the first high speed memory channel and the third high speed memory channel. A first memory controller is connected to the first memory buffer through the second high speed memory channel. A second memory controller is connected to the second memory buffer through a second connection. The second connection is connected to the second memory buffer through the fourth high speed memory channel. A first memory module set is connected to the first memory buffer and a second memory module set is connected to the second memory buffer.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: March 28, 2017
    Assignee: International Business Machines Corporation
    Inventors: Edgar R. Cordero, Girisankar Paulraj, Diyanesh B. Chinnakkonda Vidyapoornachary
  • Patent number: 9411700
    Abstract: Disclosed is a storage tester capable of individual control for a plurality of storages, which comprises a host terminal for receiving user's control signal for storage test; a communication interface unit transmitting data among the host terminal, an embedded processor and a data engine unit; a data engine unit for generating pattern data and command data and reading the data from the storage; a sequence control module for controlling respectively a plurality of SATA/SAS/PCIe interface units; and SATA/SAS/PCIe interface unit for connecting to the storage through one among SATA, SAS, PCIe interface according to the signal for interface selection generated from the embedded processor and controlling a plurality of storages according to control of the sequence control module by the embedded processor in order to test respectively connected storage.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: August 9, 2016
    Assignee: UNITEST INC.
    Inventor: Eui Won Lee
  • Patent number: 9317299
    Abstract: A method and a device for cold starting an Android mobile terminal are disclosed. The method includes: the mobile terminal in standby state backs up data needing to be saved to a non-volatile storage device and then is powered off after a power supply of the mobile terminal is turned off in a fast cold starting mode; after the mobile terminal is restarted, the data backed up in the non-volatile storage device is restored to a corresponding physical memory. The advantage of the technical solution is that: by backing up the data needing to be saved, such as used pages, the efficiency of data backup and recovery is improved, and the time for cold starting of the Android mobile terminal is significantly shortened.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: April 19, 2016
    Assignee: ZTE Corporation
    Inventor: Huipeng Zeng
  • Patent number: 9286153
    Abstract: An approach is provided for monitoring the health of a Question/Answer (QA) Computing System. In the approach, performed by an information handling system, a number of static questions are periodically submitted to the QA system, wherein each of the static questions corresponds to a previously established verified answer. Responses are received from the QA system, with the responses including answers corresponding to the submitted static questions. Monitoring the performance of the QA system based on the received responses. When the monitoring detects a problem with the QA system, a user is notified of the detected problem.
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: March 15, 2016
    Assignee: International Business Machines Corporation
    Inventors: Kenneth M. Giffels, Christopher J. Karle, William G. O'Keeffe, Ketan T. Patel, David D. Taieb, Sabrina Yee
  • Patent number: 9282014
    Abstract: A computer system is configured to monitor server stability based on a stability time specification of a server. An embodiment specifies a stability time for the server, wherein the stability time is defined as a time between a starting state of the server and a stability point of the server. The server activity is monitored by an availability manager to determine an availability status of the server. Responsive to the server activity progressing to the stability point within the stability time, an embodiment determines that the server is stable. Responsive to the server activity failing to progress to the stability point within the stability time, an embodiment determines that the server is unreliable.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: March 8, 2016
    Assignee: International Business Machines Corporation
    Inventors: Robert M. Abrams, Nicholas C. Matsakis, Daniel Nieves, Anthony T. Sofia
  • Patent number: 9223664
    Abstract: An energy storage device included in a data center environment can supply energy to a set of solid state drives in the data center environment when power failure or another power event has occurred. In some embodiments, there can be a controller for each solid state drive. The controller can be configured to detect or determine the occurrence of the power failure or other power event and, in response, transmit a command to a respective solid state drive instructing the solid state drive to perform a graceful and atomic shutdown operation, so that data stored on the drive is made durable and the drive enters a quiescent state (e.g., sleep mode, hibernate mode, power-off mode, etc.). As such, the energy storage device can provide protection against power events to solid state drives that lack native (e.g., built-in, inherent, etc.) power protection mechanisms.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: December 29, 2015
    Assignee: Amazon Technologies, Inc.
    Inventors: Christopher Nathan Watson, Adam Douglas Morley, David Edward Bryan, Michael David Marr
  • Patent number: 9209720
    Abstract: A system that includes a first data storage element actuated by a first electric motor. The system also includes a second data storage element actuated by a second electric motor. An electrical connector assembly transfers electrical energy from a back electromotive force generated in the first electric motor, by movement of the first data storage element, to the second electric motor to thereby energize the second electric motor.
    Type: Grant
    Filed: September 24, 2013
    Date of Patent: December 8, 2015
    Assignee: Seagate Technology LLC
    Inventors: Timothy R. Feldman, John W. Shaw
  • Patent number: 9201717
    Abstract: A memory system includes a volatile first storing unit, a nonvolatile second storing unit in which data is managed in a predetermined unit, and a controller that writes data requested by a host apparatus in the second storing unit via the first storing unit and reads out data requested by the host apparatus from the second storing unit to the first storing unit and transfers the data to the host apparatus. The controller includes a management table for managing the number of failure areas in a predetermined unit that occur in the second storing unit and switches, according to the number of failure areas, an operation mode in writing data in the second storing unit from the host apparatus.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: December 1, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junji Yano, Hidenori Matsuzaki, Kosuke Hatsuda
  • Patent number: 9170887
    Abstract: According to one embodiment, when being notified of an interruption of an external electric power supply, a second processor performs a saving operation for storing management information and data stored in a first volatile memory to a first non-volatile memory, and records a progress log, indicating a progress of the saving operation, into a second volatile memory. The first processor periodically checks whether the progress log is recorded in the second volatile memory or not, and when the progress log is recorded in the second volatile memory, the first processor stores the progress log into the second non-volatile memory.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: October 27, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasunori Nakamura, Nobuhiro Ono
  • Patent number: 9158700
    Abstract: A power loss condition is detected that affects volatile data that is cached in preparation for storage in a non-volatile, solid-state memory device. The volatile cached data is stored in an over-provisioned portion of the non-volatile, solid-state memory device in response to the power loss condition.
    Type: Grant
    Filed: January 20, 2012
    Date of Patent: October 13, 2015
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Ryan J. Goss, David S. Seekins
  • Patent number: 9106772
    Abstract: When an error occurs in communication between an access point and an image processing apparatus, it is determined whether a setting of the access point has been changed. When an error occurs in communication between the access point and the image processing apparatus, the error is notified to a user. If it is determined that the setting of the access point has been changed, resetting of a wireless LAN by a user is awaited, and then, connection between the access point and the image processing apparatus is started.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: August 11, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yoshiaki Katahira
  • Patent number: 9081712
    Abstract: A method of storing data includes a storage device controller that receives a storage access operation to store data on at least one non-volatile storage device having a plurality of individually accessible blocks. In response to receiving the storage access operation to store data, the controller initiates a first program cycle to store the data as temporary data within one or more of the blocks. The program cycle has an associated first set of parameters for storage of temporary data. In response to a pre-determined period of time for the storage of temporary data being exceeded or a pre-determined capacity for temporary data has been exceeded, the controller initiates a second program cycle to store the temporary data as persistent data within one or more of the blocks. The second program cycle has an associated second set of parameters for storage of persistent data.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: July 14, 2015
    Assignee: DELL PRODUCTS, L.P.
    Inventor: Gary B. Kotzur
  • Publication number: 20150135011
    Abstract: A system and method provide vital shutdown of a remote slave unit linked by a fiber optic connection to a local, checked redundant master unit with two paired computers. Each computer sends a life signal to an associated local vital supervision card (VSC) and copper to fiber converter (C/F converter) for transmission via fiber to a corresponding fiber to copper converter (F/C converter) on the slave unit, then to a corresponding remote VSC. Each local VSC controls power to a corresponding second local VSC-associated C/F converter, and each remote VSC controls power to a corresponding second remote VSC F/C converter. A VSC detecting an incorrect life signal signature removes power to the corresponding controlled converter and, optionally, to a respective local or remote I/O rack, thereby shutting down the slave unit.
    Type: Application
    Filed: November 12, 2013
    Publication date: May 14, 2015
    Inventors: Cameron FRASER, Abe KANNER, Serge KNIAZEV
  • Publication number: 20150113326
    Abstract: An aggregation module combines a plurality of logical address spaces to form a conglomerated address space. The logical address spaces comprising the conglomerated address space may correspond to different respective storage modules and/or storage devices. An atomic aggregation module coordinates atomic storage operations within the conglomerated address space, and which span multiple storage modules. The aggregation module may identify the storage modules used to implement the atomic storage request, assign a sequence indicator to the atomic storage request, and issue atomic storage requests (sub-requests) to the storage modules. The storage modules may be configured to store a completion tag comprising the sequence indicator upon completing the sub-requests issued thereto. The aggregation module may identify incomplete atomic storage requests based on the completion information stored on the storage modules.
    Type: Application
    Filed: June 6, 2014
    Publication date: April 23, 2015
    Applicant: FUSION-IO, INC.
    Inventors: Nisha Talagala, Dhananjoy Das, Swaminathan Sundararaman, Ashish Batwara, Nick Piggin
  • Patent number: 9015535
    Abstract: An information processing apparatus that executes an operating system, the apparatus including a panic process unit configured to stop the operating system when the operating system has detected an error, a mapping process unit configured to assign, to the operating system stopped by the panic process unit, a second memory area which is other than a first memory area being used by a kernel of the operating system before stop or by a hypervisor that controls the operating system before stop of the operating system, a reactivation process unit configured to reactivate the operating system by using the second memory area as a usage area, and a memory dump process unit configured to read data in the first memory area, and to write the data to a dump file after the operating system is reactivated.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: April 21, 2015
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Kondou, Kenji Okano
  • Publication number: 20150095702
    Abstract: Various techniques for managing a system reset of a computing system to maintain error data are described herein. In one example, a computing system configured for managing a system reset to maintain error data comprises a memory buffer device to receive a transaction from a system processor and to notify the system processor of an error in performing the transaction to volatile memory. In some examples, the system processor is configured to initiate a system reset of the computing system in response to the error, the system reset comprising a reset of the memory buffer device. Furthermore, the computing system includes an integrated circuit to block the reset of the memory buffer device to maintain error data in the volatile memory.
    Type: Application
    Filed: October 1, 2013
    Publication date: April 2, 2015
    Inventor: James Woodward
  • Patent number: 8990630
    Abstract: A server having a plurality of system boards, comprising: a panic processing unit configured to stop (panic) the server; a system board information storage unit configured to store information to identify a system board having a memory used by a kernel; a system board detaching processing unit configured to detach the system board having the memory used by the kernel before server stoppage; and a reboot processing unit configured to reboot the server using system boards other than the separated system board among the plurality of system boards, after detaching the system board having the memory used by the kernel.
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: March 24, 2015
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Kondo, Ryo Tabei, Kenji Gotsubo
  • Patent number: 8954801
    Abstract: Disclosed is a microcomputer such that even when a program cannot be executed in a CPU of the microcomputer due to an external noise, an unstable power-supply voltage, and other causes, and an fatal error such as runaway occurs, returning to the original state is possible within an extremely short time while preferably avoiding initialization of the entire system. During execution of normal software processing, an interrupt signal and a reset signal are output at an arbitrary time, and if it is determined that a CPU of a microcomputer gets into a runaway state, data which has been stored in a RAM as recovery information is read out, and the CPU is recovered to the state before the runaway. Because such recovery from a fatal error occurs within a short time, software which is being executed can continue its processing as if the fatal error had not occurred.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: February 10, 2015
    Assignee: L E Tech Co., Ltd.
    Inventor: Isao Tatsuno
  • Patent number: 8954800
    Abstract: Systems, methods, and machine-readable media for initiating a recovery mode to execute a recovery mode procedure is discussed. The system may include a main processor, an embedded controller, timer circuitry, and recovery circuitry. The recovery circuitry may be configured to receive an indication to execute a recovery mode procedure and, in response to receiving the indication to execute the recovery mode procedure, to trigger a first time period and a second time period. The timer circuitry may be configured to shut off the embedded controller for the first time period, wherein when the first time period expires, the embedded controller is further configured to boot from embedded controller recovery code and shut off the main processor for the second time period, wherein when the second time period expires, the main processor may be configured to boot from main processor recovery code and execute the recovery mode procedure.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: February 10, 2015
    Assignee: Google Inc.
    Inventors: Randall R. Spangler, Christopher Thomas Lyon
  • Patent number: 8954798
    Abstract: Embodiments of the present invention provide backup and restoration functions for a storage device of a PCI-Express (PCI-e) type that support a low-speed data processing speed for a host. Specifically, embodiments of this invention provide backup and restoration functions for one or more (i.e., a set of) semiconductor storage devices (SSDs). In general, the present invention provides an alarm unit and a secondary power supply coupled to a backup controller. The backup controller is coupled to a backup storage device. When a primary power supply is deactivated (e.g., fails), an alarm unit and the secondary power supply is activated. In response to this activation, the backup controller will backup any data stored on any SSDs of the storage system (as well as any data stored in main memory of the storage system or in main memory of any host server connected thereto).
    Type: Grant
    Filed: February 11, 2011
    Date of Patent: February 10, 2015
    Assignee: Taejin Info Tech Co., Ltd.
    Inventor: Byungcheol Cho
  • Patent number: 8947813
    Abstract: Approaches for an emergency power off (EPO) power island, for saving critical data to non-volatile memory in the event of an EPO condition, for use in a hard-disk drive (HDD) storage device. The EPO power island includes a controller for detecting an EPO condition. A voltage regulator supplies power from spindle motor back EMF only to the EPO power island and to the non-volatile memory. Thus, the remainder of the hard drive controller (HDC) is isolated from the EPO power island so that it will not corrupt the data as the HDC's power supply is decaying. Using the power provided by the voltage regulator, the EPO power island transfers critical data from a memory internal to the island to a non-volatile memory external to the island, such as to a flash memory chip.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: February 3, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: Sridhar Chatradhi, Rajesh Koul, Ryan Matthew Schulz, Anthony Edwin Welter
  • Patent number: 8924785
    Abstract: A method includes, in a host that stores data in a storage device, detecting an event that is indicative, statistically and not deterministically, of an imminent power shutdown in the host. A notification is sent to the storage device responsively to the detected event, so as to cause the storage device to initiate preparatory action for the imminent power shutdown.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: December 30, 2014
    Assignee: Apple Inc.
    Inventors: Avraham Poza Meir, Shai Ojalvo, Moshe Neerman
  • Publication number: 20140359356
    Abstract: A storage unit stores information indicating the priority level of each of a plurality of virtual machines. When causing the plurality of virtual machines to perform their shutdown processes in parallel, a control unit selects a first virtual machine from the plurality of virtual machines with reference to the storage unit. In addition, the control unit selects a second virtual machine from virtual machines with lower priority level than the first virtual machine with reference to the storage unit. The control unit then reduces the amount of resources allocated to the selected second virtual machine and increases the amount of resources allocated to the first virtual machine using resources equivalent to the reduced amount of resources.
    Type: Application
    Filed: August 18, 2014
    Publication date: December 4, 2014
    Inventor: Shigeto AOKI
  • Publication number: 20140344620
    Abstract: The present invention relates to the field of computers and communications, and discloses a shutdown method, a startup method, and a communication terminal. The startup method includes: receiving a startup signal, where the startup signal is used to trigger a terminal to perform a startup; supplying power to components of the terminal; starting the terminal according to a first startup mode; and if the startup according to the first startup mode fails, performing a startup according to a second startup mode. The technical solution is applied to help to increase the startup speed when the terminal is powered on and started.
    Type: Application
    Filed: May 20, 2014
    Publication date: November 20, 2014
    Applicant: Huawei Technologies Co., Ltd.
    Inventors: Tao MA, Jingjing YU
  • Patent number: 8819368
    Abstract: A memory subsystem includes a volatile memory, a nonvolatile memory, and a controller including logic to interface the volatile memory to an external system. The volatile memory is addressable for reading and writing by the external system. The memory subsystem includes a power controller with logic to detect when power from the external system to at least one of the volatile and nonvolatile memories and to the controller fails. When external system power fails, backup power is provided to at least one of the volatile and nonvolatile memories and to the controller for long enough to enable the controller to back up data from the volatile memory to the nonvolatile memory.
    Type: Grant
    Filed: May 28, 2012
    Date of Patent: August 26, 2014
    Assignee: AgigA Tech Inc.
    Inventor: Ronald H Sartore
  • Patent number: 8812908
    Abstract: Techniques for providing fast, non-write-cycle-limited persistent memory within secure containers, while maintaining the security of the secure containers, are described herein. The secure containers may reside within respective computing devices (e.g., desktop computers, laptop computers, etc.) and may include both volatile storage (e.g., Random Access Memory (RAM), etc.) and non-volatile storage (NVRAM, etc.). In addition, the secure containers may couple to auxiliary power supplies that are located externally thereto and that power the secure containers at least temporarily in the event of a power failure. These auxiliary power supplies may be implemented as short-term power sources, such as capacitors, batteries, or any other suitable power supplies.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: August 19, 2014
    Assignee: Microsoft Corporation
    Inventors: John R. Douceur, Jacob R. Lorch
  • Patent number: 8812802
    Abstract: A memory subsystem includes a volatile memory, a nonvolatile memory, and a controller including logic to interface the volatile memory to an external system. The volatile memory is addressable for reading and writing by the external system. The memory subsystem includes a power controller with logic to detect when power from the external system to at least one of the volatile and nonvolatile memories and to the controller fails. When external system power fails, backup power is provided to at least one of the volatile and nonvolatile memories and to the controller for long enough to enable the controller to back up data from the volatile memory to the nonvolatile memory.
    Type: Grant
    Filed: May 28, 2012
    Date of Patent: August 19, 2014
    Assignee: AgigA Tech, Inc.
    Inventor: Ronald H Sartore
  • Patent number: 8806279
    Abstract: A booting method and an apparatus thereof for debugging in a portable terminal are provided. The method includes, when a booting event occurs, stacking a boot loader in a preset boot loader region of a Random Access Memory (RAM), and executing, and stacking an Operating System (OS) in a preset OS region of the RAM, wherein the boot loader region and the OS region of the RAM are set such that they do not overlap each other.
    Type: Grant
    Filed: June 14, 2010
    Date of Patent: August 12, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Jun Lee, Soo-Ho Noh, Young-Kyu Seo
  • Publication number: 20140181583
    Abstract: A method for protecting against fan failure in a server uses a storage unit and a plurality of fans in the server. The method includes the following steps. A rotation speed of each of the plurality of fans is detected. A continuous working time period of each fan is timed. The rotation speed reading and the continuous working time period reading of each fan is compared with predefined rotation speed values and predefined continuous working time periods stored in the storage unit. The results of comparisons are made. A countdown is started when any of the results of comparison falls into one of predefined failure conditions for the fans. Unless a renew or other countdown-amending signal is received, the server is counted down to zero and then shut down. A server equipped to be able to carry out the protecting method is also provided.
    Type: Application
    Filed: December 26, 2013
    Publication date: June 26, 2014
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: HSIN-FU WANG, KUAN-HSIANG CHAO
  • Patent number: 8719632
    Abstract: A method and a storage system are provided for implementing indirection tables for persistent media or disk drives with enhanced emergency power outage (EPO) protection for the indirection data, such as shingled perpendicular magnetic recording (SMR) indirection tables. Chaining of indirection data is provided with one block pointing to another block of the indirection data stored to disk or flash memory. An EPO-safe buffer is used to store a metadata entry responsive to completing each host write command. Each metadata entry is added to a metadata block, a pointer is stored in the EPO-safe buffer to a current metadata block and a previous metadata block. For a next EPO-safe buffer update entries are removed for the previous metadata block, keeping the last two metadata pointers and last metadata block.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: May 6, 2014
    Assignee: HGST Netherlands B.V.
    Inventor: David Robison Hall
  • Patent number: 8713367
    Abstract: Embodiments of the present invention provide an apparatus and a method for recording a reboot reason of equipment. Besides a first watchdog provided for triggering a global reset of the equipment, the apparatus provided by the present invention further includes a second watchdog. The second watchdog is used to trigger a logic chip to record a value representing the reboot reason of power-down in a storage array after the equipment is powered on. Thus, reboot reason of the equipment could recorded as power-down reboot.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: April 29, 2014
    Assignee: Hangzhou H3C Technologies Co., Ltd.
    Inventors: Xiaoyong Deng, Yutian Wang
  • Patent number: 8689084
    Abstract: Decoding information using error-correcting codes includes, in one aspect, receiving transmitted information that includes original information coded using an error correction coding technique, and using at least one processor to iteratively decode the transmitted information to correct transmission errors and determine the original information. The iterative decoding includes, in response to becoming trapped in a trapping set, adjusting information used in the iterative decoding and using the adjusted information to break the trapping set and continue the iterative decoding.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: April 1, 2014
    Assignee: Cadence Design Systems, Inc.
    Inventor: Ying Y. Tai
  • Patent number: 8689074
    Abstract: Decoding information using error-correcting codes includes, in one aspect, receiving transmitted information that includes original information coded using an error correction coding technique, and using at least one processor to iteratively decode the transmitted information to correct transmission errors and determine the original information. The iterative decoding includes determining that the iterative decoding has become trapped in a trapping set before a predetermined maximum number of iterations has been performed. Some embodiments allow that, in response to determining the trapping set, an exit can be performed from the iterative decoding before the predetermined maximum number of iterations has been performed.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: April 1, 2014
    Assignee: Cadence Design Systems, Inc.
    Inventor: Ying Y. Tai
  • Patent number: 8677110
    Abstract: A client terminal receives, in response to a boot command issued by a user to boot the client terminal, a first start command to start monitoring. The client terminal acquires first time information, repeatedly at certain time intervals from a basic software, and stores the first time information in a storage area. The client terminal receives a termination command to terminate the basic software. If the termination command is a command to terminate the basic software by using the basic software, the client terminal stores normal termination information in the storage area. When a second start command is received, and no normal termination information is stored in the storage area, the client terminal acquires second time information from the basic software and creates, depending on a result of comparison between the second time information and the first time information, log information relating to a termination of the basic software.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: March 18, 2014
    Assignee: Fujitsu Limited
    Inventors: Kanako Ogasawara, Tadashi Okada
  • Patent number: 8665962
    Abstract: A method of operating a digital television decoder is disclosed. The decoder includes a memory, the memory storing onboard software, and the decoder is operable in a run mode to execute the onboard software. The method comprises: activating a power saving mode on the decoder; and upon activating the power saving mode: maintaining power to the memory; suspending execution of the onboard software; acquiring an execution context of the onboard software; updating the execution context of the onboard software to form an updated execution context; and saving the updated execution context in the memory.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: March 4, 2014
    Assignee: NDS Technologies France
    Inventors: Hassan Taleb, David Ludet, Eric Delaunay, Nicolas Beaunoir, Thierry Furet, Franck Bellanger, Laurent Chauvier, Laurent Proust, Laurent Douat
  • Patent number: 8661130
    Abstract: Server management data describes observed operating condition of a pool of spare servers. Based on a demand forecast of a specific target system, a dynamic allocation period is determined as a period during which the target system needs additional server resources to handle an expected demand. Based on the dynamic allocation period and server management data, a set of allocation candidates are nominated from the spare server pool, by eliminating therefrom spare servers which are likely to fail during the dynamic allocation period. An appropriate allocation candidate is then selected for allocation to the target system, such that the selected candidate will satisfy a specified requirement during its allocation period.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: February 25, 2014
    Assignee: Fujitsu Limited
    Inventors: Masataka Sonoda, Satoshi Tsuchiya, Kunimasa Koike, Atsuji Sekiguchi
  • Patent number: 8650363
    Abstract: A memory subsystem includes a volatile memory, a nonvolatile memory, and a controller including logic to interface the volatile memory to an external system. The volatile memory is addressable for reading and writing by the external system. The memory subsystem includes a power controller with logic to detect when power from the external system to at least one of the volatile and nonvolatile memories and to the controller fails. When external system power fails, backup power is provided to at least one of the volatile and nonvolatile memories and to the controller for long enough to enable the controller to back up data from the volatile memory to the nonvolatile memory.
    Type: Grant
    Filed: May 27, 2012
    Date of Patent: February 11, 2014
    Assignee: AgigA Tech
    Inventor: Ronald H Sartore
  • Patent number: 8635494
    Abstract: Provided is a RAID controlled storage device of a PCI-Express (PCI-e) type, which provides data storage/reading services through a PCI-Express interface. The RAID controller typically includes a disk mount coupled to a set of PCI-Express SSD memory disk units, the set of PCI-Express SSD memory disk units comprising a set of volatile semiconductor memories; a disk monitoring unit coupled to the disk mount for monitoring the set of PCI-Express memory disk units; a disk plug and play controller coupled to the disk monitoring unit and the disk mount for controlling the disk mount; a high speed host interface coupled to the disk monitoring unit and the disk mount for providing high-speed host interface capabilities; a disk controller coupled to the high speed host interface and the disk monitoring unit; and a host interface coupled to the disk controller.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: January 21, 2014
    Assignee: Taejin Info Tech Co., Ltd.
    Inventor: Byungcheol Cho
  • Patent number: 8631300
    Abstract: The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for power governance in a data processing system.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: January 14, 2014
    Assignee: LSI Corporation
    Inventors: Yang Han, Shaohua Yang, Zhi Kai Chen, Lei Wang, Changyou Xu
  • Publication number: 20130346797
    Abstract: In one aspect, a technique for restarting a software system on a computer platform after an unintentional software system shutdown. The technique includes, for instance, generating a core dump file on the computer platform when the software system shuts down unintentionally, restarting the software system, using a library for copying software system related data from the core dump file to the software system, and continuing execution of the software system.
    Type: Application
    Filed: April 30, 2013
    Publication date: December 26, 2013
    Applicant: International Business Machines Corporation
    Inventors: Jakob C. Lang, Angel Nunez Mencias, Albert Schirmer, Jochen Schweflinghaus
  • Patent number: 8615681
    Abstract: Embodiments of the invention are directed to systems and methods for reducing an amount of backup power needed to provide power fail safe preservation of a data redundancy scheme such as RAID that is implemented in solid state storage devices where new write data is accumulated and written along with parity data. Because new write data cannot be guaranteed to arrive in integer multiples of stripe size, a full stripe's worth of new write data may not exist when power is lost. Various embodiments use truncated RAID stripes (fewer storage elements per stripe) to save cached write data when a power failure occurs. This approach allows the system to maintain RAID parity data protection in a power fail cache flush case even though a full stripe of write data may not exist, thereby reducing the amount of backup power needed to maintain parity protection in the event of power loss.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: December 24, 2013
    Assignee: Western Digital Technologies, Inc.
    Inventor: Robert L. Horn
  • Patent number: 8601252
    Abstract: A restart controller for an information handling system includes a first latch and a second latch. An output of the second latch is coupled to an input of the first latch. The restart controller is configured to detect that the information handling system has been shut down responsive to a first disorderly shutdown, and in response to detecting the shut down, to set the first latch, initiate a first startup of the information handling system to enable a remote wake mechanism of a chipset of the information handling system, and determine, at the second latch, that a basic input/output system (BIOS) of the information handling system is operational. In response to determining that the BIOS is operational, The restart controller is further configured to initiate an orderly shutdown of the information handling system, and clear the first latch.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: December 3, 2013
    Assignee: Dell Products, LP
    Inventors: Matthew B. Mendelow, Todd W. Schlottman, Joseph N. Alperin
  • Patent number: 8601316
    Abstract: A power supply system includes a power supply unit, a number of electrical loads and a sequence circuit. The power supply unit provides power for the electrical loads through the sequence circuit. When any one of the electrical loads fails the sequence circuit will record the failure, shut down and lock the power supply unit to prevent the power supply unit from powering the electrical loads.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: December 3, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Kai-Fu Chen, Chia-Yun Lee, Chuang-Wei Tseng