Derived From Analysis (e.g., Of A Specification Or By Stimulation) Patents (Class 714/33)
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Patent number: 9117029Abstract: A device receives code generated via a technical computing environment (TCE), performs a test on the code to generate a test result, and generates test information based on the performance of the test on the code. The device outputs or stores the test result, and receives, based on the test result, a request for a diagnostic analysis of the code. The device performs, based on the request, the test information, and at least one diagnostic, a diagnostic analysis of the code to generate a diagnostic result, and outputs or stores the diagnostic result.Type: GrantFiled: December 5, 2012Date of Patent: August 25, 2015Assignee: The MathWorks, Inc.Inventors: Andrew T. Campbell, David M. Saxe, Gregory V. Aloe, Jeremy B. Nersasian
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Patent number: 9075911Abstract: Systems and methods are provided for analyzing usage patterns. In certain embodiments, a system includes a scenario observer, a scenario associator, and a scenario analyzer. The scenario observer is configured to acquire event data relating to a plurality of events on a system having software and hardware, wherein the plurality of events comprises user input. The scenario associator is configured to associate the event data with a plurality of scenarios. The scenario analyzer configured to analyze the plurality of scenarios to identify usage patterns of the system.Type: GrantFiled: February 9, 2011Date of Patent: July 7, 2015Assignee: General Electric CompanyInventors: Vinoth Kumar Mohan, Bhimesh Kumar Katta
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Patent number: 9070096Abstract: A system for providing a reliable and redundant enterprise management solution includes an appliance disposed at a healthcare facility and a pair device disposed at a remote facility. The appliance includes first processing circuitry, a first virtualization manager and a first synchronizer. The first processing circuitry is configured to enable execution of a plurality of applications. The first virtualization manager is configured to virtualize at least storage components and an execution environment for at least some of the applications. The pair device includes second processing circuitry, a second virtualization manager and a second synchronizer. The second processing circuitry provides redundancy for the first processing circuitry. The second virtualization manager is configured to provide redundancy with respect to the virtualized storage components and execution environment.Type: GrantFiled: August 11, 2009Date of Patent: June 30, 2015Assignee: McKesson Financial HoldingsInventors: Phillip Andrew Wright, Taber West, Jeorg William Erich Houck, Jay Avner Caviness, Peter Clowes, Chaofeng Eric Kao
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Publication number: 20150135015Abstract: A cloud auto-test method used in a cloud auto-test system including a processing module is provided. The cloud auto-test method includes the steps outlined below. A test management virtual machine is constructed by the processing module. An under-test object is read to monitor and update the version of the under-test object. At least one test flow including at least one test item is established and managed. A test operation virtual machine is constructed such that the under-test object having the latest version is loaded to the test operation virtual machine. An auto-test process is performed on the under-test object in the test operation virtual machine according to the test flow. A result of the test process analyzed.Type: ApplicationFiled: December 2, 2013Publication date: May 14, 2015Applicant: INSTITUTE FOR INFORMATION INDUSTRYInventors: Ying-Wen CHANG, Chun-Chia CHANG
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Integrated testing system utilizing a test script and a test environment created based on the script
Patent number: 9032253Abstract: Systems, methods, apparatuses, and computer readable media for testing information technology systems and/or applications are provided. In some examples, data may be categorized as frequently used and stored at an information technology system testing system. One or more portions of the frequently used data may then be identified for use in testing an information technology system. The systems, methods, and the like may further include building a testing environment and receiving a test script. In some examples, one or more data types may be identified for use in testing the information technology system based on various project criteria, the received test script, and the like. In some examples, additional data types and data associated therewith may be identified as associated with the one or more identified data types based on a predefined relationship. This additional data may then be automatically included in the testing of the information technology system.Type: GrantFiled: August 9, 2011Date of Patent: May 12, 2015Assignee: Bank of America CorporationInventors: Daniel McCoy, Lynne Sommer, John McKenzie -
Publication number: 20150127984Abstract: A mechanism is provided for context-aware irritation of a micro-processor. At each executed phase in a set of phases of a test case being executed on a set of micro-processors, a determination is made of a set of characteristics associated with the given executed phase of the test case. Based on the set of determined set of characteristics associated with the given executed phase, a determination is made of an irritation to be executed alongside the given executed phase of the test case. The determined irritation is then executed alongside the given executed phase of the test case.Type: ApplicationFiled: November 1, 2013Publication date: May 7, 2015Applicant: International Business Machines CorporationInventors: Sangram Alapati, Prathiba Kumar, Varun Mallikarjunan, Satish K. Sadasivam
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Publication number: 20150127986Abstract: A test program allows an information technology equipment connected to a tester hardware to control the tester hardware. The tester hardware is configured to be capable of changing at least a part of its functions according to configuration data stored in rewritable nonvolatile memory. The test program is configured as a combination of a control program and a test algorithm module. The test program comprises: a module that acquires the configuration data from the nonvolatile memory of the tester hardware and a module that judges whether or not a storage device holds a test algorithm module that can be used together with the configuration data.Type: ApplicationFiled: January 15, 2015Publication date: May 7, 2015Applicant: ADVANTEST CORPORATIONInventor: Yoshifumi TAHARA
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Publication number: 20150127985Abstract: A detection unit detects access status of an information recording device and forms the detected access status into access records at predetermined time intervals. A generation unit generates history information from the access records that have been formed over a predetermined period. A control unit selects an access record that has a predetermined relationship with the current time, out of the history information. A control unit determines when to start a diagnosis of the information recording device, assuming that the selected access record represents the current access status of the device. Specifically, the control unit instructs a diagnosis unit to start a diagnosis when the selected access record suggests that the diagnosis would not impose an excessive load on the information recording device.Type: ApplicationFiled: December 19, 2014Publication date: May 7, 2015Inventor: Kunihito ONOUE
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Publication number: 20150121140Abstract: An arrangement for testing a control unit via a test environment, having a computer-based test management tool, wherein the test management tool is configured for model-based development and/or management of at least one test plan implemented as a data structure in order to test the control unit, and the test plan has at least one test and a start condition for initiating execution of the test plan; a computer-based test execution control tool, wherein the test execution control tool is configured to initiate execution of the test plan on the test environment when the start condition is met; and a computer-based database, wherein the database is configured to store the test plan implemented as a data structure and is also configured for shared, common access to the test plan by the test management tool and the test execution control tool.Type: ApplicationFiled: October 28, 2014Publication date: April 30, 2015Inventor: Matthias SENF
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Publication number: 20150106654Abstract: Embodiments of the present invention provide a method for monitoring components in a library by tracking the movement of library components. By tracking the movement of library components, the degradation of library components can be monitored and the reliability of library components determined, allowing unreliable components to be bypassed or replaced, enhancing the reliability of the library and preventing data loss.Type: ApplicationFiled: December 17, 2014Publication date: April 16, 2015Inventors: Michael R. Foster, Allen J. Rohner, Patrick S. Tou
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Publication number: 20150089292Abstract: An objective of the present invention is to efficiently perform a platform level test on a computer system comprising virtual machines that are automatically built according to predefined templates. A virtual machine test system according to the present invention creates a virtual machine according to a system template defining a combination of a network topology type of virtual machines and a role of each of the virtual machines, and performs a platform level test according to a test item defined for each of the combination (refer to FIG. 1).Type: ApplicationFiled: September 25, 2013Publication date: March 26, 2015Applicant: Hitachi, Ltd.Inventor: Ryoichi Ueda
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Publication number: 20150089291Abstract: A transmission signal transmitted via a common data signal line, includes a management data region different from a control/monitoring data region including data of control data and monitoring data signals. The slave station acquires input information from an input part corresponding to its own station, acquires control data for reference by an output part of another station in a correspondence relation with the input part from the transmission signal, and obtains a pseudo output change timing equal to a true output change timing of the output part based on the control data. A signal configuring data indicating a first failure state when a time difference between the pseudo output change timing and an input change timing of the input part is smaller than a first threshold value or a second failure state when the time difference is larger than a second threshold value is superimposed on the management data region.Type: ApplicationFiled: November 15, 2011Publication date: March 26, 2015Applicant: ANYWIRE CORPORATIONInventors: Kenji Nishikido, Youichi Hoshi, Shotaro Kusumoto
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Patent number: 8990626Abstract: An apparatus and computer-implemented method for determining relevance of assignments in combinatorial models, the method comprising: receiving an attribute collection, the attribute collection comprising one or more attributes and one or more possible values for each of attributes; receiving pone or more restrictions, each restriction indicating one or more values for one or more attributes; receiving one or more assignments comprising one or more assigned values for one or more of the attributes; and determining whether the assignment is legal, illegal or partially-legal, wherein an illegal assignment is an assignment which violates a constraint by itself; a legal assignment is an assignment which is not illegal, and for every extension thereof which is illegal, a combination of values assigned to other attributes violates a constraint by itself; and a partially-legal assignment is an assignment which is neither legal nor illegal.Type: GrantFiled: December 17, 2012Date of Patent: March 24, 2015Assignee: International Business Machines CorporationInventors: Eitan D Farchi, Itai Segall, Rachel Yosef Tzoref-Brill
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Publication number: 20150082095Abstract: Techniques for automating testing of a first computing system comprises identifying a plurality of system interface elements of a second computing system; determining an untested state at the first computing system of one of the identified plurality of system interface elements; determining the existence of any dependency of the one of the identified plurality of system interface elements upon another of the identified plurality of system interface elements; responsive to a finding of no the dependency, seeking in a repository a system interface element test corresponding to the one of the identified plurality of system interface elements and having an expected output according to a structure of the second computing system; and executing the system interface element test at the first computing system.Type: ApplicationFiled: November 24, 2014Publication date: March 19, 2015Applicant: International Business Machines CorporationInventors: John R. Barker, Ian James McCloy, Daniel Gregory Mounty
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Patent number: 8984342Abstract: Method and system for a test process. The method may include performing tests on one or more units under test (UUTs). At least one test on one or more UUTs may be performed. A signal may be acquired from the UUT. A reference signal may be retrieved. The reference signal may be derived from a transmitted signal characteristic of the UUT. The signal may be analyzed with respect to the reference signal. Results, useable to characterize the one or more UUTs, from performing the at least one test on the one or more UUTs may be stored. The reference signal may be derived from an initial test and may be stored for subsequent retrieval. A respective reference signal may be retrieved for all UUTs of the one or more UUTs for a respective test. The signal may be a radio frequency signal. The UUT may be a wireless mobile device.Type: GrantFiled: August 6, 2012Date of Patent: March 17, 2015Assignee: National Instruments CorporationInventors: Craig E. Rupp, Gerardo Orozco Valdes, I. Zakir Ahmed, Vijaya Yajnanarayana
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Patent number: 8977904Abstract: A method for generating a replayable testing script for iterative use by an automated testing utility may include recording a plurality of scripts, each script relating to a separate iteration of a transaction between a user and a tested application performed by an operator. The method may also include comparing the recorded scripts to identify a location of a data item by finding different values in a pair of corresponding locations in the recorded scripts, indicative of a dynamic data item. The method may further include generating the replayable testing script comprising one of the recorded scripts and having a variable parameter at the identified location of the dynamic data item.Type: GrantFiled: February 17, 2012Date of Patent: March 10, 2015Assignee: Hewlett-Packard Development Company, L.P.Inventors: Moshe Eran Kraus, Lior Manor, Amichai Nitsan, Meidan Zemer
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Patent number: 8972785Abstract: Embodiments of a testcase checker system are disclosed herein. Embodiments of a testcase checker system may include an instruction set simulator configured to simulate execution of instructions of a testcase on a microprocessor using a reference model associated with an architecture of the microprocessor. The instruction set simulator may generate logging data associated with the each instruction based on the simulated execution of that instruction. The testcase checker system may also include checker module comprising a set of rules. Each of these rules may be associated with a boundedly undefined condition. The checker module is configured to receive the logging data associated with an instruction from the instruction set simulator and process the logging data based on the rules to determine if any of the rules are violated.Type: GrantFiled: July 13, 2012Date of Patent: March 3, 2015Assignee: Freescale Semiconductor, Inc.Inventor: Brian C. Kahne
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Publication number: 20150058673Abstract: Testing a test component is disclosed. A real-time input communication that has been forked from an input communication intended for a deployed component is received at the test component. At least a portion of the received real-time input communication is processed. A result of the processing is used to at least in part determine a test result of the test component.Type: ApplicationFiled: September 29, 2014Publication date: February 26, 2015Inventor: Barak Reuven Naveh
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Publication number: 20150058672Abstract: The present disclosure generally relates to the testing of a system that includes software or hardware components. In some embodiments, a testing framework generates a set of test cases for a system under test using a grammar. Each test case may perform an action, such as provide an input to the system under test, and result in an output from the system under test. The inputs and outputs are then compared to the expected results to determine whether the system under test is performing correctly. Prior to generating the set of test cases from the grammar, the testing framework processes the grammar to identify attributes of the test cases to be derived from the grammar and facilitates the modification of the grammar.Type: ApplicationFiled: April 10, 2014Publication date: February 26, 2015Applicant: Wurldtech Security TechnologiesInventors: Nathan John Walter Kube, Daniel Hoffman, Kevin Yoo
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Publication number: 20150052398Abstract: An out-of-band to optical conversion component is provided that uses a transmit disable signal and a receive loss of signal (LOS) signal built into optical small form-factor pluggable transceiver and cable to pass the out-of-band protocol between serial attached. SCSI enclosures. The transmit disable signal, when asserted, turns off the optical output, while the receive LOS signal detects the loss of signal. The out-of-band to optical conversion component sits in line on the serial attached SCSI data traffic and strips off the out-of-band signals from the serial attached SCSI expander so that only data flows over the optical cable. The out-of-band to optical conversion component sends the out-of-band signals to the other enclosure using the transmit disable pin on the small form-factor pluggable transceiver and cable. The other enclosure receives the message on the receive LOS signal and transmit it back onto the serial attached SCSI receive data pair.Type: ApplicationFiled: October 31, 2014Publication date: February 19, 2015Inventors: Brian J. Cagno, John C. Elliott
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Patent number: 8949670Abstract: Translating mind maps to test management utility test cases is described. A computer executes a translator. The translator exports a mind map to a text file, wherein the mind map comprises mind map nodes. The translator populates an integration properties file with an exported text file location. The translator defines mapping, in the integration properties file, between the mind map nodes and a test case for a test management utility. The translator sets the mapping between the mind map nodes and test case details for the test case based on the integration properties file. The translator populates the test case details with the mind map nodes.Type: GrantFiled: September 26, 2012Date of Patent: February 3, 2015Assignee: EMC CorporationInventors: Lakshmi Chandana Vemuri, Arun Dwajan
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Patent number: 8935574Abstract: An apparatus, processor, and method for synchronizing trace data. A processor includes multiple cores, and each core operates at a different local clock frequency. A global clock is distributed to each core, and a timestamp is generated using the global clock and the local clock. The timestamp and a local clock saturation value are included in each trace entry, and the local clock saturation value is equal to the ratio between the local clock and the global clock. The trace entries from separate cores are time-correlated in a post-processing phase based on the timestamp and local clock saturation values.Type: GrantFiled: December 16, 2011Date of Patent: January 13, 2015Assignee: Advanced Micro Devices, Inc.Inventors: Ryan D. Bedwell, Elizabeth M. Cooper, Eric M. Rentschler
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Patent number: 8930758Abstract: An arrangement for providing integrated, model-based testing of industrial systems in the form of a model-based test design module, a test execution engine and an automated test infrastructure (ATI) component. The ATI component includes a keyword processor that interfaces with test commands created by the design module to implement the testing of a specific industrial system. Configuration and deployment information is also automatically created by the design module and used by the ATI component to set up and control the specific industrial system being tested.Type: GrantFiled: January 8, 2013Date of Patent: January 6, 2015Assignee: Siemens AktiengesellschaftInventors: Christof J. Budnik, Roberto Silveira Silva Filho, Stephen P. Masticola
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Patent number: 8930760Abstract: A mechanism is provided for effectively validating cache coherency within a processor. For each node in a set of nodes, responsive to a node in a set of nodes being a controlling node, at least one action is performed on each controlled node mapped to the controlling node. After performing the at least one action on each controlled node mapped to the controlling node or responsive to the node failing to be a controlling node, a self-modifying branch test pattern is executed based on the selected execution pattern in the condition register through the set of nodes. Responsive to the self-modifying branch test pattern ending, values output from the execution unit during execution of the self-modifying branch test pattern are compared to a set of expected results. Responsive to a match of the comparison for the execution patterns in the set of execution patterns, the execution unit is validated.Type: GrantFiled: December 17, 2012Date of Patent: January 6, 2015Assignee: International Business Machines CorporationInventors: Sangram Alapati, Prathiba Kumar, Varun Mallikarjunan, Satish K. Sadasivam
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Patent number: 8930906Abstract: Identify a first change to a first portion of the system, and identifying at least a second portion of the system that is, at least in part, dependent on the first portion. At least one user who is assigned responsibility for maintaining the first portion or the second portion of the system can be identified, and an availability of the user to maintain the first portion or the second portion of the system during a time period can be determined. The time period can begin when the first change is initially scheduled for introduction into the system. Responsive to determining that the user is not sufficiently available to maintain the first portion or the second portion of the system during the time period, the first change can be prevented from being introduced into the system as initially scheduled for introduction into the system.Type: GrantFiled: June 27, 2012Date of Patent: January 6, 2015Assignee: International Business Machines CorporationInventors: Bernadette A. Carter, Al Chakra, Lori D. Landesman
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Patent number: 8930766Abstract: The present disclosure involves systems, software, and computer implemented methods for identifying test cases. One example process includes operations for identifying a mobile application to perform testing upon. A test environment and at least one risk situation associated with the mobile application are identified. For each of the at least one identified risk situations, at least one risk situation-relevant context parameter is identified. A standard operations path is created, as is at least one operations path-variant for each of the at least one identified risk situation-relevant context parameters. The corresponding operations path-variant is analyzed to identify a set of test cases for the context parameter, for each of the at least one identified context parameters.Type: GrantFiled: September 28, 2012Date of Patent: January 6, 2015Assignee: SAP SEInventors: Regina Griesinger, Marcus Behrens, Christoph Mecke
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Patent number: 8930907Abstract: Described is a probabilistic concurrency testing mechanism for testing a concurrent software program that provides a probabilistic guarantee of finding any concurrent software bug at or below a bug depth (that corresponds to a complexity level for finding the bug). A scheduler/algorithm inserts priority lowering points into the code and runs the highest priority thread based upon initially randomly distributed priorities. When that thread reaches a priority lowering point, its priority is lowered to a value associated (e.g., by random distribution) with that priority lowering point, whereby a different thread now has the currently highest priority. That thread is run until its priority is similarly lowered, and so on, whereby all schedules needed to find a concurrency bug are run.Type: GrantFiled: December 1, 2009Date of Patent: January 6, 2015Assignee: Microsoft CorporationInventors: Sebastian Carl Burckhardt, Pravesh Kumar Kothari, Madanlal S. Musuvathi, Santosh Ganapati Nagarakatte
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Patent number: 8924789Abstract: A system and method for providing virtual machine diagnostic information. In accordance with an embodiment, a “flight recorder”, for use with a virtual machine, such as a Java virtual machine (JVM), allows a system administrator, software developer or other user experiencing a system problem to “go back in time” and analyze what happened right before a particular problem occurred in their system, and/or obtain an extremely detailed level of profiling without impacting system performance. The flight recorder does this by being tightly integrated into the core of the JVM itself, and by being very conscious of its performance overhead. This allows the flight recorder to provide a large amount of information on the inner workings of the JVM, and on Java programs running in the JVM.Type: GrantFiled: April 25, 2012Date of Patent: December 30, 2014Assignee: Oracle International CorporationInventors: Staffan Larsen, Henrik Osterdahl, Mikael Vidstedt
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Patent number: 8924788Abstract: A system and method provide for capturing architecture data for software executing on a system, wherein the architecture data can include state data and event data. The captured architecture data may be replayed in a simulator, wherein failure information corresponding to the software is obtained from the simulator.Type: GrantFiled: June 28, 2010Date of Patent: December 30, 2014Assignee: Intel CorporationInventors: Ramesh Devarajan, Jaemon D. Franko
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Patent number: 8914676Abstract: A method, and associated data processing system and computer program product, for generating test cases of different types for testing an application. A functional flow of the application is created based on a system design of the application. Additional test information corresponding to different stages of the functional flow with respect to a test types is generated. The generation of additional test information includes utilizing templates associated with the test types. The test cases are generated based on the additional test information and at least one test case generation rule. The test cases of different types are associated with one another.Type: GrantFiled: January 3, 2012Date of Patent: December 16, 2014Assignee: International Business Machines CorporationInventors: Shu Xia Cao, Xue Feng Gao, De Shuo Kong
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Publication number: 20140359362Abstract: The present invention proposes an information interaction testing device and method based on the associated testing case automatic generation. The associated testing case generation module in said device may automatically generate the associated testing case files corresponding to all associated information interactions which can be triggered by said reference information interaction based on the reference information interaction and the predefined rules determined by the application type provided by the system under test. The information interaction testing device and method based on the associated testing case automatic generation disclosed in the present invention have the higher testing speed and the higher testing usability as well as are low-cost.Type: ApplicationFiled: December 31, 2012Publication date: December 4, 2014Inventors: Zhijun Lu, Lijun Zu, Xingjian Wang, Shuo He, Hua Cai
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Publication number: 20140359361Abstract: A server stores multiple configuration data which respectively provide different functions to a test system. A tester hardware is configured to be capable of changing at least a part of its functions according to the configuration data stored in nonvolatile memory included in the tester hardware. A control program is installed on an information processing apparatus. The control program provides the information processing apparatus with (i) a function of displaying multiple configuration data candidates on a display when the test system is set up, and (ii) a function of writing the configuration data selected by the user to the nonvolatile memory of the tester hardware.Type: ApplicationFiled: June 3, 2014Publication date: December 4, 2014Applicant: ADVANTEST CORPORATIONInventor: Tomoyuki YAMANE
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Patent number: 8898522Abstract: A method of automating testing of a first computing system comprises identifying a plurality of system interface elements of a second computing system; determining an untested state at the first computing system of one of the identified plurality of system interface elements; determining the existence of any dependency of the one of the identified plurality of system interface elements upon another of the identified plurality of system interface elements; responsive to a finding of no the dependency, seeking in a repository a system interface element test corresponding to the one of the identified plurality of system interface elements and having an expected output according to a structure of the second computing system; and executing the system interlace element test at the first computing system.Type: GrantFiled: September 2, 2011Date of Patent: November 25, 2014Assignee: International Business Machines CorporationInventors: John Robert Barker, Ian James McCloy, Daniel Gregory Mounty
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Patent number: 8892949Abstract: A mechanism is provided for effectively validating execution units within a processor. A branch test pattern is generated for execution by an execution unit that is under validation testing. An execution pattern is selected from a set of execution patterns thereby forming a selected execution pattern. The selected execution pattern is loaded into a condition register. The branch test pattern is executed by an execution unit based on the selected execution pattern in the condition register. Responsive to the branch test pattern ending, values output from the execution unit during execution of the branch test pattern are compared to a set of expected results. Responsive to a match of the comparison, the process is repeated for each execution pattern in the set of execution patterns. Responsive to a match of the comparison for the execution patterns in the set of execution patterns, the execution unit is validated.Type: GrantFiled: November 1, 2013Date of Patent: November 18, 2014Assignee: International Business Machines CorporationInventors: Sangram Alapati, Prathiba Kumar, Varun Mallikarjunan, Satish K. Sadasivam
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Patent number: 8892948Abstract: A configuration device for the graphical creation of at least one test sequence for controlling a test device having at least one electronic computer. The test device is controllable according to the created test sequence. The configuration device has at least one display device, graphical library functional elements being displayed with the display device in a library field. The test sequence can be created by placing at least one instance of a library functional element in a configuration field. The instance of a library functional element is placed in the configuration field. The graphical library functional element can be provided with a function placeholder, whereby the function placeholder in the instance of the library functional element can be provided with an instance functionality, whereby the reference of the instance of the library functional element to the library functional element is retained.Type: GrantFiled: June 4, 2012Date of Patent: November 18, 2014Assignee: dSPACE digital signal processing and control engineering GmbHInventors: Ulrich Louis, Erkan Bostanci, Dirk Hartmann, Raimund Sprick, Thomas Jaeger
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Patent number: 8892386Abstract: An apparatus and a computer-implemented method performed by a computerized device, comprising: generating a collection of test data for testing one or more domains, wherein the test data is useful for post-silicon verification of hardware devices; selecting a subset of the collection of test data in accordance with a hardware device to be tested and at least one of the domains to be tested with respect to the hardware device; and indexing the subset of the collection of test data to obtain an indexed collection.Type: GrantFiled: July 10, 2011Date of Patent: November 18, 2014Assignee: International Business Machines CorporationInventors: Allon Adir, Eyal Bin, Shady Copty, Anatoly Koyfman, Shimon Landa, Amir Nahir, Vitali Sokhin, Elena Tsanko
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Patent number: 8880949Abstract: Testing a test component is disclosed. A real-time input communication that has been forked from an input communication intended for a deployed component is received at the test component. At least a portion of the received real-time input communication is processed. A result of the processing is used to at least in part determine a test result of the test component.Type: GrantFiled: September 4, 2012Date of Patent: November 4, 2014Assignee: Facebook, Inc.Inventor: Barak Reuven Naveh
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Publication number: 20140325278Abstract: An approach for interactive automated testing and deployment/field troubleshooting includes extracting one or more field parameters associated with a deployed network resource management environment; determining and/or updating one or more test parameters associated with a test network resource management environment based on the one or more field parameters; inputting the determined and/or updated test parameters within the test network resource management environment to evaluate the one or more test parameters; and modifying a configuration of at least one of the deployed network resource management environment and the test network resource management environment based on the one or more evaluated test parameters.Type: ApplicationFiled: April 25, 2013Publication date: October 30, 2014Applicant: Verizon Patent and Licensing Inc.Inventor: Hassan M. OMAR
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Patent number: 8868978Abstract: Discarded memory devices unfit for an original purpose can be reclaimed for reuse for another purpose. The discarded memory devices are tested and evaluated to determine the level of performance degradation therein. A set of an alternate usage and an information encoding scheme to facilitate a reuse of the tested memory device is identified based on the evaluation of the discarded memory device. A memory chip controller may be configured to facilitate usage of reclaimed memory devices by enabling a plurality of encoding schemes therein. Further, a memory device can be configured to facilitate diagnosis of the functionality, and to facilitate usage as a discarded memory unit. Waste due to discarded memory devices can be thereby reduced.Type: GrantFiled: February 14, 2012Date of Patent: October 21, 2014Assignee: International Business Machines CorporationInventors: Michele M. Franceschini, Ashish Jagmohan, Luis A. Lastras-Montano, Mayank Sharma
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Patent number: 8862940Abstract: Integrated fuzzing techniques are described. A fuzzing system may employ a container configured as a separate component that can host different target pages to implement fuzzing for an application. A hosted target file is loaded as a subcomponent of the container and parsed to recognize functionality of the application invoked by the file. In at least some embodiments, this involves building a document object model (DOM) for a browser page and determining DOM interfaces of a browser to call based on the page DOM. The container then operates to systematically invoke the recognized functionality to cause and detect failures. Additionally, the container may operate to perform iterative fuzzing with multiple test files in an automation mode. Log files may be created to describe the testing and enable both self-contained replaying of failures and coverage analysis for multiple test runs.Type: GrantFiled: February 14, 2012Date of Patent: October 14, 2014Assignee: Microsoft CorporationInventors: Jiong Qiu, Michael Allan Friedman, Charles Patrick Mann, Kwan-Leung Chan, Jeremy Lynn Reed
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Patent number: 8862941Abstract: Disclosed herein are methods, systems, and articles associated with remediation execution. In embodiments, a set of policy test failures may be selected for remediation. The set of policy test failures may be associated with a computer network with a number of nodes. For each failure within the set of policy test failures, a remediation script may be obtained to remediate a corresponding policy test failure. The remediation scripts may be selectively provided to nodes that are affected by policy test failures, for execution by the nodes. A remediation script result for each remediation script executed may be received. Based upon the remediation script results, it may be determined whether or not execution of the remediation scripts was successful.Type: GrantFiled: September 16, 2011Date of Patent: October 14, 2014Assignee: Tripwire, Inc.Inventors: David Whitlock, Guy Gascoigne-Piggford, Geoff Granum, Mark Petrie
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Publication number: 20140298095Abstract: A cardiac signal generator includes a first circuit, a user input device, an output display, and a processing circuit. The first circuit provides, according to any of predetermined plurality of settings, cardiac signals comprising a repeating cardiac waveform, and respiratory signals comprising a repeated respiratory waveform. The output display includes a plurality of indicators, each indicator corresponding to one of the plurality of settings. Each setting includes a combination of a frequency of repetition of the cardiac waveform and a frequency of repetition of the respiratory waveform. The processing circuit causes the first circuit to provide cardiac and respiratory signals according to a selected one of the plurality of settings. The processing circuit is further configured to receive a signal from the user input device, and change the selected setting from a first setting of the plurality of settings to a second setting of the plurality of settings responsive thereto.Type: ApplicationFiled: March 27, 2013Publication date: October 2, 2014Applicant: Medxcel, LLCInventors: Robert Cadick, Dax Hafer
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Publication number: 20140298096Abstract: A cardiac signal generator includes a portable housing, a memory, a processing device, a digital to analog converter, and at least one analog output. The memory stores programming instructions including instructions defining a plurality of mathematical relationships. The processing device is configured to execute said programming instructions to generate a sequence of output values using the plurality of mathematic relationships as a function of time, wherein said sequence of output values defines a sampled waveform output simulating an ECG signal and having linear portions and at least one curved portion. The processing device furthermore provides the sequence of output values at an output. The digital to analog converter is operably coupled to receive the sequence of output values from the output, and generates an electrical signal having a waveform corresponding to the sampled waveform output. The analog output is operably coupled to the digital to analog converter.Type: ApplicationFiled: March 27, 2013Publication date: October 2, 2014Inventors: Robert Cadick, Dax Hafer
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Patent number: 8850266Abstract: A mechanism is provided for effectively validating execution units within a processor. A branch test pattern is generated for execution by an execution unit that is under validation testing. An execution pattern is selected from a set of execution patterns thereby forming a selected execution pattern. The selected execution pattern is loaded into a condition register. The branch test pattern is executed by an execution unit based on the selected execution pattern in the condition register. Responsive to the branch test pattern ending, values output from the execution unit during execution of the branch test pattern are compared to a set of expected results. Responsive to a match of the comparison, the process is repeated for each execution pattern in the set of execution patterns. Responsive to a match of the comparison for the execution patterns in the set of execution patterns, the execution unit is validated.Type: GrantFiled: June 14, 2011Date of Patent: September 30, 2014Assignee: International Business Machines CorporationInventors: Sangram Alapati, Prathiba Kumar, Varun Mallikarjunan, Satish K. Sadasivam
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Patent number: 8850267Abstract: An apparatus having a memory and multiple processors coupled to the memory is disclosed. The memory may be configured to store middleware. One or more processors may be configured to (a) generate initial test vectors to test one or more software modules executed on the processors and (b) generate modified test vectors by translating the initial test vectors in the middleware to a format that matches multiple hardware dependencies of the processors and multiple software dependencies of multiple operating systems. The test vectors generally have another format that is independent of (a) the hardware dependencies of the processors and (b) the software dependencies of the operating systems executed by the processors. The processors may be configured to generate a plurality of test results by exercising the software modules with the modified test vectors.Type: GrantFiled: August 2, 2012Date of Patent: September 30, 2014Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Manish K. Aggarwal, Ravi K. Singh, Anuradha S. Rao
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Publication number: 20140281721Abstract: Systems and methods for automatically generating test scripts are described. The systems and methods may access information from a template that includes at least one entry associated with a test case to be applied to a system under testing, apply a translation scheme to the accessed information, and generate a test script in a language that is associated with the translation scheme and that is based on the information accessed from the template. The systems and methods may then utilize the test script to test the functionality of a system under testing, among other things.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Applicant: SAP AGInventor: Asif Iqbal Navalur
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Publication number: 20140281720Abstract: In an example embodiment, a method of performing a health check on a process integration (PI) component is provided. A PI health check scenario is loaded into the PI component, the PI health check scenario including a reference to a list of checks. The PI health check scenario is then executed using the PI component, causing one or more checks in the list of checks to be performed at a predetermined frequency. The system can then automatically determine if one or more of the one or more checks fail.Type: ApplicationFiled: March 13, 2013Publication date: September 18, 2014Applicant: SAP AGInventors: Vikas Gupta, Aby Jose
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Publication number: 20140258782Abstract: A Recovery Maturity Model (RMM) is used to determine whether a particular Information Technology (IT) production environment can be expected, with some level of confidence, to successfully execute a test for disaster recovery (DR). The RMM provides a quantitative analysis in terms of the extent to which best practices are seen to have been implemented as a set of categories for elements of the environment and multiple elements for each category. A summation of the scoring elements, which may be a weighted summation, results in an overall quantitative metric which is then used to control whether or not testing will proceed.Type: ApplicationFiled: March 11, 2013Publication date: September 11, 2014Applicant: SUNGARD AVAILABILITY SERVICES, LPInventors: Steven Jones, Jose Maldonado
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Patent number: 8832502Abstract: A method includes executing a first post-silicon testing program by a reference model. During the execution of the first post-silicon testing program, one or more test-cases are generated. The first post-silicon testing program is executed in an offline generation mode. During execution of the first post-silicon testing program each test case is generated in a different memory location. After the execution, generating a second post-silicon testing program that is configured to execute the one or more test-cases. The method further includes executing the second post-silicon testing program on an acceleration platform.Type: GrantFiled: July 25, 2012Date of Patent: September 9, 2014Assignee: International Business Machines CorporationInventors: Manoj Dusanapudi, Wisam Kadry, Shakti Kapoor, Dimtry Krestyashyn, Shimon Landa, Amir Nahir, John Schumann, Gil Eliezer Shurek, Vitali Sokhin
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Patent number: 8819491Abstract: Disclosed herein are methods, systems, and articles associated with remediation workflow. A method may include determining one or more test failures related to a policy test within a computer network, and reviewing the one or more test failures. The method may further include, based upon a result of the reviewing, creating a remediation work order that includes at least one of the one or more test failures. Each test failure within the remediation work order may be approved or denied. For each test failure that is approved for remediation, a remediation process may be executed.Type: GrantFiled: September 16, 2011Date of Patent: August 26, 2014Assignee: Tripwire, Inc.Inventors: David Whitlock, Guy Gascoigne-Piggford, Geoff Granum, Mark Petrie