Abstract: An industrial controller includes a control unit, a first optical transmission/reception unit, a second optical transmission/reception unit, and a switching unit. The control unit handles a downlink transmission frame depending on whether or not the Protocol Control Information (PCI) of the downlink transmission frame corresponds to an ID of an industrial controller device, and internally generates and outputs an uplink transmission frame. The first optical transmission/reception unit externally sends or receives the uplink or downlink transmission frame. The second optical transmission/reception unit has at least one port, and externally sends or receives the uplink or downlink transmission frame. The switching unit sequentially transfers the downlink and uplink transmission frames, transfers the uplink transmission frame to the first optical transmission/reception unit, and transfers the downlink transmission frame to the second optical transmission/reception unit.

Abstract: A field programmable gate array (FPGA) includes a soft processor and a soft processor debug unit implemented by programmable logic on the FPGA. The FPGA includes a system on a chip (SOC) that includes a hard processor and a hard processor debug unit. The FPGA includes a bus bridge, coupled to an input output (IO) of the FPGA, operable to transmit data between the IO and the soft processor debug unit and the hard processor debug unit.

Abstract: Problem determination in an enterprise computer system in a distributed environment is provided. Information is obtained regarding the enterprise applications, and high-level information is presented to a user, with one or more prompts provided to the user for more detailed information. In response to a request from a user for more detailed information about the application, more detailed information is provided to the user. Several levels of more detailed information about applications, including information as to individual threads, is available. The method also includes the steps of receiving instructions from an administrator to establish an account for a user, associating one or more servers with the account, and providing access to the corresponding user only to the associated servers. In the method, searches may be conducted for strings and requests, and identified strings and requests may be sorted by a variety of criteria.

Abstract: A system, method and computer program product for avoiding a processing flaw in a computer processor triggered by a predetermined sequence of hardware events. The system may include a detecting unit and a power-on reset unit. The detecting unit detects that the predetermined sequence of hardware events is going to occur at the computer processor. The power-on reset unit initializes the computer processor to a state stored in computer memory in response to detecting the sequence of hardware events.

Abstract: Embedded logic is implemented in a partially reconfigurable programmable logic device (PLD), thus allowing debugging of implemented instantiations of logic after partial reconfiguration. Several instantiations of logic are received at the PLD. One instantiation of logic is implemented in a reconfigurable region of logic within the PLD. The instantiation of logic includes a port that provides a constant interface between the reconfigurable region of logic and a fixed region of logic within the PLD. The port may receive signals from probe points implemented within the reconfigurable region of logic. The port may provide the signals to a signal interface implemented within a fixed region of logic. Furthermore, an embedded logic analyzer may be implemented in either the reconfigurable region of logic or the fixed region of logic. The embedded logic analyzer receives signals from the probe points and provides signal visibility to an external computing system.

Abstract: Common parameters in common between a plurality of request logs are extracted from parameters in the plurality of request logs. The plurality of request logs is obtained when a request is executed by a process that uses a plurality of components. A common parameter different from a common parameter extracted for another process among the extracted common parameters is determined as an identification parameter that identifies the process. This allows accurately categorizing the process based on a log to be obtained when the process is executed.

Abstract: A data dependence analyzer includes: inter-process communication detection means which, on the basis of a processing content of inter-process communication performed for transferring data to be copied between resources, detects the inter-process communication; access detection means which successively detects an access event to the data in the resource due to the process; recording means which, for each of the access events detected by the access detection means, records the access target data in the access event; and analysis means which, among the access target data recorded by the recording means, searches data respectively corresponding to the copy source and the copy destination of the data transferred through the inter-process communication detected by the inter-process communication detection means and imparts a dependence relationship between the searched data.

Abstract: Aspects for monitoring audible tones indicative of operational status of each planar in a multiple planar chassis are described. Included in the aspects is the monitoring of a speaker channel of each planar of a plurality of planars in a common chassis for state changes of beep tones. An operational status of a specific planar emitting the beep tones is identified based on the state changes.

Abstract: In response to a processor core exiting a low-power state, a cache is set to a minimum size so that fewer than all of the cache's entries are available to store data, thus reducing the cache's power consumption. Over time, the size of the cache can be increased to account for heightened processor activity, thus ensuring that processing efficiency is not significantly impacted by a reduced cache size. In some embodiments, the cache size is increased based on a measured processor performance metric, such as an eviction rate of the cache. In some embodiments, the cache size is increased at regular intervals until a maximum size is reached.

Abstract: Systems, methods, and other embodiments associated with reconfiguring applications and monitoring exceptions are described. In one embodiment, a computer implemented method analyzes executable code of an application and identifies an exception handling clause. The method modifies the executable code by reconfiguring the exception handling clause to call a monitoring agent and pass information associated with an exception that occurs during execution of the executable code.

Abstract: A computer-implemented method for sending information to guest systems within virtual machines may include receiving, from a guest system within a virtual machine hosted on a host system, a request for virtual device information about a virtual device which may inaccurately represent to the guest system a state of a physical storage device connected to the host system, gathering physical device information via the host system about the physical storage device connected to the host system, determining a mapping of the virtual device within the guest system to the physical storage device connected to the host system, correlating the physical device information with the mapping to determine accurate information about the virtual device and sending the accurate information about the virtual device from the host system to the guest system within the virtual machine. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: Embodiments of a device and method are disclosed. In an embodiment, a CAN device is disclosed. The CAN device includes a transmit data (TXD) input interface, a TXD output interface, a receive data (RXD) input interface, an RXD output interface and a traffic control system connected between the TXD input and output interfaces and between the RXD input and output interfaces. The traffic control system is configured to detect the presence of classic CAN traffic on the RXD input interface and if the presence of classic CAN traffic is detected on the RXD input interface, emulate an error management protocol of a classic CAN controller in response to signals received on the TXD input interface.

Abstract: An event management resource monitors a processor environment. In response to detecting occurrence of a trigger event in the processor environment, the event management resource initiates a transfer of processor cache data from volatile storage in the processor environment to non-volatile memory. The event management resource can be configured to produce status information associated with the transfer of cache data to a respective non-volatile memory resource. The event management resource stores the status information in a non-volatile storage resource for later retrieval. Accordingly, status information associated with the event causing the transfer is available for analysis on subsequent power up or reboot of a respective computer system.

Abstract: One or more out-of-band input signals (GPIO) are handled and efficiently embedded into a USB capture stream. In order to conserve resources, the state of the input signals can be sent only when a change occurs. The signals are accurately time-stamped, and then presented within the context of the captured USB data. In order to provide maximum visibility, if the digital inputs occur during a normally filtered multi-packet sequence, the filter is canceled and the surrounding packets will also be sent to an analysis computer. Furthermore, because digital inputs may happen during a USB packet, the digital inputs are queued in a FIFO buffer until there is an opportunity to send the digital inputs. Even though the state of the inputs may be sent at a later time, the state of the inputs may be time-stamped when the state of the inputs is perceived by the analyzer.

Abstract: Systems and methods gather data for debugging a circuit-under-test. The system includes a trigger-and-capture circuit, a data compressor, a direct memory access controller, and a memory controller. The trigger-and-capture circuit is coupled to the circuit-under-test for receiving signals from the circuit-under-test. The trigger-and-capture circuit is configured to assert a trigger signal when the signals match a trigger condition. The data compressor is configured to loss-lessly compress the signals into compressed data. The direct memory access controller is configured to generate write and read requests. The write requests write the compressed data to a memory integrated circuit die, and the read requests read the compressed data from the memory integrated circuit die. The memory controller is configured to perform the write and read requests.

Abstract: A system, and in particular a system operating in real-time, may have its operation rely on a particular sequence of trigger signals, hardware or software, for proper operation. A trigger sequence checker provides a way to monitor in real-time predetermined sequences of triggers and is configured to generate an error signal upon detection of a faulty operation or sequence. Rules for sequences of triggers are stored in memory and are used by the trigger sequence checker to verify one or more sequences of triggers received as an input to the checker. A plurality of triggers may be handled by the checker. In one embodiment the checker is configurable to be set in a learning mode to capture triggers rules.

Abstract: Embodiments of the invention relate to a system comprising a processor, a burst detection module executing on the processor, and a resource monitor. The burst detection module is configured to receive a set of resource usages samples measuring an availability of a resource, calculate an absolute moving average (AMA) of the set of resource usage samples, calculate a mean dispersion of the set of resource usage samples, and determine that the set of resource usage samples comprises an aberrant sample by comparing the AMA to the mean dispersion. The resource monitor is configured to execute a recovery procedure in response to the determination that the set of resource usage samples comprise the aberrant sample.

Abstract: Methods, apparatuses, and computer program products for determining whether to send an alert are provided. Embodiments include a voting manager receiving from a plurality of alert analyzers, one or more delivery codes associated with an alert. In dependence upon the one or more delivery codes, the voting manager determines whether to suppress the alert, to close the alert, or to report the alert.

Abstract: A system for generating web analytic reports includes a client interface unit configured to receive one or more predefined tagging conditions from a client for generating a set of tagging rules based on the one or more predefined tagging conditions. The system also includes a tag generation unit configured to generate a client tagged data based on the set of tagging rules. The system also includes an output interface unit configured to generate web analytic reports via analyzing the client tagged data based on the set of tagging rules.

Abstract: A remaining time to replace can be updated taking into account time variation of a failure mechanism of a device. Starting with an initial remaining time to replace, an effective operating time can be determined periodically based on an operating parameter measured at a tracking interval, and remaining time to replace can be updated by subtracting the effective operating time. The technique can be applied to multiple failure mechanisms and to multiple devices and/or components each having multiple failure mechanisms.

Abstract: Disclosed are methods and computer-readable instructions for capturing and reporting information for a failure mode effects analysis. One method includes populating and generating a cause and effect map via a graphical user interface, the cause and effect map having a plurality of events interconnected with one or more propagation lines and of the plurality of events being associated with one or more potential failures of a component or subsystem of a system, performing a failure mode effects analysis (FMEA) on the cause and effect map, graphically depicting the cause and effect map to reflect risk based on the FMEA, and visually distinguishing at least one of the plurality of events.

Abstract: Systems and methods of managing problem determination (PD) data provide for obtaining PD data from a plurality of data sources via an input/output (I/O) interface of a data management device and storing the PD data to a memory of the data management device. In addition, an automated diagnostic analysis of the PD data may be conducted on the data management device. An automated discovery manager may provide the ability to find new sources of PD data and to either reconfigure remote systems to send data to the data management device or to automatically retrieve data from remote systems on a configurable schedule. Dynamically updateable database of symptom information can also be used, wherein the data management device may include a dynamically updateable set of analysis modules with which to conduct analysis on the PD data.

Abstract: Methods, apparatuses, and computer program products for administering checkpoints for incident analysis are provided. Embodiments include a checkpoint manager receiving from each incident analyzer of a plurality of incident analyzers, a checkpoint indicating an incident having the oldest identification number still in analysis by the incident analyzer at the time associated with the checkpoint. The checkpoint manager examines each received checkpoint to identify, as a restore incident, an incident having the oldest identification number indicated in any of the received checkpoints. A monitor sends to the incident analyzers, a stream of incidents beginning with the identified restore incident and continuing with any incidents having a newer identification number than the identified restore incident.

Abstract: Embodiments of the present invention relate to server controlled adaptive back off for overload protection. The server controls a back off period for each request, which indicates a retry time of when a request should be resent to the server. This back off approach relies on the server since the server has much more accurate information available on which to make back off decisions. The server changes the retry time based on how busy it is and its ability to handle the current load and/or its downstream dependent systems. This back off approach increases server stability during a very high load by spreading the load out over a longer time period. The server is able to turn a traffic spike into a constant load, which is easier and more efficient for the server to handle.

Abstract: Aspects of the invention may involve systems, methods, and computer readable medium. In an embodiment, a telecommunications network may contain telecommunications probes capable of generating detailed records describing network events. The telecommunications probes may be coupled to computer processors and/or memory. The memory may store detailed records created by the probes and instructions executable by the processors.

Abstract: A test controller performs a test of a test-target component of a test-target system so as to generate at least one fail event indicating a possible fault in the test-target component. A trouble-shooting and analysis tool probes the test controller and/or hardware of the test-target system to investigate potential causes of the fail event other than a fault of said software component. The trouble-shooting and analysis tool then analyzes fail data including probe data to evaluate potential causes of the fail event.

Abstract: A method and structure for OS event notification, including a central processing unit (CPU) and a memory including instructions for an event notification mechanism for monitoring operating system events in an operating system (OS) being executed by the CPU. The OS includes a kernel having a plurality of kernel subcomponents that provide services to one or more applications executing in the OS in a user mode, using system calls to the kernel. The OS event notification mechanism is capable of monitoring events within the kernel, at a level below the user mode level. The OS event notification mechanism includes Application Program Interfaces (APIs) that are standard for the OS.

Abstract: The present invention extends to methods, systems, and computer program products for monitoring the health of distributed systems. Embodiments of the invention provide distributed, self-maintained, continuous health monitoring. Using XML and pluggable infrastructure, a logical view of an appliance can be provided. The logical view abstracts physical implementation details of the appliance. Monitoring agents can correlate different distributed system failures and events and reason over collected health information.

Abstract: An approach to determine a power-on-hour offset for a memory device that is newly-installed into a computer system is provided, which subtracts a current power-on-hour count of the memory device from a current power-on-hour value of a power supply that supplies operative power to the memory device within the computer system. In response to the computer system powering down, an accumulated power-on-hour for the memory device is determined by subtracting the power-on-hour offset of the memory from a current power-on-hour value of the computer system power supply. The determined power-on-hour offset and accumulated power-on-hour values are saved into one or more designated bytes of a free area of electrically erasable programmable read-only memory of the memory device that are available for data storage by a memory controller, and wherein data stored therein persists after operative power is lost to the memory device, the memory controller or the computer system.

Abstract: Methods and apparatus for memory leak detection using clustering and trend detection are disclosed. Performance metrics are collected from an executing process. A first statistical analysis of at least one metric is used to identify trending and non-trending workload periods for the process. A second statistical analysis on the metrics for the non-trending workload periods is used to determine clusters of metrics corresponding to stable workload levels. A third statistical analysis is performed on each of the clusters to determine whether an upward trend in memory usage occurred. If an upward trend in memory usage is detected, a notification of a potential memory leak is generated.

Abstract: An integrated circuit including a logic analyzer with enhanced analyzing and debugging capabilities and a method therefor. In one embodiment of the present invention, an embedded logic analyzer (ELA) receives a plurality of signals from a plurality of buses within an integrated circuit (IC). The ELA includes an interconnect module to select a trigger signal and/or a sampled signal from the plurality of received signals. A trigger module sets at least one trigger condition and detects if the trigger signal satisfies the at least one trigger condition. When the trigger condition is satisfied, an output module performs at least one task based upon the satisfied at least one trigger condition. If a sampling process is initiated by the output module, the plurality of sampled signals is sampled and may be stored in a memory. The capability of the output module to perform multiple user-defined tasks enhances the debugging capability of the ELA and makes it more versatile.

Abstract: A method and system for tracing in a data processing system. The method includes receiving a plurality of signals associated with an operation during execution of the operation. The method also includes, in response to an indication that the operation is a multiphase operation, during execution of the operation, selection logic, during a first phase of the multiphase operation, selecting and outputting as a trace signal a first signal of the plurality of signals, and during a second phase of the multiphase operation, selecting and outputting as the trace signal a second signal of the plurality of signals.

Abstract: In a data processing system a plurality of signals associated with an operation are received during execution of the operation. In response to an indication that the operation is a multiphase operation, during execution of the operation, selection logic, during a first phase of the multiphase operation, selects and outputs as a trace signal a first signal of the plurality of signals, and during a second phase of the multiphase operation, selects and outputs as the trace signal a second signal of the plurality of signals.

Abstract: An integrated circuit 2 is provided with a data source 6 in the form of a processor executing program instructions connected via a bus interconnect 16 to a trace output device 8. The trace output device 8 is memory mapped. Different memory addresses that are mapped to the trace output device 8 are associated with different priority levels. Trace data written to at least one memory address has a first level of priority in which it is either accepted or the transfer is stalled until the data can be processed by the trace output device 8. Another level of priority associated with a different memory address is such that the data is always accepted but is discarded if the trace output device 8 does not have the ability to process, e.g. store that data at that time.

Abstract: Embodiments of the present disclosure provide methods and systems for generating an alert based upon detection of a pattern of events within a virtual infrastructure. Other embodiments may be described and claimed.

Abstract: A method for disassembling an executable binary (binary). In one implementation, a plurality of potential address references may be identified based on the binary and a plurality of storage addresses containing the binary. A plurality of assembler source code instructions (instructions) may be generated by disassembling the binary. The binary may be disassembled at one or more sequential addresses starting at each of the plurality of potential address references.

Abstract: A mechanism of monitoring activity on a computer which may be applied to measuring the performance of the computer. The computer is configured to track a first set of information relating to at least a first occurrence of at least one scenario on the computer. At least some of the first set of information is evaluated to make a determination about the first occurrence of the scenario. Based on that determination, the computer may be configured to track a second set of information relating to at least a second occurrence of the scenario on the computer, in which the second set of information includes at least some types of information not tracked in the first set of information. The second set of information can then be evaluated.

Abstract: A method and system for detecting abnormal interleavings in a multi-threaded program includes generating an execution log in response to execution of the multi-threaded program. Based on the execution log, a list of allowable immediate interleavings is generated if the execution of the multi-threaded program resulted in no concurrency errors and a list of suspicious immediate interleavings is generated if the execution of the multi-threaded program resulted in one or more concurrency errors. The first and second lists are compared to generate a list of error-causing immediate interleavings. A replayable core is then generated and executed based on the list of error-causing immediate interleavings.

Abstract: Embodiments detect and group multiple failure events to enable batch processing of those failure events, such as in a virtual datacenter executing a plurality of virtual machines (VMs). A long timer, adaptive short timer, and adaptive polling frequency enable a computing device to efficiently detect and group the failure events that may be related (e.g., resulting from one failure). The grouped failure events are processed in parallel thereby reducing the time for recovery from the failure events.

Abstract: Gaps in performance data are corrected for through data transformations and conversion. A raw sequence is transformed by correction logic into an interval sequence by partitioning a performance monitoring period into equal intervals and assigning values based on the raw sequence. Locality sequence entries can indicate whether the interval sequence relies on estimation. The interval sequence is converted into an absence length sequence whose entries indicate null value periods in performance data. Conversion includes generating a presence sequence from the interval sequence, and deriving the absence length sequence from the presence sequence, by using a set-based algorithm or other mechanism. Excessive absence length values support treating intervals as downtime for the machine. Correction logic may include a stored procedure residing in a database, for example, which produces the absence length sequence without using a procedural language.

Abstract: A method and system of monitoring a structure, the method including: a) synchronously acquiring data comprising a plurality of operational parameters and at least one strain data, b) building a significant points dataset from the data acquired in step a), and c) modelling a relationship between the operational parameters and the strain data using the built significant points dataset to train a non-adaptive prediction functional supervised approximation method, wherein the step of building a significant points dataset comprises deletion of redundant information from the acquired data. The resultant models may be used to process structure real operation data in order to estimate the eventual crack initiation and crack growth on a set of predefined locations of the structure.

Abstract: To improve identifying and tracking errors on a computer, an operating system for a computer is programmed to have a framework allowing programmable monitors of events to be defined. These programmable monitors are programmed to detect one or more events or patterns of events, and have associated actions. When the pattern of events occurs, the monitor is triggered, and actions associated with the monitor can be performed. Various actions can be performed, including but not limited to data gathering about the events triggering the monitor, other events occurring during the same time period, and information about the configuration of the computer. Monitors can be dynamically updated remotely during operation of the computer. An operating system can be programmed to have any number of such monitors. Similarly, the actions that occur when a monitor is triggered also can be dynamically updated.

Abstract: A desktop management method and device is disclosed in the present disclosure and the method comprising: acquiring a desktop icon of an operation object desktop to generate a mirror desktop; adjusting the desktop icon of the mirror desktop according to the desktop icon of the operation object desktop to make the desktop icon of the mirror desktop the same as the operation object desktop thereof; and displaying the desktop icon of the adjusted mirror desktop according to the stored mirror desktop arrangement manner. The present disclosure can avoid the loss and disorder of desktop contents.

Abstract: An analysis system includes: analysis engines each executing predetermined analysis; an analysis executing part controlling operation of the analysis engines and causing the analysis engines to execute analysis; and a processing performance control part controlling processing performance of the analysis engines. The processing performance control part is configured by a processing module that is independent of the analysis engines and the analysis executing part and that can be installed into the analysis system, and configured to be invoked by the analysis executing part to detect state information representing a state of a specific one of the analysis engines and execute a previously set process based on the detected state information.

Abstract: An example of the present invention provides a method and system for automatically suppressing false alarms in an IT system, such as an IT application. The method includes consolidating abnormal metrics into a single anomaly. A size of the anomaly relative to the IT application is determined, as well as a distribution of the anomaly in the IT application. A false alarm is determined based on the size and the distribution of the anomaly.

Abstract: Monitoring and diagnosing device including: a classification information storage section; frequency information storage section: a first data classifier section reading out reference classification information from the classification information storage section, comparing operational data, detected by a plurality of sensors and inputted in time sequence, with the reference classification information to classify the operational data, and then generating operational data classification information; a frequency comparator section compiling the operational data classification information, generating operational data frequency information by adding, to the operational data classification information, appearance frequency information for each classification of operational data, reading out reference frequency information from the frequency information storage section, and then generating operational data frequency comparison information by comparing operational data frequency information with the reference frequenc

Abstract: A system for performing runtime analysis on and control of a multithreaded computer program can include a processor configured to initiate executable operations including identifying threads of a computer program to be analyzed. With a supervisor thread, execution of the identified threads can be controlled and execution of the identified threads can be monitored to determine a status of the identified threads. An indicator corresponding to the determined status of the threads can be output.

Abstract: A method of processing threads is provided. The method includes receiving a first thread that accesses a memory resource in a current state, holding the first thread, and releasing the first thread based responsive to a final thread that accesses the memory resource in the current state has been received.

Abstract: A data processing apparatus for generating running performance information indicative of a running state of at least one device, has a data storage process section that obtains device state information indicative of a result of detection of a state of the at least one device, and obtains operational activity performer information indicative of a result of detection of whether an operational activity performer that performs an operational activity to the at least one device or an operational activity with the at least one device is present at a predetermined position for the operational activity performer to do the operational activity on the at least one device or the operational activity with the at least one device, and causes the device state information and the operational activity performer information to be stored in a result-of-detection storage.

Abstract: Systems and methods for building automation system management are shown and described. The systems and methods relate to fault detection via abnormal energy monitoring and detection. The systems and methods also relate to control and fault detection methods for chillers. The systems and methods further relate to graphical user interfaces for use with fault detection features of a building automation system.