Abstract: Provided are a method and apparatus for managing medical data. The method includes sensing an error event of a medical diagnosis device; obtaining image data by capturing images of a user input of the medical diagnosis device with respect to a first period of time associated with a time that the error event is sensed; obtaining log data corresponding to the image data, from a console device for controlling the medical diagnosis device; and transmitting the image data and the log data to an external server.

Abstract: In an embodiment, a peripheral component may include multiple sources of commands, such as command queues and/or macro memories. The commands may be performed in the peripheral component and may result in an error. The peripheral component may include a trace queue into which the commands may be written, independent of the source of the commands. Thus, the trace queue may provide a record of recently performed commands.

Abstract: A method captures diagnostic trace information in a computer system having a plurality of software images. Information is received that is associated with a first failure in a first one of the plurality of software images. The received information is distributed to others of the plurality of software images. Further information is captured that is associated with a second failure in another one of the plurality of software images. The information associated with a first failure in a first one of said plurality of software images is combined with the information associated with a second failure in another of said plurality of software images, and the combined information is analyzed in order to determine a cause of the first failure.

Abstract: A method and system debug a computer program by using trace data, which is a recording of the sequence of machine instructions executed by a program during a time period along with the addresses and values of memory locations accessed and modified by each machine instruction. After the time period, the method and system use the trace data to simulate the execution of the program during the time period under the control of a debugger. In addition, the method and system use the trace data to simulate the execution of the program during the time period backwards in time under the control of the debugger.

Abstract: A computer receives a first trace output, generated during a first execution of a first program, that is annotated with an indication of a first pattern of logged events and one or more second programs that identify additional logged events. The computer identifies the first pattern of logged events in a second trace output, which is generated during a second execution of the first program. The computer executes the one or more second programs to identify one or more additional logged events that are discoverable during the second execution of the first program, wherein the one or more additional logged events are not included in the first trace output. The computer determines that the end first pattern of logged events in the second trace output has been reached. The computer ceases execution of the one or more second programs.

Abstract: A dynamic voltage scaling system based on on-chip monitoring and voltage prediction is disclosed, comprising a main circuit that has integrated on-chip monitoring circuits, a supply voltage scaling module, and voltage converters, wherein, the supply voltage scaling module comprises a sampling and statistics module designed to calculate the error rate of the main circuit in the current time slice, a state recording module designed to record the error rate and the corresponding supply voltage, an error prediction module, and a state transition probability generation module; the error prediction module predicts the error trend of the main circuit in a future time slice according to the state recording module and the state transition probability generation module, and generates regulation signals and sends to the corresponding voltage converters, so as to generate the voltage required for operation of the entire main circuit.

Abstract: A method and system for tracing in a data processing system. The method includes receiving a plurality of signals associated with an operation during execution of the operation. The method also includes, in response to an indication that the operation is a multiphase operation, during execution of the operation, selection logic, during a first phase of the multiphase operation, selecting and outputting as a trace signal a first signal of the plurality of signals, and during a second phase of the multiphase operation, selecting and outputting as the trace signal a second signal of the plurality of signals.

Abstract: Systems, methods, and computer programs for managing trace data in a portable computing device are disclosed. One system includes a system-on-chip and a trace parser. The system-on-chip may have a plurality of trace sources for originating corresponding trace data and a trace system configured to receive and dump the trace data from one of the trace sources to a plurality of trace sinks. The trace parser is configured to reconstruct the trace data dumped to the plurality of trace sinks.

Abstract: A method, system, and/or computer program product log at least one stream of records in a data-processing system. A stream of records is received in succession. Records from the stream of records are logged into a log structure. In response to fulfillment of a pre-defined purging condition: the logging of the records are diverted to a buffer structure; the log structure is purged according to a set of purging criteria in response to the diverting; the records logged in the buffer structure are moved to the log structure in response to a completion of the purging; and the logging to the log structure is restored in response to a completion of the moving.

Abstract: A method, computer program product, and computer system for receiving, by a processor, an initiation indication that a test is initiating on a computing device. A logging process is activated to record to a log one or more log messages generated as a result of the test in response to receiving the initiation indication that the test is initiating. A completion indication is received that the test is complete. The logging process is deactivated to stop recording to the log in response to receiving the completion indication that the test is complete. The one or more log messages are associated with the test in response to receiving the completion indication that the test is complete.

Abstract: Coding issues that create runtime memory leaks, for example in programs coded in a platform-independent programming language such as Java™, can be isolated at the program code line level. An allocation trace that retains, in active memory, a unique object identifier for each of a plurality of objects instantiated during program execution and an address in the active memory where each object is stored can be created. Memory leak candidates can be identified by directly examining contents of the active memory to identify one or more data structures that are increasing in size over time. The allocation trace can be combined with the identified memory leak candidates to generate information about at least one identified leaking object.

Abstract: A method of and system for managing diagnostic information is disclosed. The method and system may include creating a data space in volatile memory. The data space may be configured to collect a selected diagnostic information. The selected diagnostic information may include a first diagnostic information from a first source and a second diagnostic information from a second source. The method and system may include collecting in the data space the selected diagnostic information. The method and system may include releasing from the data space at least a portion of the selected diagnostic information in response to a triggering event.

Abstract: A profiling tool identifies a code region with a false sharing potential. A static analysis tool classifies variables and arrays in the identified code region. A mapping detection library correlates memory access instructions in the identified code region with variables and arrays in the identified code region while a processor is running the identified code region. The mapping detection library identifies one or more instructions at risk, in the identified code region, which are subject to an analysis by a false sharing detection library. A false sharing detection library performs a run-time analysis of the one or more instructions at risk while the processor is re-running the identified code region. The false sharing detection library determines, based on the performed run-time analysis, whether two different portions of the cache memory line are accessed by the generated binary code.

Abstract: An electronic device is provided which comprises a microprocessor for executing a program code and a first hardware code path verifying (CPV) stage coupled to the microprocessor. The hardware CPV stage comprises a first error detection code (EDC) generator configured to continuously determine an error detection code on a continuous sequence of code relating to an actually executed portion of the program code and to compare the actual error detection code with a predetermined error code so as to verify correct execution of the program code and to indicate an error.

Abstract: In a data processing system a plurality of signals associated with an operation are received during execution of the operation. In response to an indication that the operation is a multiphase operation, during execution of the operation, selection logic, during a first phase of the multiphase operation, selects and outputs as a trace signal a first signal of the plurality of signals, and during a second phase of the multiphase operation, selects and outputs as the trace signal a second signal of the plurality of signals.

Abstract: In a method for managing test results of an electronic device, the electronic device includes one or more expansion slots. The method selects a hard disk drive to insert into each expansion slot, executes a read-write test on each expansion slot, and saves test result(s) of the tests on each expansion slot into a file. Before managing the test results, the method sets a file name for each expansion slot for which test results is to be managed, and selects a test item from the read-write test. The method determines test results which expansion slots with are required to be managed and determines a test order of the expansion slots. After the test results are imported, the method amends a file name corresponding to each expansion slot according to the test order, and manages the test results of each expansion slot.

Abstract: An integrated circuit 2 is provided with a data source 6 in the form of a processor executing program instructions connected via a bus interconnect 16 to a trace output device 8. The trace output device 8 is memory mapped. Different memory addresses that are mapped to the trace output device 8 are associated with different priority levels. Trace data written to at least one memory address has a first level of priority in which it is either accepted or the transfer is stalled until the data can be processed by the trace output device 8. Another level of priority associated with a different memory address is such that the data is always accepted but is discarded if the trace output device 8 does not have the ability to process, e.g. store that data at that time.

Abstract: Transactional execution branch indications are placed into one or more transaction diagnostic blocks when a transaction is aborted. Each branch indication specifies whether a branch was taken, as a result of executing a branch instruction within the transaction. As the transaction executes and a branch instruction is encountered, a branch indication is set in a vector indicating whether the branch was taken. Then, if the transaction aborts, the indicators are stored in one or more transaction diagnostic blocks providing a branch history usable in diagnosing the failure.

Abstract: When an abort of a transaction occurs, a determination is made as to whether diagnostic information is to be stored in one or more transaction diagnostic blocks (TDBs). There are different types of transaction diagnostic blocks to accept diagnostic information depending on the type of abort and other considerations. As examples, there are a program-specified TDB in which information is stored if a valid TDB address is provided in a transaction begin instruction; a program interruption TDB, which is stored into when the program is aborted due to an interruption; and a program interception TDB, which is stored into when an abort results in an interception.

Abstract: When an abort of a transaction occurs, a determination is made as to whether diagnostic information is to be stored in one or more transaction diagnostic blocks (TDBs). There are different types of transaction diagnostic blocks to accept diagnostic information depending on the type of abort and other considerations. As examples, there are a program-specified TDB in which information is stored if a valid TDB address is provided in a transaction begin instruction; a program interruption TDB, which is stored into when the program is aborted due to an interruption; and a program interception TDB, which is stored into when an abort results in an interception.

Abstract: Systems and method for embedded trace macrocell (ETM) devices configured to dynamically interleave architecture/program tracing with microarchitecture/hardware tracing. An ETM device includes logic to enable interleaved program tracing and hardware state sampling. A core interface is configured to receive program trace and hardware state information of a microprocessor and a combining module is configured to interleave the program trace and hardware state information. A packet generation module may be configured to packetize the program trace and hardware state information into packets at operational speeds of the microprocessor.

Abstract: In one embodiment, a user interface includes at least one instance of each of at least one widget. Recording a plurality of widget interaction instances (WIIs) for the user interface, each WII resulting from a user interaction applied to a particular instance of a particular widget. Clustering the plurality of WIIs based on a text value and a path value of each WII, such that each cluster of WIIs is associated with a particular widget. Determining, for each of at least one cluster of WIIs, whether the particular widget associated with the cluster of WIIs is erroneous based on whether user interactions corresponding to the WIIs in the cluster have produced responses from a software application that includes the user interface.

Abstract: An information handling system (IHS) troubleshooting system includes a customer IHS including a plurality of components. A customer management system in the customer IHS detects a failure in a managed system and, in response, immediately triggers a device snapshot of the customer IHS. At least one managed system in the customer IHS includes a device snapshot engine that, in response to the customer management system triggering the device snapshot of the customer IHS, immediately create the device snapshot of the customer IHS. A device snapshot storage in the customer IHS stores the device snapshot of the customer IHS. A snapshot communication engine in the customer IHS sends the device snapshot of the customer IHS over the network to a support IHS. The support IHS may load the device snapshot into a virtual IHS and manage the virtual IHS to replicate the failure detected in the managed system for troubleshooting.

Abstract: A trace unit, diagnostic apparatus and data processing apparatus are provided for tracing of conditional instructions. The data processing apparatus generates instruction observed indicators indicating execution of conditional instructions and result output indicators indicating output by the data processing apparatus of results of executing respective conditional instructions. The instruction observed indicators and result output indicators are received by a trace unit that is configured to output conditional instruction trace data items and independently output conditional result trace data items enabling separate trace analysis of conditional instructions and corresponding conditional results by a diagnostic apparatus. The instruction observed indicator is received at the trace unit in a first processing cycle of the data processing apparatus while result output indicator is received at in a second different processing cycle.

Abstract: A tracing system may use an evaluation mechanism to determine which functions to include or exclude during tracing. The architecture may evaluate functions when functions or groups of functions may be loaded for execution, as well as each time a function may be encountered. The evaluation mechanism may use whitelists, blacklists, and various expressions to identify which functions to trace and which functions to exclude. The evaluation mechanism may evaluate an expression that may identify specific conditions under which a function may be traced or not traced. The tracing mechanism may create wrapping functions for each function, including callback functions.

Abstract: In accordance with one aspect of the invention, a system for generating compact function trace data for leaf functions includes a central processing unit (CPU), configured to output program flow information needed for generating a program flow trace, and a trace unit, coupled to the CPU. The trace unit is configured to receive the program flow information from the CPU for generating compact function trace data. The trace unit further comprises a first output mode and a second output mode and is further configured to select either the first output mode or the second output mode for generating compact function trace data.

Abstract: In one embodiment, a method of providing a test framework in an on-demand services environment can include: accessing a plurality of tests via plug-ins to a core platform of the test framework; receiving, by a user interface, a selection of tests for execution from the plurality of tests, where the selected tests are configured to test a plurality of layers of a product; executing, by an execution engine coupled to the core platform, the selected tests; storing test results for the executed selected tests on a configurable repository; and reporting the stored test results in a summarized form on the user interface.

Abstract: A method, system and program product for performing automated tests on a system under test. A set of test blocks is provided, with each test block triggering at least one user activity on the system under test. The following is performed iteratively to execute multiple test blocks consecutively: defining a subset of executable test blocks; scoring the executable test blocks based on at least one scoring parameter; selecting a test block to be executed out of the subset of executable test blocks by randomly selecting a test block based on the scores, where the probability of selection of a test block depends on the score; executing the selected test block; updating the data of the status repository based on data of the system under test; and updating the data of the history log by adding data regarding the executed test block and the results of the test block execution.

Abstract: A method and processor for debugging a target processor. The method comprises: executing code on the target processor to generate trace information for debugging; and during execution of that code, periodically incrementing a value of a counter on the target processor. The execution of the code includes executing a plurality of timestamp instructions on the target processor each to associate a respective timestamp with the trace information. The execution of each timestamp instruction comprises generating the respective timestamp by reading the value of the counter into a software accessible storage location and subsequently resetting the counter.

Abstract: An approach is provided in which a network hardware adapter stores offload information in a shared memory area that is located on a host system. The offload information includes connection information that was offloaded to the network hardware adapter by an application executing on the host system. An operating system (e.g., a network device driver) detects a network adapter error corresponding to the network hardware adapter and, in turn, retrieves the offload information stored in the shared memory area. As such, an analysis application utilizes the retrieved offload information to debug the network adapter error.

Abstract: Analyzing the performance of multi-threaded applications. An analysis and visualization of thread executions is performed on a graphical timeline using samples of thread execution. This allows users to understand when their application threads are executing, what they were executing, the degree of concurrency in thread execution, and the order in which work is performed in their application. The visualizations and analysis also allow users to sample thread execution contexts using a graphical user interface, as well as the generation of execution profile reports that may be filtered for a specific time range of execution and a subset of the threads running in the application.

Abstract: An approach is provided in which a network hardware adapter stores offload information in a shared memory area that is located on a host system. The offload information includes connection information that was offloaded to the network hardware adapter by an application executing on the host system. An operating system (e.g., a network device driver) detects a network adapter error corresponding to the network hardware adapter and, in turn, retrieves the offload information stored in the shared memory area. As such, an analysis application utilizes the retrieved offload information to debug the network adapter error.

Abstract: On demand tracing of application code execution includes: during the execution of the application code, writing trace statements to a circular trace buffer (at a selected and potentially variable detail level); determining whether a pre-defined trigger event has occurred; in response to determining that the trigger event has occurred, outputting one or more trace statements in the circular trace buffer according to pre-defined trace parameters; determining whether a trigger end event has occurred; and in response to determining that the trigger end event has occurred, terminating the outputting of the trace statements. The trigger event and the trigger end event may be defined by names of application code variables, values for the variables, and operators to be used. The trigger end event may further be defined by a time duration for which trace statements are to be outputted, or a number of trace statements to be outputted.

Abstract: An integrated circuit with multiple clock domain tracing capability includes a debug module including a global time stamp counter for counting pulses of a reference clock signal to provide a global time stamp, a first granularity counter for counting pulses of a first clock signal to provide a first granularity count, a second granularity counter for counting pulses of a second clock signal to provide a second granularity count and a trace cache buffer for selectively storing in a first partition the global time stamp, the first granularity count, and first data synchronous to the first clock signal, and for selectively storing in a second partition the global time stamp, the second granularity count, and second data synchronous to the second clock signal.

Abstract: Embodiments relate to building, by a computing device, a pseudo-random dynamic instruction stream that comprises instructions configured to perform a transaction execution, testing, by the computing device, the transaction execution in a uni-processing system based on the instruction stream, and outputting, by the computing device, a status of the test to one or more output devices. A determination may be made that an abort occurs in the transaction execution based on the testing.

Abstract: An arrangement for processing trace data information is provided, the arrangement including, a chip including one or more memory circuits configured to store trace data information relating to a series of instructions, and a trace data information port configured to provide off-chip access to the trace data information; and a direct memory access controller circuit configured to control the transportation of trace data information from the one or more memory circuits to the trace data information port.

Abstract: An information processing apparatus includes an acquiring unit that acquires diagnosis information regarding an operating condition of an image forming apparatus that forms an image, a communication connection unit that establishes a communication connection with the image forming apparatus and a management server via a communication line, a storage controller that stores the diagnosis information acquired by the acquiring unit in a predetermined memory, where the storage controller reduces a data amount of the diagnosis information stored when a communication connection is not established to less than that stored when a communication connection is established, and a transmitting unit that transmits the diagnosis information stored in the memory to the management server if a communication connection is established by the communication connection unit.

Abstract: A computer program product is provided for performing a method including: generating a test instruction stream of a program that includes a plurality of executable instructions; setting controls for a runtime-instrumentation process; simulating execution of the test instruction stream and sampling of the test instruction stream according to the controls, and storing simulated records associated with the sampling in a predicted collection buffer (PCB); accessing a program buffer of a processor, the program buffer storing records associated with sampling the test instruction stream according to the controls during execution of the test instruction stream by the processor; examining individual records in the program buffer to determine whether the individual records are valid and in proper sequence; and comparing the simulated records of the PCB and the records of the program buffer to validate the program buffer.

Abstract: An approach is described for managing error logs and corresponding error descriptors among a plurality of controller nodes of a distributed network fabric. According to such approach, an error log may include output from a runtime code trace. The runtime code trace may include storing trace statements from a currently running process in one or more of a plurality of trace buffers. The trace buffers may be memory-mapped circular buffers. Additionally, an error descriptor may be created from the error log. A globally unique identifier may be assigned to the error descriptor, and both the error descriptor and the globally unique identifier may be broadcast to each other controller node among the plurality of controller nodes.

Abstract: Methods and arrangements for enhancing a ticket relative to user interaction with a system. An information technology ticket related to user interaction with an information technology system is received, and a system trace is activated, wherein additional input related to the user interaction with the information technology system is accepted. Information derived from the trace of the information technology system is associated with the information technology ticket. Other variants and embodiments are broadly contemplated herein.

Abstract: Disclosed are various in various embodiments are systems and methods providing for storage of mass data such as metrics. A plurality of data models are generated in the server from a stream of metrics describing a state of a system. Each of the metrics is associated with one of a plurality of consecutive periods of time, and each data model represents the metrics associated with a corresponding one of the consecutive periods of time. The data models are stored in a data store and each of the metrics is discarded after use in generating at least one of the data models.

Abstract: In the system, an apparatus for collecting trace information provided on a circuit executing a program includes a counter unit which increments a count value for each execution cycle of the program, and a collection unit outputs trace information at a fetching timing of the trace information outputted by the circuit and a count value of the counter unit at the fetching timing. Another apparatus for processing trace information includes a trace information acquisition unit which acquires the trace information added with a count value from a trace information collection apparatus, a sort processing unit which sorts the acquired trace information based on the count value, and a trace information storage unit which store the sorted trace information.

Abstract: A data processing apparatus has processing circuitry for executing program instructions and trace circuitry for generating trace data indicating processing activities of the processing circuitry. The trace circuitry may detect a lockup state of the processing circuitry in which the processing circuitry does not make forward progress of execution of the program instructions. In response to detecting the lockup state, the trace circuitry may include in the trace data a lockup identifier indicating that the lockup state has occurred.

Abstract: A data processing apparatus is provided with trace circuitry for generating a plurality of trace streams including an instruction trace stream 10 and a data trace stream 12. The instruction elements within the instruction trace stream and the data elements within the data trace stream are marked with key values KV such that a match may be made between data elements and corresponding instruction elements. When predetermined conditions are met, synchronisation markers 66 are inserted in both the instruction trace stream 10 and the data trace stream 12 in order to permit a precise correlation to be made between the instruction elements and the data elements when the data is subsequently analysed.

Abstract: A system and a method are disclosed for stack trace clustering. In one example, the method includes receiving a first stack trace and a second stack trace, normalizing, by a processing device, the first and second stack traces, determining a distance between the normalized first and second stack traces, and determining whether the normalized first and second stack traces are equivalent based on the determined distance.

Abstract: A remote management module receives a command from a support server in response to the remote management module initiating a first secure, authenticated connection with the support server, wherein the remote management module is integrated with, and monitors a condition of, a processing system. The remote management module executes the command to generate a result that provides diagnostic data about the processing system. The remote management module reports the result to the support server upon the remote management module initiating a second secure, authenticated connection with the support server.

Abstract: On demand tracing of application code execution includes: during the execution of the application code, writing trace statements to a circular trace buffer (at a selected and potentially variable detail level); determining whether a pre-defined trigger event has occurred; in response to determining that the trigger event has occurred, outputting one or more trace statements in the circular trace buffer according to pre-defined trace parameters; determining whether a trigger end event has occurred; and in response to determining that the trigger end event has occurred, terminating the outputting of the trace statements. The trigger event and the trigger end event may be defined by names of application code variables, values for the variables, and operators to be used. The trigger end event may further be defined by a time duration for which trace statements are to be outputted, or a number of trace statements to be outputted.

Abstract: Detection of heap dump occurrence is facilitated through maintenance of a heap dump location registry. The heap dump location registry indicates tools for which heap dump occurrence is to be detected. Based on periodically referencing the heap dump location registry, it is determined whether heap dump of a tool of the one or more tools has occurred. In one embodiment, startup and shutdown events of the tool are tracked to update execution status and process identifiers in the heap dump location registry, and the periodically references determines based on the indicators whether heap dump has occurred for the tool. In another embodiment, a heap dump location for heap dumps of the tool is obtained from the registry and the heap dump location is checked for the presence of heap dump files, which presence indicates occurrence of a heap dump for the tool.

Abstract: This disclosure pertains to a method in a network node, a method in user equipment, a network node and user equipment in a wireless communications network. More particularly, there is provided methods and platforms for network based control of report messages comprising logged measurements in a wireless communications network. In accordance with some example embodiments, a UE (30) that has stored logged data i.e. logged measurements that are bigger than a single transmission packet, i.e. report message, segments the logged measurements and sends only a portion of the logged measurements that fits into a single report message. The UE (30) also indicates to a network node (28) that additional logged measurements exist at the UE buffer (44).

Abstract: An example system includes a bus, a logic device, a controller, and a non-volatile memory. The bus is configured to propagate data including at least system console output data. The logic device is configured to monitor the data on the bus and to store the system console output data in a buffer. The controller is configured to detect a system error, and, in response to the system error, to acquire at least a portion of the system console output data from the buffer. The non-volatile memory is configured to store the portion of the system console output data acquired by the controller.