Abstract: Systems and methods are disclosed herein to a computer-implemented method of executing an enterprise application comprising: receiving, by a computer, an external request for a service provided by a runtime engine of the enterprise application; selecting, by a computer, a script from a plurality of scripts saved on a database based on the external request; referencing, by the computer, one or more tags stored in a tag library saved on the database that are called by the script, wherein the tags in the tag library define commands of the plurality of scripts and call one or more granular services of the enterprise application; loading, by a computer, the selected script and the tags referenced by the selected script; and executing, by a computer, instructions of the script to provide the service requested by the external request, wherein the selected script is updated in the database after executing instructions of the script.

Abstract: A trace circuit 8 is configured to generate a stream of trace data elements indicative of processing operations performed by a processing circuit 4. The trace circuit 8 has a plurality of reference address registers 30-1 configured to store corresponding reference addresses. When the processing circuit 4 performs a processing operation associated with an associated memory address, the trace circuit 8 selects one of the reference address registers 30-1 as a selected reference address register, and generates a trace data element indicating: (i) which of the reference address registers 30-1 is the selected reference address register, and (ii) a difference, if any, between the associated memory address and the reference address of the selected reference address register. A diagnostic apparatus 20 for analyzing the trace stream has a similar set of reference address registers 30-2 which are used to reconstruct the associated memory address from the generated trace data element.

Abstract: Multiple processor systems are provided. A first processor is configured to monitor the state of at least one other processor by comparing received signals. When the first processor determines that another processor needs to be reset, the first processor provides a reset signal to a reset pin of the processor that needs to be reset. The first processor may reset itself after providing the reset signal.

Abstract: A system and method for capturing screen events, and processing these events to form data in a data format which is susceptible to analysis. Preferably, the method also comprises analyzing the data in order to extract useful information about the user of the screen and computational device which generated these screen events. More preferably, the method of the present invention is able to assess the quality of the performance of the user whose interaction with the computational device caused the screen events to be generated.

Abstract: The invention is a method and system for providing trace data in a pipelined data processor. Aspects of the invention including providing a trace pipeline in parallel to the execution pipeline, providing trace information on whether conditional instructions are complete or not, providing trace information on the interrupt status of the processor, replacing instructions in the processor with functionally equivalent instructions that also produce trace information and modifying the scheduling of instructions in the processor based on the occupancy of the trace output buffer.

Abstract: Systems and Methods for detection and localization of performance faults in data centers are described. In one embodiment, a method comprises identifying a performance fault in a data center upon detection of the performance fault at any of a plurality of monitors in the data center, wherein the plurality of monitors are placed at monitor nodes, amongst a plurality of nodes, in the data center. Further, the method comprises evaluating a fault vector for the data center upon identification of the performance fault, wherein the fault vector is evaluated based on a fault indicator corresponding to each of the plurality of monitors. Based on the comparison of the fault vector with signatures of each of the plurality of nodes, one or ore faulty nodes, amongst the plurality of nodes in the data center, are determined as likely root cause of the performance fault.

Abstract: The disclosure relates to methods and systems for trace solutions in a computer processing system. More specifically, the disclosure relates to methods and systems for a multi-tier trace architecture. A method for separating raw trace data includes receiving raw trace data from one of more CPUs and/or busses in the system, separating the raw trace data into high bandwidth trace information (HBTI) and low bandwidth trace information (LBTI), recording the HBTI on an on-chip trace buffer until a specific event is triggered, and providing in parallel the LBTI over an off-chip trace interface. In one embodiment, the raw trace data are provided to a separate HBTI trace unit and a separate LBTI respectively. The HBTI trace unit processes the HBTI and generates a HBTI message, and the LBTI trace unit processes the LBTI and generates a LBTI message.

Abstract: A system and method for efficiently and easily capturing data dumps generated by a network device is disclosed. In one embodiment, a storage management device is disposed between a network device and a storage device. The network device is programmed with a virtual address that is associated with the storage management device. Upon generating a data dump, the network device writes the data dump to the virtual address where the storage management device receives the data dump and redirects it to a long-term storage location. Additionally, the storage management device can generate a record of each data dump that indicates the network device that generated the data dump and where the data dump was stored.

Abstract: A trace unit for generating items of trace data indicative of processing activities of a processor executing a stream of instructions, The unit includes trace circuitry for monitoring a behavior of the processor; storage circuitry for storing current trace control data for controlling the trace circuitry; a data store for storing at least some of the trace control data; the trace circuitry being configured to store the trace control data in the data store in response to detection of execution of the group of instructions; wherein the trace circuitry is responsive to detecting the at least one processor cancelling at least one group of the speculatively executed instructions to retrieve at least some of the trace control data stored in the data store for the group of instructions executed before the cancelled speculatively executed instructions and to store the retrieved trace control data in the storage circuitry.

Abstract: A system and method for optimizing redundant output verification, are provided. A hardware-based store fingerprint buffer receives multiple instances of output from multiple instances of computation. The store fingerprint buffer generates a signature from the content included in the multiple instances of output. When a barrier is reached, the store fingerprint buffer uses the signature to verify the content is error-free.

Abstract: When a determination is made that a signal transmitted by a voltage sensor, a second voltage sensor, a current sensor, a temperature sensor, a second temperature sensor, a first CPU, a second CPU and a communication circuit is in error, a third CPU of a motor generator ECU determines that the control system is in error. When a determination is made that the control system is in error, the third CPU determines whether each of the voltage sensors, the current sensor, the temperature sensors, the first CPU, the second CPU and the communication circuit is in error or not.

Abstract: Data relating to execution flows at a computer system is aggregated across multiple execution flows by categorizing each execution flow into an execution flow shape. The execution flows may represent sequences of software components that are invoked or other computer system resources that are consumed. The execution flow shapes are developed by observing and recording the execution flows at the computer system and applying lossy compression rules. Execution flows are categorized into an execution flow shape which is a closest match. The execution flow data may be aggregated by an agent at the computer system, and communicated to a manager for subsequent use. The aggregation combines the information from all execution flows into a small enough data set that can be reported without consuming unduly large processing overhead while still preserving as many of the interesting aspects of the execution flows as possible.

Abstract: A computer-readable medium stores computer-executable instructions. The medium may hold: one or more instructions for executing a first code block; one or more instructions for generating an exception object based on the executing of the first code block; one or more instructions for receiving the exception object at a second code block; and one or more instructions for storing the exception object in a memory.

Abstract: A method and system for collecting data for diagnosing a failure of a computer hardware device. After an indication of the failure of the computer hardware device that results in a full system crash is received, an address translation table of a central processing unit (CPU) of the computer hardware device is collected. A format of call stack frames of an operating system (OS) image of the computer hardware device is retrieved. Based on the collected address translation table and the retrieved format of the plurality of call stack frames, the call stack frames are retrieved and output to a computer file.

Abstract: Arrangements described herein relate to performing diagnostic tracing of an executing application. A trace entry in trace data can be identified, the trace entry comprising a pointer that refers to a memory address. Whether a value that is, or has been, stored at the memory address is an erroneous value can be determined. Responsive to determining that the value that is, or has been, stored at the memory address is an erroneous value, the pointer can be indicated as being a suspicious value.

Abstract: Salvaging event trace information in power loss interruption (PLI) scenarios, for use in solid-state drive (SSD) and hard disk drive (HDD) storage devices. If volatile state information that is salvaged after an inadvertent power loss were to include event trace information, then such information can provide a valuable debug resource. Event trace information from volatile memory is copied to a second memory upon a power on which is in response to a PLI event. A corrupt state of context reconstruction data stored on non-volatile memory is detected, and an indication of the corrupt state is set. The event trace information is passed to the host if requested based on the indication.

Abstract: Arrangements described herein relate to performing diagnostic tracing of an executing application. A trace entry in trace data can be identified, the trace entry comprising a pointer that refers to a memory address. Whether a value that is, or has been, stored at the memory address is an erroneous value can be determined. Responsive to determining that the value that is, or has been, stored at the memory address is an erroneous value, the pointer can be indicated as being a suspicious value.

Abstract: In general, techniques are described for providing thread-level tracing within an operating system kernel. A computing device comprising processes, an operating system and a control unit that executes the operating system may implement the techniques. Each of the processes comprises an instance of an application program. Each of the processes comprises one or more separate threads of instruction execution. The operating system concurrently executes the processes. The control unit traces execution of a system call issued to the operating system by one of the threads currently being executed by the control unit to generate a trace log that traces execution of the system call by the operating system without tracing execution of any other ones of the one or more threads corresponding to those of the plurality of processes that are also being executed by the operating system during execution of the system call.

Abstract: An apparatus includes a processor for executing instructions at runtime and instructions for dynamically compiling the set of instructions executing at runtime. A memory device stores the instructions to be executed and the dynamic compiling instructions. A memory device serves as a trace buffer used to store traces during formation during the dynamic compiling. The dynamic compiling instructions includes a next-executing-cycle (N-E-C) trace selection process for forming traces for the instructions executing at runtime. The N-E-C trace selection process continues through an existing trace-head when forming traces without terminating a recording of a current trace if an existing trace-head is encountered.

Abstract: A system for tracing instruction pointers and data accesses in a plurality of processor cores includes a plurality of trace units. The plurality of trace units include at least one first trace unit configured to perform an instruction pointer trace and at least one second trace unit configured to perform a data trace. The system includes a multiplexer coupled between the plurality of processor cores and the plurality of trace units. The multiplexer is configured to selectively connect one trace unit of the plurality of trace units to one processor core of the plurality of processor cores. The multiplexer is configured during run time based on one of hardware triggers and software.

Abstract: One embodiment includes receiving a data signal transmitted to the processing unit, analyzing the data signal and generating feedback information related to the data signal, and capturing the data signal via a write enable during a plurality of clock cycles specified by a programmable controller included within the processing unit. One advantage of the disclosed technique is that the programmable controller can be used to set the capture window for one or more hardwired triggers included within the processing unit. Further, the programmable controller is able to set up additional triggers that separate and apart from the hardwired triggers included within the processing unit and set the capture window for those triggers. Thus, the disclosed technique provides a highly flexible and adaptive approach for capturing and storing on-chip data and feedback information that can be analyzed later when performing diagnostic and debugging operations.

Abstract: The invention provides a data storage topology that includes a master logging node where the event logs for all of the nodes may be stored on a consolidated basis. The master logging node is configured with a sufficient amount of reserved or additional data storage to accommodate the event logging requirement for the entire data storage topology. The other expanders in the topology may remain at a baseline model. The master logging medium may be an inexpensive persistent storage, such as a flash chip or USB key. The master logging expander may pull the event logs and other information from the remote expanders or, alternatively, the remote expanders may push their event logs and other information to the master logging node. In particular embodiments, the pull or push configuration may be implemented through preexisting SAS protocols.

Abstract: An automotive electronics system includes an electronic control unit and a trace adapter. The electronic control unit is configured to receive measurement signals and provide control signals. Additionally, the electronic control unit is configured to generate or provide trace signals by replacing original instructions in a binary image with trace instructions. The trace instructions are functionally equivalent, but trigger providing the trace signals. The trace adapter is coupled to the electronic control unit. The trace adapter is configured to obtain the trace signals from the electronic control unit.

Abstract: In a computing device testing method, a virtual network terminal and a first communication interface are created in a computing device. A second communication interface is created in a control computer. The first communication interface and the second communication interface is binded to each other. A communication connection between the control computer and the computing device is established. Input and output information of a test program of the computing device is directed to the virtual network terminal. In response to a control command, the computing device executes the test program in the virtual network terminal. The control computer receives input information from an input device of the control computer, sends the input information to the test program. The computing device sends output information generated by the test program to the control computer. The output information is displayed on a display device of the control computer.

Abstract: An embodiment of the invention provides a memory on a semiconductor device that has a plurality of memory areas where each memory area has a plurality of consecutive bits. Further, the semiconductor device includes a tag memory having a plurality of trace tags, each trace tag including at least one bit. Each memory area of the memory is mapped to a trace tag that indicates whether the respective memory area is selected for tracing or not. Each memory area and the assigned trace tag are read out and address of the memory area is forwarded to a trace module when an assigned trace tag indicates that the memory area is selected for tracing. When the assigned trace tag indicates that the memory area is not selected for tracing, data and address is discarded.

Abstract: An embodiment provides a level of assurance regarding correct operation of software. An embodiment creates baseline and real-time measurements of software and compares the measurements to determine whether the software is operating correctly. An application provider may include “tracing elements” in target software application. While producing the application the trace elements are detected and provide trace events, which collectively provide a “baseline trace” indicating proper application execution. The provider supplies the application and the baseline trace to a user. The user operates the application in real-time to produce a “real-time trace” based on the application still having trace elements that produce trace events (which collectively form the “real-time” trace). A comparator compares the baseline and real-time traces. If the traces are within a pre-determined range of each other the user has a level of assurance the software is operating correctly. Other embodiments are included herein.

Abstract: A debugging method for a computer system is disclosed, which includes defining a debug reference data area in a storage device for a BIOS and a control device, periodically transmitting a reply request including an identification information to the BIOS, transmitting reply information corresponding to the identification information according to the reply request, checking the reply information and storing an execution log data into the debug reference data area when the identification information does not conform to the original identification information, determining whether the computer system is in normal operation, and performing a debugging process according to the execution log data when the computer system is in abnormal operation.

Abstract: A method for saving crash dump files of a virtual machine (VM) on a designated disk is disclosed. The method includes associating, by a hypervisor that virtualizes a plurality of virtual machines (VMs), each VM of the plurality of VMs with a crash dump disk that is solely dedicated to the VM, wherein each crash dump disk is located separate from its associated VM. The method further includes configuring, by the hypervisor, an OS of each VM with a crash file path to the crash dump disk associated with the VM, and configuring, by the hypervisor, each VM of the plurality of VMs to generate crash dump files for the VM upon a crash event of the VM and store, via the crash file path, the generated crash dump files to the crash dump disk associated with the VM.

Abstract: Apparatus and methods may include a multimedia test engine operable to exercise and test multimedia application programming interfaces (APIs) of a wireless device based upon execution of a test configuration comprising a test script downloadable to the wireless device. The test engine is resident in memory on the wireless device and is operable to collect multimedia test data and, in some aspects, wireless device performance data, based upon the test configuration and forward the collected data to another device operable to analyze the collected data and generate a multimedia API test report viewable by an authorized user.

Abstract: A method for priority buffering of trace data in a computing system includes receiving instances of trace data by a priority assignment module, the trace data being generated by events that occur during execution of computer software in the computing system; assigning a priority to each instance of trace data, wherein the priority is assigned based on the event that generated the instance of trace data; and inserting the instances of trace data into a plurality of priority buffers based on their respective assigned priorities.

Abstract: A method, apparatus and computer program for recording the core data of a computer process, the computer process comprising trace points and core data is provided for each such trace point. A first set of core data comprising an image of a memory for the computer process is stored in response to a first set of trace data being produced for the computer process for a first trace point. A second set of core data is stored in response to a second set of trace data being produced for the computer process for a second trace, where the second set of core data comprises a record of any change in current memory contents for the computer process with respect to the first set of core data.

Abstract: Embodiments of the present invention relate to an auxiliary method, apparatus, and system for diagnosing a failure of a virtual machine. An operation and maintenance system receives a failure message when a virtual machine fails; obtains running information of the virtual machine according to identifier information carried in the message, where the running information is used for diagnosing the failure of the virtual machine; generates graphic multi-dimensional display information of the virtual machine according to the running information; and sends the display information to a user end for displaying. The present invention provides an auxiliary method for diagnosing a failure of a virtual machine. The method may provide correlation analysis for diagnosing a failure of a virtual machine, allow the user end to diagnose the cause of the failure of the virtual machine in a comprehensive multi-dimensional manner, and improve the convenience and accuracy of diagnosing the virtual machine.

Abstract: Methods and systems may track the invocation path of a system or a library call from Java native interface (JNI) in Java applications. A native call of interest having an associated failure condition, an invocation path associated with the native call of interest, and a Java boundary crossover method (Java method invoking a JNI method) within the invocation path may all identified based on failure diagnostic information. The identified information may also be fed to a Java virtual machine (JVM). When the application is re-run, a check can be made prior to execution of the JNI method, as to whether the Java boundary crossover method is being executed. If so, then the execution stack may be compared to the invocation path of interest.

Abstract: A system, apparatus, and method for writing trace data to storage. Trace data is captured from one or more processors, and then the trace data is written to a trace buffer. The trace data includes program counters of instructions executed by the processors and other debug data. A direct memory access (DMA) controller in a non-real-time block of the system reads trace data from the trace buffer and then writes the trace data to memory via a non-real-time port of a memory controller.

Abstract: A data processing apparatus is provided with trace circuitry for generating a plurality of trace streams including an instruction trace stream 10 and a data trace stream 12. The instruction elements within the instruction trace stream and the data elements within the data trace stream are marked with key values KV such that a match may be made between data elements and corresponding instruction elements. When predetermined conditions are met, synchronization markers 66 are inserted in both the instruction trace stream 10 and the data trace stream 12 in order to permit a precise correlation to be made between the instruction elements and the data elements when the data is subsequently analyzed.

Abstract: A trace unit is provided which is configured to generate items of trace data indicative of processing activities, of a data processing unit. The trace unit comprises a trace indexing unit configured to associate an index value with at least a subset of the items of trace data generated by the trace unit. The trace indexing unit is configured to generate each index value as one of a predetermined sequence of index values, wherein an n+1th index value in the predetermined sequence can be determined from only an nth index value in the predetermined sequence.

Abstract: An apparatus and methods for hardware-based performance monitoring of a computer system are presented. The apparatus includes: processing units; a memory; a connector device connecting the processing units and the memory; probes inserted the processing units, and the probes generating probe signals when selected processing events are detected; and a thread trace device connected to the connector device. The thread trace device includes an event interface to receive probe signals, and an event memory controller to send probe event messages to the memory, where probe event messages are based on probe signals. The probe event messages transferred to memory can be subsequently analyzed using a software program to determine, for example, thread-to-thread interactions.

Abstract: A logic circuit comprises a plurality of functional logic units each having an independent clock signal and a trace bus for carrying trace data.

Abstract: A trace unit, diagnostic apparatus and data processing apparatus are provided for tracing of conditional instructions. The data processing apparatus generates instruction observed indicators indicating execution of conditional instructions and result output indicators indicating output by the data processing apparatus of results of executing respective conditional instructions. The instruction observed indicators and result output indicators are received by a trace unit that is configured to output conditional instruction trace data items and independently output conditional result trace data items enabling separate trace analysis of conditional instructions and corresponding conditional results by a diagnostic apparatus. The instruction observed indicator is received at the trace unit in a first processing cycle of the data processing apparatus whilst result output indicator is received at in a second different processing cycle.

Abstract: A unified debug system with multiple user-configurable trace volumes is disclosed, including embodiments as a system, a method, and a computer-readable medium. Embodiments of the present invention provide more robust and flexible solutions for introducing configurable trace volumes to firmware, allowing a user to specify firmware system configurations for trace buffers, trace frames, and trace volumes, and offer other advantages over the prior art. One embodiment of the present invention pertains to a system that includes a firmware component comprising firmware, and a firmware interface communicatively connected to the firmware component. The firmware includes a plurality of trace volumes for storing a plurality of trace entries. The trace volumes are user-configurable through the firmware interface. The plurality of trace volumes includes first, second and third trace volumes. The first trace volume includes storing at least some of the trace entries to a trace buffer in a first volatile memory component.

Abstract: A shell debug application avoids loss of debug log data for configured commands during the operation of an operating system. A shell debug application executes a command shell script, by a computer, to control an amount of code path debug data captured in memory buffers and saved. The shell debug application obtains, by the computer, a configuration file that includes at least one command. The shell debug application runs the command shell script in the configuration file in response to detection of at least one script associated with the at least one command in the configuration file.

Abstract: A method and system for tracing in a data processing system. The method includes receiving a plurality of signals associated with an operation during execution of the operation. The method also includes, in response to an indication that the operation is a multiphase operation, during execution of the operation, selection logic, during a first phase of the multiphase operation, selecting and outputting as a trace signal a first signal of the plurality of signals, and during a second phase of the multiphase operation, selecting and outputting as the trace signal a second signal of the plurality of signals.

Abstract: A method of correlating the timing of multiple interleaved trace data streams. A Time Stamp Trace stream logic monitors the event trace stream for a synchronization point. When a synchronization point is detected a time stamp value is inserted into the trace stream along with any relevant identification markers available in the detected synchronization point.

Abstract: A method and system are provided for providing a service address space for diagnostics collection. The method includes: providing a service co-processor attached to a main processor, wherein the service co-processor maintains an independent copy of the main processor's address space in the form of a service address space; and updating the service address space by receiving storage update packets from the main processor and applying the storage update packets to the service address space.

Abstract: Disclosed are various embodiments for replication of machine instances in a computing environment. A clone machine instance is instantiated from a machine image associated with an original machine instance. A stored execution state of the original machine instance is applied to the clone machine instance. At least a portion of a series of stored events received by the original machine instance is applied to the clone machine instance.

Abstract: Disclosed is a data transition tracing apparatus capable of solving the problem on tracing an error for debugging. The apparatus includes an execution unit that sequentially executes sets of information processing (IP), each of which receives a plurality of chunks which are sets of data records and outputs output chunks associated with the input chunk, onto the respective input chunks and chunk division unit that, with respect to each of the second and later sets of the IP individually, rearranges the output chunk outputted by the set of the IP located at a preceding stage (PS) into the input chunk to be inputted to the set of the IP in question located at a succeeding stage of the PS and stores chain information, which shares any of the data records and associates the input chunk with the output chunk outputted by the set of the IP located at the PS.

Abstract: A medical device for diagnosis or treatment of tissue is disclosed. The device includes an electronically-controlled tool configured for diagnosis or treatment, an electrical connector, and a computer readable memory. The electrical connector is configured for connection with an electronic control unit and configured to receive control signals, including signals concerning the operation of the tool, from the electronic control unit. The computer readable memory is accessible through the connector. The memory can include a set of programming instructions for control of the tool, and the programming instructions can be configured to be downloadable from the memory upon connection of the electrical connector with the electronic control unit. A system is also disclosed in which the electronic control unit is configured to transmit a data log from memory in the electronic control unit to the memory in the medical device upon the occurrence or detection of a predetermined event.

Abstract: A CPU (1) of an information processing apparatus (8) executes software stored in a DRAM (7). A watchdog timer (2) monitors the operation of the software. A hardware monitoring device (4) monitors the state of hardware provided in the information processing apparatus (8). Results of the monitoring are managed by a management LSI chip (3). A non-volatile memory (6) is where failure information is saved. If no watchdog toggles are received for a given period of time, the watchdog timer (2) notifies the CPU (1) with an NMI signal and starts the second round of time counting. The CPU (1) collects failure information from the management LSI (3). The CPU (1) is rebooted through cold reset when failure information collection is completed, and through hot reset when failure information collection is incomplete. In the case of hot reset, the CPU (1) collects failure information after rebooted.

Abstract: A data processing apparatus is provided comprising prediction circuitry for predicting a response of the data processing circuitry at at least one given execution point to execution of a program instruction; tracing circuitry for tracing operation of the data processing apparatus for outputting a prediction indicator indicating whether or not the predicted response is correct; a data store configured to store information relating to the predicted response of said data processing circuitry at the given execution point for use by at least one of said prediction logic and said tracing circuitry a later execution point; and a history buffer configured to store historical information with regard to one or more entries of the data store at a corresponding execution point previous to the given execution point to enable restoration of said data store to a state corresponding to said previous execution point.

Abstract: When a software component is starting (305), such as but not limited to a task or a subtask, the component pushes (310) its identification (ID) onto a stack. The component then executes (315) its other instructions. If the component completes its instructions so that it can terminate normally (320), then it pops (325) the stack, which removes its ID from the stack. If the component fails, such as by not being able to complete its instructions, then it will not be able to pop the stack so its ID will remain in the stack. Another software process can then read the IDs in the stack to identify (330) which components have failed and can automatically take a specified action (335), such as by sending an email message to, sending a text message to, or calling by telephone, a person or persons responsible for that software component.