Substitution Of Previous Valid Data Patents (Class 714/747)
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Patent number: 12184938Abstract: Systems, methods, apparatuses are described for monitoring events in a plurality of different services. A system may monitor manifest files for one or more content items. Manifest files may contain manifest file tags indicating events. Events may be detected, and a switch from one content item to another content item, based on customized user priority preferences, may be caused.Type: GrantFiled: June 6, 2023Date of Patent: December 31, 2024Assignee: Comcast Cable Communications, LLCInventors: Mike Burke, Bryan Pauk
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Patent number: 12047199Abstract: A network distributor has a plurality of input-output ports, a processor unit, and a memory unit. The ports connect network subscribers via a data line network, where the network subscribers include protocol subscribers to process telegrams as protocol telegrams. The processor unit receives telegrams via one port and outputs telegrams via another port, which is stored in a routing table in the memory unit. The processor unit further determines whether a telegram is a protocol telegram received via a port for which no port identifier is stored in the memory unit, and to discard the telegram if so. Checking and discarding of telegrams can be subject to a precondition, where fulfillment of the precondition leads to an exception from discarding the telegram.Type: GrantFiled: October 21, 2021Date of Patent: July 23, 2024Assignee: Beckhoff Automation GmbHInventors: Holger Büttner, Dirk Janssen, Erik Vonnahme, Thomas Rettig, Hans Beckhoff, Thorsten Bunte, Johannes Beckhoff
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Patent number: 11989089Abstract: A memory controller includes: a map data storage for storing map data; and a read operation controller for receiving, from a host, a read request and a target logical address corresponding to the read request, acquiring a first physical address mapped to the target logical address, based on the map data, and obtaining data stored at the first physical address. When an uncorrectable error is present in the data stored at the first physical address, the read operation controller acquires a second physical address previously mapped to the target logical address before the first physical address, obtains data stored at the second physical address, and provides the host with the data stored at the second physical address and information representing occurrence of the uncorrectable error.Type: GrantFiled: April 13, 2022Date of Patent: May 21, 2024Assignee: SK hynix Inc.Inventor: Sung Jin Park
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Hybrid memory management of non-volatile memory (NVM) devices for use with recurrent neural networks
Patent number: 11893244Abstract: Recurrent Neural Networks (RNNs) wherein a non-volatile memory (NVM) array provides a memory bank for the RNN. The RNN may include a Neural Turning Machine (NTM) and the memory bank may be an NTM matrix stored in the NVM array. In some examples, a data storage device (DSD) that controls the NVM array includes both a data storage controller and a separate NTM controller. The separate NTM controller accesses the NTM matrix of the NVM array directly while bypassing flash translation layer (FTL) components of the data storage controller. Additionally, various majority wins error detection and correction procedures are described, as well as various disparity count-based procedures.Type: GrantFiled: October 12, 2021Date of Patent: February 6, 2024Assignee: Western Digital Technologies, Inc.Inventors: Daniel Joseph Linnen, Ariel Navon, Alexander Bazarsky, Ofir Pele -
Patent number: 11770211Abstract: The technologies described herein are generally directed to changing error mitigation protocols used for a connection based on the quality of a network connection in a fifth generation (5G) network or other next generation networks. For example, a method described herein can include determining, by network equipment comprising a processor, that a quality of a connection between a user equipment and a network access point is below a connection quality threshold, with the connection employing a communications protocol using a first error mitigation process, and where the network access point enables respective access to services enabled via a communication network. The method can further include, based on the quality and the first error mitigation process, enabling, by the network equipment, a second error mitigation process of the communications protocol of the connection, the second error mitigation process being different than the first error mitigation process.Type: GrantFiled: September 14, 2021Date of Patent: September 26, 2023Assignees: AT&T INTELLECTUAL PROPERTY I, L.P., AT&T Technical Services Company, Inc.Inventors: Daniel Vivanco, David Ross Beppler, Slawomir Stawiarski
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Patent number: 11579973Abstract: The present disclosure relates to methods and systems for implementing redundancy in memory controllers. The disclosed systems and methods utilize a row of memory blocks, such that each memory block in the row is associated with an independent media unit. Failures of the media units are not correlated, and therefore, a failure in one unit does not affect the data stored in the other units. Parity information associated with the data stored in the memory blocks is stored in a separate memory block. If the data in a single memory block has been corrupted, the data stored in the remaining memory blocks and the parity information is used to retrieve the corrupted data.Type: GrantFiled: August 31, 2021Date of Patent: February 14, 2023Assignee: Western Digital Technologies, Inc.Inventors: Ashish Singhai, Ashwin Narasimha, Kenneth Alan Okin
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Patent number: 11539571Abstract: IQ impairments compensation in sub-terahertz (sub-THz) communication is disclosed. According to some aspects, a user equipment (UE) determines an estimated in-phase (I) and quadrature phase (Q) impairment of the UE, the IQ impairment of the UE comprising a mismatch of phase and/or amplitude, between an I path and a Q path within an analog receiver circuitry of the UE, and reports the estimated IQ impairment of the UE to a base station (BS). The BS determines a pre-compensation to compensate for the estimated IQ impairment of the UE and uses the determined pre-compensation when transmitting to the UE.Type: GrantFiled: July 12, 2021Date of Patent: December 27, 2022Assignee: QUALCOMM IncorporatedInventors: David Yunusov, Shay Landis, Idan Michael Horn
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Patent number: 11438467Abstract: When a character required to be corrected is specified in a character string of a character recognition result, a plurality of candidate character strings are generated by using a substitution candidate for the specified character and not using a substitution candidate for a character other than the specified character, and one correct character string is finalized from the plurality of generated candidate character strings.Type: GrantFiled: September 23, 2020Date of Patent: September 6, 2022Assignee: CANON KABUSHIKI KAISHAInventor: Shoji Tanaka
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Patent number: 11146667Abstract: This disclosure describes techniques for a network interface controller (NIC) to communicate over a network according to a specified transmission communication protocol. The NIC receives, from a host processor, an indication of a data unit and an indication of a header template. The NIC generates, independent of the specified transmission communication protocol, metadata for transmitting a segment of the data unit over a network. The NIC generates, at last partly using the metadata, header fields that comply with the specified transmission communication protocol. The NIC processes the header template and the header fields to generate a packet header, and the NIC transmits, over the network, a packet including the packet header and the segment of the data unit.Type: GrantFiled: November 15, 2019Date of Patent: October 12, 2021Assignee: Cisco Technology, Inc.Inventors: Reese Faucette, David Walker
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Patent number: 10938416Abstract: A memory device including a parity check circuit and a mask circuit may be provided. The parity check circuit may perform parity check on data sampled according to a data strobe signal, which does not include a post-amble. The mask circuit may generate a parity error signal based on results of the parity check, and output the parity error signal during a time period determined according to a burst length of the data.Type: GrantFiled: January 30, 2019Date of Patent: March 2, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Hye-Seung Yu, Sukyong Kang, Wonjoo Yun, Hyunui Lee, Jae-Hun Jung
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Patent number: 10803099Abstract: In embodiments of the disclosed technology, indexes, such as inverted indexes, are updated only as necessary to guarantee answer precision within predefined thresholds which are determined with little cost in comparison to the updates of the indexes themselves. With the present technology, a batch of daily updates can be processed in a matter of minutes, rather than a few hours for rebuilding an index, and a query may be answered with assurances that the results are accurate or within a threshold of accuracy.Type: GrantFiled: September 19, 2018Date of Patent: October 13, 2020Assignee: AT&T Intellectual Property I, L.P.Inventors: Marios Hadjieleftheriou, Nick Koudas, Divesh Srivastava
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Patent number: 10593417Abstract: A memory system comprises a memory device including a plurality of memory blocks, the memory device being configured to perform a program operation and a program verify operation to program data to the memory blocks, and a controller configured to detect program error bit information as a result of the program verify operation, select a victim memory block among the memory blocks based on the detected program error bit information, and copy programmed data of the victim memory block.Type: GrantFiled: March 17, 2017Date of Patent: March 17, 2020Assignee: SK hynix Inc.Inventor: Jee-Yul Kim
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Patent number: 10567123Abstract: A method for evaluating link or component quality using synthetic forward error correction (FEC) includes generating a bit sequence. The method further includes transmitting the bit sequence over a link or through a component under test without adding FEC to the bit sequence. The method further includes receiving a bit sequence transmitted over the link or through the component. The method further includes determining locations of bit errors in the received bit sequence. The method further includes determining locations of synthetic FEC codeword and symbol boundaries in the received bit sequence for the synthetic FEC algorithm against which link or component quality is being evaluated. The method further includes identifying symbol and codeword errors for the synthetic FEC algorithm based on the locations of bit errors in received bit sequence. The method further includes outputting an indication of link or component quality based on the symbol and codeword errors identified for the synthetic FEC algorithm.Type: GrantFiled: February 26, 2018Date of Patent: February 18, 2020Assignee: Keysight Technologies, Inc.Inventor: Gerald Raymond Pepper
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Patent number: 10523004Abstract: An energy control system includes a facility model processor, a post VEE readings data stores, a VEE configuration engine, and a global model module. The facility model processor employs interval based energy consumption streams corresponding to a facility to develop and maintain weather-normalized baseline energy consumption data for the facility. The post VEE readings data stores tagged energy consumption data sets that are each associated with a corresponding one of said interval based energy consumption streams, each of said tagged energy consumption data sets comprising groups of contiguous interval values tagged as having been validated, wherein said groups correspond to correct data.Type: GrantFiled: November 8, 2018Date of Patent: December 31, 2019Assignee: ENEL X NORTH AMERICA, INC.Inventors: Elizabeth J. Main, Wendy Chen
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Patent number: 10481206Abstract: A system that can include a computing device, upon implementing a host test program, can be configured to generate compiled host test instructions based on a non-host test program code that has been prepared in accordance with performance characteristics of a non-host automatic test equipment (ATE) and based on calibration data and/or offset data associated with a host ATE. The system can further include a hardware adapter that can be configured to generate non-host test signals based on host test signals generated by a host ATE and with substantially similar characteristics as test signals generated by the non-host ATE, wherein the host test signals are generated by the host ATE based on the compiled host test instructions.Type: GrantFiled: September 8, 2016Date of Patent: November 19, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ramana Tadepalli, Robert Gabriel Almendarez
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Patent number: 10402250Abstract: A digital signage including a memory; a display; and a controller configured to display content on the display, capture a plurality of images of the displaced content, store the plurality of captured images in the memory, and display the stored images on the display in response to an error event signal.Type: GrantFiled: June 19, 2017Date of Patent: September 3, 2019Assignee: LG ELECTRONICS INC.Inventors: Seunghun Lee, Youngran Kim
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Patent number: 10305543Abstract: The present invention relates to a device for transmission by power-line communication (1) between two items of equipment (10, 20) on board an aircraft (1), comprising a transmission cable (3) configured to simultaneously transmit a power supply current and a data signal. This cable (3) comprises two twisted pairs of conductors (34, 34a, 34b). The device comprises a data sender (100) comprising a COFDM coupler (44) configured to modulate a signal by carrier modulation according to a COFDM mode, and a data receiver (200) comprising a COFDM coupler (44) configured to demodulate a signal modulated by carrier modulation according to a COFDM mode. The data sender (100) is configured to send a test signal by carrier modulation according to a COFDM mode, while the data receiver (200) is configured to detect signals corresponding to the test signals sent, and to analyze the carriers of the detected signal in regard to the signal sent and deduce therefrom the state of the transmission cable (3).Type: GrantFiled: March 30, 2017Date of Patent: May 28, 2019Assignee: SAFRAN ELECTRONICS & DEFENSEInventor: Francois Guillot
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Patent number: 10298012Abstract: An apparatus is provided for configuring validation, estimation, and editing (VEE) rules for performing VEE on a plurality of interval based energy consumption streams. The apparatus includes a network operations center, configured to receive the plurality of interval based energy consumption streams and is configured to perform VEE on the plurality of interval based energy consumption streams within a specified time period. The network operations center has a post VEE readings data stores and a rules processor. The post VEE readings data stores is configured to provide a plurality of tagged energy consumption data sets that are each associated with a corresponding one of the plurality of interval based energy consumption streams, each of the plurality of tagged energy consumption data sets including first groups of contiguous interval values tagged as having been validated and second groups of contiguous interval values tagged as having been edited.Type: GrantFiled: September 29, 2016Date of Patent: May 21, 2019Assignee: Enel X North America, Inc.Inventors: Elizabeth J. Main, Wendy Chen
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Patent number: 10291022Abstract: An apparatus is provided for performing validation, estimation, and editing (VEE) on a plurality of interval based energy consumption streams. The apparatus has a network operations center, configured to receive the plurality of interval based energy consumption streams, and configured to perform VEE on the plurality of interval based energy consumption streams within a specified time period. The network operations center includes a VEE processor and a VEE configuration engine.Type: GrantFiled: September 29, 2016Date of Patent: May 14, 2019Assignee: Enel X North America, Inc.Inventors: Elizabeth J. Main, Wendy Chen
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Patent number: 10262259Abstract: A method for selecting bit widths for a fixed point machine learning model includes evaluating a sensitivity of model accuracy to bit widths at each computational stage of the model. The method also includes selecting a bit width for parameters, and/or intermediate calculations in the computational stages of the mode. The bit width for the parameters and the bit width for the intermediate calculations may be different. The selected bit width may be determined based on the sensitivity evaluation.Type: GrantFiled: November 9, 2015Date of Patent: April 16, 2019Assignee: QUALCOMM IncorporatedInventors: Dexu Lin, Venkata Sreekanta Reddy Annapureddy, David Jonathan Julian, Casimir Matthew Wierzynski
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Patent number: 10203714Abstract: A brown out prediction system is provided that performs validation, estimation, and editing (VEE) on a plurality of interval based energy consumption streams. The system includes a post VEE readings data stores, a rules processor, a peak prediction element, and a peak controller. The post VEE readings data stores is configured to provide a plurality of tagged energy consumption data sets. The rules processor is configured to read the post VEE readings data stores and is configured to create a plurality of anomalies having a plurality of differnt durations. The peak prediction element is coupled to the post VEE readings data stores and to weather stores, and is configured to receive post VEE readings. The peak controller is coupled to the peak prediction element, and is configured to receive the brown out time, and is configured to trigger exceptional measures to manage the cumulative energy consumption in order to preclude a brown out.Type: GrantFiled: September 29, 2016Date of Patent: February 12, 2019Assignee: Enel X North America, Inc.Inventors: Elizabeth J. Main, Wendy Chen
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Patent number: 10191506Abstract: A demand response dispatch prediction system is provided that performs validation, estimation, and editing (VEE) on a plurality of interval based energy consumption streams. The system includes a post VEE readings data stores, a rules processor, and a dispatch prediction element. The post VEE readings data stores is configured to provide a plurality of tagged energy consumption data sets that are each associated with a corresponding one of the plurality of interval based energy consumption streams, each of the plurality of tagged energy consumption data sets comprising first groups of contiguous interval values tagged as having been validated and second groups of contiguous interval values tagged as having been edited.Type: GrantFiled: September 29, 2016Date of Patent: January 29, 2019Assignee: ENEL X NORTH AMERICA, INC.Inventors: Elizabeth J. Main, Wendy Chen
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Patent number: 10170910Abstract: An energy baselining system is provided that performs validation, estimation, and editing (VEE). The system includes a facility model processor, a post VEE readings data stores, a VEE configuration engine, and a global model module. The facility model processor is configured to employ one or more interval based energy consumption streams corresponding to a facility to develop and maintain weather-normalized baseline energy consumption data for the facility, where the weather-normalized baseline energy consumption data is derived from training data for the facility. The post VEE readings data stores is configured to provide a plurality of tagged energy consumption data sets that are each associated with a corresponding one of the one or more interval based energy consumption streams, each of the plurality of tagged energy consumption data sets comprising first groups of contiguous interval values tagged as having been validated and second groups of contiguous interval values tagged as having been edited.Type: GrantFiled: September 29, 2016Date of Patent: January 1, 2019Assignee: Enel X North America, Inc.Inventors: Elizabeth J. Main, Wendy Chen
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Patent number: 10120931Abstract: In embodiments of the disclosed technology, indexes, such as inverted indexes, are updated only as necessary to guarantee answer precision within predefined thresholds which are determined with little cost in comparison to the updates of the indexes themselves. With the present technology, a batch of daily updates can be processed in a matter of minutes, rather than a few hours for rebuilding an index, and a query may be answered with assurances that the results are accurate or within a threshold of accuracy.Type: GrantFiled: October 31, 2016Date of Patent: November 6, 2018Assignee: AT&T Intellectual Property I, L.P.Inventors: Marios Hadjieleftheriou, Nick Koudas, Divesh Srivastava
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Patent number: 10096323Abstract: A frame error concealment method and apparatus and a decoding method and apparatus using the same. The frame error concealment method includes setting a concealment method to conceal an error based on one or more signal characteristics of an error frame having the error and concealing the error using the set concealment method.Type: GrantFiled: August 18, 2016Date of Patent: October 9, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ho-sang Sung, Kang-eun Lee, Jung-hoe Kim, Eun-mi Oh
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Patent number: 9640244Abstract: A method and apparatus for pre-calibration of various system performance states is disclosed. In one embodiment, a method includes, for each of a number of different performance states (or operating points), performing initial calibrations of various parameters associated with transfers of data between a memory and a memory controller. After completing the initial calibrations, the calibrated values are stored. Thereafter, during normal operation and following a change to a new performance state, the values of the various parameters are set to the values to which they were calibrated during the initial calibration for that state.Type: GrantFiled: March 29, 2016Date of Patent: May 2, 2017Assignee: Apple Inc.Inventors: Robert E. Jeter, Rakesh L. Notani
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Patent number: 9432151Abstract: An apparatus and a method for Automatic Repeat reQuest (ARQ) in a broadband wireless access system are provided. The method includes driving a timer which operates by a preset period to synchronize ARQ between the transmitter and a receiver; after transmitting data to the receiver without error, when a driving time of the timer expires, checking whether there is data to transmit to the receiver; when there is no data to transmit to the receiver, initializing the timer; and transmitting an ARQ reset message to the receiver. Hence, the air resource consumption and the power consumption in ARQ reset can be lowered by reducing unnecessary ARQ reset.Type: GrantFiled: November 7, 2008Date of Patent: August 30, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Hye-Yeon Jeong, Sung-Wook Park, Jeong-Hoon Park
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Patent number: 9430376Abstract: Priority-based garbage collection utilizes attributes of data stored in the non-volatile memory array in order to improve efficiency of garbage collection and of the overall data storage system. A set of low priority data can be selectively evicted from a non-volatile memory array. This can, for example, reduce write amplification associated with garbage collection. Another set of low priority data can be regrouped or consolidated in a different region of the non-volatile memory array. In addition, flushing of data can be performed in order to enhance or optimize garbage collection. Performance and endurance can thereby be improved.Type: GrantFiled: December 26, 2012Date of Patent: August 30, 2016Assignee: Western Digital Technologies, Inc.Inventor: Robert L. Horn
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Patent number: 9264729Abstract: Video decoding device is disclosed. The video decoding device comprises a demultiplexer, a first decoder and a controller. The demultiplexer receives a Transport Stream to recover video Packetized Elementary Stream (PES) to determine a presentation time stamp (PTS) and a decoding time stamp (DTS) in a PES header of the PES. The first decoder retrieves a video frame from the video PES to determine temporal reference of the video frame. The controller receives the PTS, the DTS, and the temporal reference to determine whether there is a missing video frame.Type: GrantFiled: January 4, 2012Date of Patent: February 16, 2016Assignee: MEDIATEK INC.Inventors: Ying-Jui Chen, Chung-Bin Wu, Ya-Ting Chuang
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Patent number: 9241281Abstract: A method includes identifying multiple statistics associated with each of multiple wireless connections. The multiple wireless connections form a single communication path between two wireless nodes in a wireless network. The method also includes identifying an overall quality associated with the communication path using the statistics. The method can also include assigning a quality value to each statistic for each wireless connection, where the overall quality is based on at least one of the quality values assigned to the statistics (such as a lowest of the quality values). The statistics could include a Received Signal Quality Indicator (RSQI), a Received Signal Strength Indication (RSSI), and a transmit success/fail ratio. The quality value assigned to each statistic could include a “good” quality, a “fair” quality, or a “poor” quality.Type: GrantFiled: July 22, 2013Date of Patent: January 19, 2016Assignee: Honeywell International Inc.Inventors: Christopher Pulini, Jeffrey B. Scott, Norman R. Swanson, Niral Sanghavi
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Patent number: 9202041Abstract: This document discusses, among other things, an attack detection module configured to permanently shut down a slave device after a number of consecutive attacks.Type: GrantFiled: February 6, 2014Date of Patent: December 1, 2015Assignee: Fairchild Semiconductor CorporationInventors: Robert A. Card, Jefferson Hopkins, Christian Klein, Myron J. Miske, Michael Smith, John R. Turner, Jaeyoung Yoo
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Patent number: 9165685Abstract: According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written.Type: GrantFiled: June 24, 2014Date of Patent: October 20, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Shigehiro Asano, Kenichiro Yoshii, Kazuhiro Fukutomi, Shinichi Kanno
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Patent number: 9153237Abstract: Disclosed is an audio signal processing method comprising the steps of: receiving an audio signal containing current frame data; generating a first temporary output signal for the current frame when an error occurs in the current frame data, by carrying out frame error concealment with respect to the current frame data a random codebook; generating a parameter by carrying out one or more of short-term prediction, long-term prediction and a fixed codebook search based on the first temporary output signal; and memory updating the parameter for the next frame; wherein the parameter comprises one or more of pitch gain, pitch delay, fixed codebook gain and a fixed codebook.Type: GrantFiled: April 16, 2015Date of Patent: October 6, 2015Assignees: LG Electronics Inc., Industry-Academic Cooperation Foundation, Yonsei UniversityInventors: Hye Jeong Jeon, Dae Hwan Kim, Hong Goo Kang, Min Ki Lee, Byung Suk Lee, Gyu Hyeok Jeong
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Patent number: 9136020Abstract: According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written.Type: GrantFiled: June 24, 2014Date of Patent: September 15, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Shigehiro Asano, Kenichiro Yoshii, Kazuhiro Fukutomi, Shinichi Kanno
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Publication number: 20150143192Abstract: In a method of error recovery when downloading data files using an application server, the application server connects to at least one terminal device and several file servers. The application server receives a file downloading request from the terminal device, finds a first file server nearest to the terminal device, and downloads the required data file from the first file server to the terminal device. The application server searches a file configuration table to find a second file server which is away from the first file server when the data file has not been successfully downloaded from the first file server, downloads the required data file from the second file server to the terminal device, and synchronizes the data file of the second file server to recovery the data file of the first file server when the data file has been successfully downloaded from the second file server.Type: ApplicationFiled: July 18, 2012Publication date: May 21, 2015Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Chung-I Lee, Hai-Hong Lin, De-Yi Xie, Hai-Yun Chen, An-Sheng Luo
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Patent number: 9037934Abstract: A device for demultiplexing a packet-based transport stream of transport stream packets each provided with a systematic forward error detection code is described. The transport stream packets are each allocated to one of a plurality of data sinks, so that in a payload data section of the transport stream packets allocated to the same data sink a data stream of forward error protection code-protected data packets which are addressed to the respective data sink is embedded. The device determines, for a transport stream packet which is erroneous according to the systematic forward error detection code, a probability value for each of the plurality of data sinks which indicates how probable it is that the predetermined transport stream packet is allocated to the respective data sink, and allocates the predetermined transport stream packet to a selected one of the plurality of data sinks.Type: GrantFiled: January 28, 2014Date of Patent: May 19, 2015Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.Inventors: Andreas Mull, Christian Forster, Rainer Hildinger, Heinz Gerhaeuser
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Patent number: 8909824Abstract: This invention relates to techniques for managing the transmission and reception of data fragments that contains one or more data blocks. One embodiment of the invention includes the following steps: processing the fragments sequentially, wherein each fragment has a processing index that corresponds to sequential processing of that fragment; processing each of the fragments until a termination upon meeting at least one pre-defined condition; assigning a timer to an un-terminated fragment having a lowest processing index; starting said timer having a timeout value; and running said timer until the processing of said un-terminated fragment is terminated.Type: GrantFiled: February 25, 2013Date of Patent: December 9, 2014Inventors: Yalun Li, William Li, Jr.
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Patent number: 8873416Abstract: A method for estimating round-trip time (RTT) values for data packets travelling in a telecommunication network is disclosed. During a first time interval (206) which begins with the start of a data transmission, estimated RTT values (14) are generated by filtering a periodic sequence of RTT samples (12) with a self-initializing expanding memory polynomial (EMP) filter (16) and, after a first switch-over time at the end of the first time interval, the estimated RTT values are generated by filtering the RTT samples with a fading memory polynomial (FMP) filter (18). The first switch-over time is determined by comparing an FMP estimation error and an EMP estimation error, where the FMP estimation error is the difference between an output of the FMP filter and the RTT samples, and the EMP estimation error is the difference between an output of the EMP filter and the RTT samples, and triggering the first switch-over time when the FMP estimation error becomes equal to or less than the EMP estimation error.Type: GrantFiled: February 25, 2011Date of Patent: October 28, 2014Assignee: University of Cape TownInventors: Guy-Alain Lusilao-Zodi, Norman Morrison
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Patent number: 8868993Abstract: Systems and methods are provided for estimating missing samples in a signal. A plurality of samples in the signal is received, and a respective sample corresponds to a respective sample location in a plurality of sample locations. A subset of sample locations representing missing samples in the signal is identified, and a first and a second threshold are determined. Each threshold is an integer number of samples, and the second threshold is greater than the first threshold. A first set of consecutive sample locations from the identified subset of sample locations is formed, and the missing samples in the first set of consecutive sample locations are replaced based on a comparison between a number of locations in the first set of consecutive locations, the first threshold, and the second thresholds.Type: GrantFiled: April 13, 2012Date of Patent: October 21, 2014Assignee: Google Inc.Inventors: Kevin Yu, Xinyi Zhang
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Patent number: 8843798Abstract: A frame error concealment method and apparatus and a decoding method and apparatus using the same. The frame error concealment method includes setting a concealment method to conceal an error based on one or more signal characteristics of an error frame having the error and concealing the error using the set concealment method.Type: GrantFiled: November 6, 2007Date of Patent: September 23, 2014Assignee: SAMSUNG Electronics Co., Ltd.Inventors: Ho-sang Sung, Kang-eun Lee, Jung-hoe Kim, Eun-mi Oh
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Patent number: 8830914Abstract: An approach is provided for providing acknowledgement signaling. A transmission failure associated with data from a user equipment is determined. An allocation message is generated for signaling of the transmission failure to the user equipment. The allocation message provides allocation of resource for retransmission of the data.Type: GrantFiled: February 8, 2008Date of Patent: September 9, 2014Assignee: Nokia CorporationInventors: Haiming Wang, Esa Malkamaki, Dajie Jiang
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Patent number: 8826097Abstract: A data processing apparatus is provided which comprises a processor unit configured to perform data processing operations in response to a sequence of instructions and a storage unit configured to store data values for access by the processor unit when performing its data processing operations. Redundant error control data is stored in association with the data values, the redundant error control data enabling identification of an error in the data values. The data processing apparatus also comprises a data scrubbing unit configured to perform a data scrubbing process on at least a subset of the data values, the data scrubbing process comprising determining with reference to the redundant error control data if an error is present in that subset of data values and, where possible, correcting that error with reference to the redundant error control data.Type: GrantFiled: March 30, 2011Date of Patent: September 2, 2014Assignee: ARM LimitedInventors: Emre Özer, Sachin Satish Idgunji
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Publication number: 20140245092Abstract: A method for content addressable memory (CAM) error recovery that includes detecting an error in an entry of a CAM, identifying an address of the entry in the CAM, copying data from the address in the backup random access memory (RAM) into the entry of the CAM to obtain a corrected CAM, clearing a results (first in first out) FIFO structure based on detecting the error, performing, using the corrected CAM, a match request stored in a replay FIFO structure to obtain a revised result, and storing the revised result in the results FIFO structure.Type: ApplicationFiled: February 26, 2013Publication date: August 28, 2014Applicant: ORACLE INTERNATIONAL CORPORATIONInventors: Brian Edward Manula, Morten Schanke, Robert W. Wittosch
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Publication number: 20140245093Abstract: A method for protecting a master boot record in a solid state drive, comprising the steps of (A) receiving a plurality of input/output requests from a host device, (B) determining whether one or more of the input/output requests is read/written to a first of a plurality of logical block addresses of the solid state drive and (C) writing an entry to a table for each of the input/output requests read/written to the first of the logical block addresses. The table (i) is separate from the first of the logical block addresses and (ii) is used to recover errors in the first of the logical block addresses.Type: ApplicationFiled: March 11, 2013Publication date: August 28, 2014Applicant: LSI CORPORATIONInventors: Li Zhao Ma, Peng Xu, Ning Zhao, De Ling Li, Zhao Cui
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Patent number: 8788900Abstract: According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written.Type: GrantFiled: April 23, 2013Date of Patent: July 22, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Shigehiro Asano, Kenichiro Yoshii, Kazuhiro Fukutomi, Shinichi Kanno
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Patent number: 8782483Abstract: Embodiments related to retransmission in a communication system are described and depicted. In one embodiment, a retransmission entity repeats a transmission of a data transfer unit by the device after a predetermined number of other transmitted data transfer units has been transmitted. The retransmission entity may also determine whether a measure for a time period since the first transmission of the data transfer unit by the device has exceeded a predetermined threshold and to provide a final transmission of the data transfer unit based on the determining that the measure for the time period has exceeded the predetermined threshold.Type: GrantFiled: September 17, 2010Date of Patent: July 15, 2014Assignee: Lantiq Deutschland GmbHInventors: Dietmar Schoppmeier, Gert Schedelbeck, Bernd Heise
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Publication number: 20140164863Abstract: Examples are disclosed for generating or providing a moving read reference (MRR) table for recovering from a read error of one or more memory cells of a non-volatile memory included in a storage device. Priorities may be adaptively assigned to entries included in the MRR table and the entries may be ordered for use based on the assigned priorities. Other examples are described and claimed.Type: ApplicationFiled: March 29, 2012Publication date: June 12, 2014Inventors: Lark-Hoon Leem, Kiran Pangal, Xin Guo
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Patent number: 8750316Abstract: A communications system (100) includes a packet switching network (130) configured to transfer a stream of information packets from a source (110) to a destination (120). The communications system (100) also includes at least one loss concealment processor (140) configured to perform packet loss concealment on the stream of information packets as the stream passes through an intermediate point within the packet switching network (130).Type: GrantFiled: May 24, 2011Date of Patent: June 10, 2014Assignee: Verizon Laboratories Inc.Inventor: Adrian Evans Conway
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Publication number: 20140143626Abstract: A device for demultiplexing a packet-based transport stream of transport stream packets each provided with a systematic forward error detection code, wherein the transport stream packets are each allocated to one of a plurality of data sinks, so that in a payload data section of the transport stream packets allocated to the same data sink a data stream of forward error protection code-protected data packets is embedded addressed to the respective data sink, the device being implemented to determine, for a predetermined transport stream packet which is erroneous according to the systematic forward error detection code, a probability value for each of the plurality of data sinks which indicates how probable it is that the predetermined transport stream packet is allocated to the respective data sink, and allocate the predetermined transport stream packet, on the basis of the probability values for the plurality of data sinks, to a selected one of the plurality of data sinks.Type: ApplicationFiled: January 28, 2014Publication date: May 22, 2014Applicant: Fraunhofer-Gesellschaft zur Foerderung der Angewandten Forschung e.V.Inventors: Andreas MULL, Christian FORSTER, Rainer HILDINGER, Heinz GERHAEUSER
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Publication number: 20140136915Abstract: A memory device includes but is not limited to a non-volatile memory array and control logic integrated with and distributed over the non-volatile memory array. The control logic can be operable to maintain a plurality of copies of data in the non-volatile memory array and detect errors by comparison of selected ones of the plurality of copies.Type: ApplicationFiled: November 28, 2012Publication date: May 15, 2014Applicant: Elwha LLC, a limited liability corporation of the State of DelawareInventor: Elwha LLC, a limited liability corporation of the State of Delaware