Sequential Decoder (e.g., Fano Or Stack Algorithm) Patents (Class 714/791)
  • Patent number: 10673465
    Abstract: A memory controller according to an embodiment includes a memory interface that reads out a received word from a non-volatile memory and a decoder that performs bounded distance decoding for the read received word. The decoder sets rm (rm is a natural number equal to or larger than 1) symbols of a plurality of symbols constituting the received word, as options of symbol positions at each of which an error is assumed, generates a test pattern in which m (m is a natural number equal to or larger than 1 and equal to or smaller than the rm) symbols of the rm symbols are objects of rewriting, generates test hard-decision values by rewriting each of hard-decision values of the m symbols that are objects of rewriting in the test pattern, among the symbols, and performs bounded distance decoding for the test hard-decision values.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: June 2, 2020
    Assignee: Toshiba Memory Corporation
    Inventor: Daiki Watanabe
  • Patent number: 9825789
    Abstract: Spatial Multiplexing (SM) with Multiple Input Multiple Output (MIMO) is used in many wireless communication systems for providing high data rate in a given channel bandwidth. When SM-MIMO is used for sharing the same resources for multiple users (MU-SM), the control information describing the parameters of MU-SM need to be sent separately to all the users that may be sharing the same resources. The base station in a wireless communication system may only provide the parameters required by each specific client terminal for decoding the data addressed to it. A method and apparatus are disclosed that enable improved decoding of MU-SM signals in scenarios where information about the parameters of other transmissions on the same resources or absence of any transmission other than the one intended for the subject client terminal is not available.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: November 21, 2017
    Assignee: MBIT WIRELESS, INC.
    Inventors: Bhaskar Patel, Arumugam Govindswamy
  • Patent number: 9191131
    Abstract: A method of detecting a control channel includes receiving data transmitted via a control channel. A path metric and a correction term is computed based on the received data. A decision metric representing a sum or a difference of the path metric and the correction term is computed. Based on the decision metric, it is decided on a detection of the control channel.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: November 17, 2015
    Assignee: Intel Deutschland GmbH
    Inventors: Jens Berkmann, Armin Haeutle, Axel Huebner
  • Patent number: 9063916
    Abstract: Techniques for encoding node locations are provided. In some examples, a node in a hierarchy such as a document object model (DOM) may be expressed as a location path from the root node of the hierarchy to the node. Each node on the location path may be encoded using a mapping between the type and/or index of the node and a set of characters such as ASCII characters. The encoding of each node on the path be concatenated to form the encoded location path. The encoding seeks to minimize the length of the encoded location path. For example, in an embodiment, a single ASCII character may be used to encode both the type and the index of a node. In an embodiment, breakpoint locations may be encoded using methods provided to reduce storage and computing resource required.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: June 23, 2015
    Assignee: Oracle International Corporation
    Inventors: Prabhu Thukkaram, Michal Chmielewski, Horst Heistermann
  • Patent number: 9063871
    Abstract: A decoding device (1) has: a reliability calculating unit (5) which calculates reliability information having a non-linear relationship with a noise distribution of a PR communication path (3) in at least part of or all of the reliability information based on characteristics of the PR communication path (3) and a predetermined modulation rule from an encoded signal that is obtained from the PR communication path (3); a reliability correcting unit (17) which corrects the reliability information calculated by a reliability calculating unit (5); and an error correction decoding unit (18) which performs error correction decoding on the reliability information corrected by the reliability correcting unit (17).
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: June 23, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tsuyoshi Nakasendo, Yasumori Hino, Kohei Nakata, Yuji Takagi
  • Patent number: 8938664
    Abstract: A representation of a codeword is decoded by applying a first decoder of the codeword to the representation of the codeword. If applying the first decoder fails to decode the representation of the codeword then a second decoder of the codeword is applied to the representation of the codeword. Preferably, applying the first decoder consumes less power and is faster than applying the second decoder. Data are ported by encoding the data as a codeword, exporting the codeword to a corrupting medium, importing a representation of the codeword, and applying a first decoder to the representation of the codeword. If applying the first decoder fails to decode the representation of the codeword then a second decoder of the codeword is applied to the representation of the codeword.
    Type: Grant
    Filed: July 6, 2011
    Date of Patent: January 20, 2015
    Assignee: Ramot at Tel Aviv University Ltd.
    Inventors: Idan Alrod, Eran Sharon, Simon Litsyn
  • Patent number: 8910028
    Abstract: Systems, methods, and apparatus are provided for iteratively decoding a codeword. Once a codeword is received, the codeword is processed to generate an incremental hard decision value and a log likelihood ratio amplitude value. These values are generated by processing the codeword using a soft output Viterbi algorithm. A faulty symbol in the codeword is identified. A complete hard decision value is generated using the incremental hard decision value. The LLR amplitude value and complete hard decision value corresponding to the identified faulty symbol are selectively provided to a decoder and the decoder uses these values to decode the codeword.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: December 9, 2014
    Assignee: Marvell International Ltd.
    Inventors: Shu Li, Yifei Zhang, Wei Cao
  • Patent number: 8719658
    Abstract: A method for accessing extrinsic information in a turbo decoder is disclosed. Operation phases for Forward State Metric Calculators (FSMCs) and Reverse State Metric Calculators (RSMCs) in multiple maximum a posteriori probability (MAP) decoders are misaligned differently based on whether a current half iteration is even or odd. First extrinsic information is read from a memory into the FSMCs and RSMCs using the misaligned operation phases. Second extrinsic information is determined using the MAP decoders. Each row of the second extrinsic information is stored to a different bank in the memory using the misaligned operation phases.
    Type: Grant
    Filed: September 9, 2010
    Date of Patent: May 6, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Zhiqiang Cui, Iwen Yao, Qiang Huang
  • Patent number: 8713401
    Abstract: Apparatus and methods store error recovery data in different dimensions of a memory array. For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are used. By using separate dimensions, the likelihood that a defect affects both error recovery techniques is lessened, thereby increasing the probability that error recovery can be performed successfully. In one example, block error correction codes are used for data stored along rows, and this data is stored in one level of multiple-level cells of the array. Supplemental error correction codes are used for data stored along columns, such as along the cells of a string, and the supplemental error correction codes are stored in a different level than the error correction codes.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: April 29, 2014
    Assignee: Micron Technology, Inc.
    Inventor: William H. Radke
  • Patent number: 8640012
    Abstract: Received communication signals may be decoded according to a combined, iterative inner code—outer code decoding technique. The inner code decoding is based on information produced by the outer code decoding.
    Type: Grant
    Filed: April 27, 2009
    Date of Patent: January 28, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Fuyun Ling, Thomas Sun, Tao Tian, Raghuraman Krishnamoorthi, Jing Jiang
  • Patent number: 8522355
    Abstract: Embodiments relate to systems and methods for implementation on a mobile device to force the mobile device into a secure state upon detection or determination of a triggering event. Once it is determined that a triggering event has occurred, each application operating on the mobile device is caused to immediately unreference sensitive objects and a secure garbage collection operation is performed upon the unreferenced sensitive objects to render data associated therewith unreadable. The mobile device is then caused to enter a secure state, in which the mobile device cannot be accessed without authorization. A microprocessor within the mobile device is configured to determine the existence of the triggering event according to a configuration data structure and to perform the secure garbage collection.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: August 27, 2013
    Assignee: Research In Motion Limited
    Inventors: Herbert Anthony Little, Neil Patrick Adams, Michael Kenneth Brown, Michael Stephen Brown
  • Patent number: 8468415
    Abstract: Apparatus and methods store error recovery data in different dimensions of a memory array. For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are used. By using separate dimensions, the likelihood that a defect affects both error recovery techniques is lessened, thereby increasing the probability that error recovery can be performed successfully. In one example, block error correction codes are used for data stored along rows, and this data is stored in one level of multiple-level cells of the array. Supplemental error correction codes are used for data stored along columns, such as along the cells of a string, and the supplemental error correction codes are stored in a different level than the error correction codes.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: June 18, 2013
    Assignee: Micron Technology, Inc.
    Inventor: William H. Radke
  • Patent number: 8419547
    Abstract: A wagering game system and its operations are described herein. In some embodiments, the operations can include receiving a packet of gaming data. The packet includes data units and exclusive-OR check bytes. The data units and exclusive-OR check bytes are organized in the packet to correspond to vectors (e.g., columns and rows) of a matrix. Each of the exclusive-OR check bytes represent a result of a logical exclusive disjunction operation on a sequence of the data units contained in each of the vectors. The operations can further include detecting that some of the data units have data corruption and selecting one of the exclusive-OR check bytes that corresponds to one of the vectors. The one of the vectors includes only one corrupted data unit. The operations can further include recovering the one corrupted data unit using the one of the exclusive-OR check bytes that corresponds to the one of the vectors.
    Type: Grant
    Filed: November 4, 2010
    Date of Patent: April 16, 2013
    Assignee: WMS Gaming, Inc.
    Inventor: Paul J. Radek
  • Patent number: 8375279
    Abstract: To provide a receiving device and a receiving method which achieve iterative decoding regarding concatenated codes containing a convolutional code while suppressing increase in circuit scale, a decoder and an error correcting part iteratively perform decoding and error correction corresponding to a convolutional code on soft-decision inputs corresponding to the received signal sequence. Depending on whether a decoding result matches error corrected decoded data obtained in previous processing or not, penalties are calculated corresponding to branches transiting with the respective decoded results, and a branch metric is calculated by reflecting the calculated penalties as to decrease likelihood ratio of each of the branches to which the penalties are to be added. The obtained branch metric is input to a decoder, thereby reflecting the penalty corresponding to the decoding result.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: February 12, 2013
    Assignees: Fujitsu Limited, Fujitsu Semiconductor Limited
    Inventors: Mitsuru Tomono, Naoto Yoneda, Makoto Hamaminato
  • Patent number: 8321744
    Abstract: A channel adaptive iterative turbo decoder for computing with MAP decoders a set of branch metrics for a window of received data, computing the forward and reverse recursive path state metrics and computing from the forward and reverse recursive path state metrics the log likelihood ratio for 1 and 0 and interleaving the decision bits; and identifying those MAP decoder decision bits which are non-convergent, computing a set of branch metrics for the received data, computing from the forward and reverse recursive path state metrics the log likelihood ratio (LLR) for 1 and 0 for each non-converged decision bit and interleaving the non-convergent decision bits.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: November 27, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Yosef Stein, Hazarathaiah Malepati, Haim Primo
  • Patent number: 8312357
    Abstract: A digital broadcast transmitting system and a signal processing method thereof that improves the receiving performance of the system. A digital broadcast transmitter includes a randomizer to receive and randomize a transport stream into a specified position of which stuff bytes are inserted, a replacement sequence generator to generate known data including a predefined sequence, a stuff-byte exchange unit to insert the known data into the specified position of the transport stream into which stuff bytes are inserted, an encoder to encode the transport stream output from the stuff-byte exchange unit for an error correction, and a transmission unit to modulate the encoded transport stream, RF-convert the modulated transport stream and transmit the RF-converted data. The digital broadcast receiving performance is improved even in an inferior multi-path channel by detecting the known data from the received transmission and using the known data for synchronization and equalization.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: November 13, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eui-jun Park, Yong-deok Chang, Sung-soo Park
  • Patent number: 8255766
    Abstract: A receiving apparatus and a receiving method for interference cancellation in a wireless communication system are provided. The receiving apparatus includes a multiple-input, multiple-output (MIMO) detector for estimating a desired signal and an interference signal based on received signals in accordance with a MIMO detection scheme; a first decoder for iteratively decoding the interference signal output from the detector; a second decoder for iteratively decoding the desired signal output from the decoder; and an LLR updater for updating an interval LLR value of the second decoder using an interval LLR value of the first decoder.
    Type: Grant
    Filed: January 4, 2008
    Date of Patent: August 28, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Keun-Chul Hwang, Sung-Woo Park, June Moon
  • Patent number: 8255778
    Abstract: A method for decoding of multiple wireless signals by a chase combining hybrid-automatic-repeat-request CC-HARQ receiver includes demodulating wireless signals received from respective mobile sources using an effective channel matrix and decision statistics; updating log-likelihood-ratios LLRs and decoding the received codewords using the corresponding updated LLRs; determining set of correctly decoded codewords using a cyclic redundancy check; updating the effective channel matrix and decision statistics responsive to the step of determining; and resetting the effective channel matrix and decision statistics in the event that the number of decoding errors for a codeword exceeds its maximum limit after storing the updated LLRs of all remaining erroneously decoded codewords for which the number of decoding errors is below the respective maximum limit.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: August 28, 2012
    Assignee: NEC Laboratories America, Inc.
    Inventors: Narayan Prasad, Xiaodong Wang
  • Patent number: 8245100
    Abstract: Apparatus and methods store error recovery data in different dimensions of a memory array. For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are used. By using separate dimensions, the likelihood that a defect affects both error recovery techniques is lessened, thereby increasing the probability that error recovery can be performed successfully. In one example, block error correction codes are used for data stored along rows, and this data is stored in one level of multiple-level cells of the array. Supplemental error correction codes are used for data stored along columns, such as along the cells of a string, and the supplemental error correction codes are stored in a different level than the error correction codes.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: August 14, 2012
    Assignee: Micron Technology, Inc.
    Inventor: William H. Radke
  • Patent number: 8196012
    Abstract: An approximated lower-triangle structure for the parity-check matrix of low-density parity-check (LDPC) codes which allows linear-time-encoding complexity of the codes is disclosed, and the parity part of the parity-check matrix is semi-deterministic which allows high flexibility when designing the LDPC codes in order to provide higher error-correction capabilities than a typical dual-diagonal structure.
    Type: Grant
    Filed: October 5, 2009
    Date of Patent: June 5, 2012
    Assignee: The Hong Kong Polytechnic University
    Inventors: Chung Ming Lau, Wai Man Tam, Chi Kong Tse
  • Patent number: 8176400
    Abstract: Various embodiments of the present invention provide systems and methods for flaw scan in a data processing system. As one example, a data processing system is disclosed that includes a data detector circuit, a bit sign inverting circuit, and an LDPC decoder circuit. The data detector circuit receives a verification data set that is an invalid LDPC codeword, and applies a data detection algorithm to the verification data set to yield a detected output. The bit sign inverting circuit modifies the sign of one or more elements of a first derivative of the detected output to yield a second derivative of the detected output. The second derivative of the detected output is an expected valid LDPC codeword. The LDPC decoder circuit applies a decoding algorithm to the second derivative of the detected output to yield a decoded output.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: May 8, 2012
    Assignee: LSI Corporation
    Inventors: Weijun Tan, Shaohua Yang, Hongwei Song, Richard Rauschmayer
  • Patent number: 8077813
    Abstract: A decoding device may include a sequential convolutional code decoder, and a parallel convolutional code decoder. The decoding device may further include a controller for selectively processing a convolutionally encoded input signal via at least one of the sequential convolutional code decoder and the parallel convolutional code decoder. The selection of decoder may be based upon a signal-to-noise ratio or the passage of time, for example.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: December 13, 2011
    Assignee: Harris Corporation
    Inventors: William N. Furman, John W. Nieto
  • Patent number: 8078939
    Abstract: One embodiment of the invention relates to a network communication device. The network communication device includes a network interface configured to receive an initial data stream. The network communication device also includes an interleaving redundancy encoder that comprises a memory unit arranged in N columns and D rows. The interleaving redundancy encoder is configured to calculate at least one redundancy byte based on a series of spaced, non-consecutive bytes in the initial data stream. Other systems and methods are also disclosed.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: December 13, 2011
    Assignee: Lantiq Deutschland GmbH
    Inventor: Bernd Heise
  • Patent number: 8074157
    Abstract: Methods and apparatus are provided for reduced complexity Soft-Output Viterbi detection. A Soft-Output Viterbi algorithm processes a signal by determining branch metrics using a branch metrics unit; determining survivor paths for sequence detection using a first add-compare select unit; and determining survivor paths for generating one or more bit reliability values using a second add-compare select unit, wherein the first and second add-compare select units process the branch metrics determined by the branch metrics unit. The first and second add-compare select units can optionally process branch metrics having a different number of bits.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: December 6, 2011
    Assignee: Agere Systems Inc.
    Inventor: Erich F Haratsch
  • Patent number: 8051358
    Abstract: Apparatus and methods store error recovery data in different dimensions of a memory array. For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are used. By using separate dimensions, the likelihood that a defect affects both error recovery techniques is lessened, thereby increasing the probability that error recovery can be performed successfully. In one example, block error correction codes are used for data stored along rows, and this data is stored in one level of multiple-level cells of the array. Supplemental error correction codes are used for data stored along columns, such as along the cells of a string, and the supplemental error correction codes are stored in a different level than the error correction codes.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: November 1, 2011
    Assignee: Micron Technology, Inc.
    Inventor: William H. Radke
  • Patent number: 8042029
    Abstract: A representation of a codeword is decoded by applying a first decoder of the codeword to the representation of the codeword. If applying the first decoder fails to decode the representation of the codeword then a second decoder of the codeword is applied to the representation of the codeword. Preferably, applying the first decoder consumes less power and is faster than applying the second decoder. Data are ported by encoding the data as a codeword, exporting the codeword to a corrupting medium, importing a representation of the codeword, and applying a first decoder to the representation of the codeword. If applying the first decoder fails to decode the representation of the codeword then a second decoder of the codeword is applied to the representation of the codeword.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: October 18, 2011
    Assignee: Ramot At Tel Aviv University Ltd.
    Inventors: Idan Alrod, Eran Sharon, Simon Litsyn
  • Publication number: 20110239095
    Abstract: To provide a receiving device and a receiving method which achieve iterative decoding regarding concatenated codes containing a convolutional code while suppressing increase in circuit scale, a decoder and an error correcting part iteratively perform decoding and error correction corresponding to a convolutional code on soft-decision inputs corresponding to the received signal sequence. Depending on whether a decoding result matches error corrected decoded data obtained in previous processing or not, penalties are calculated corresponding to branches transiting with the respective decoded results, and a branch metric is calculated by reflecting the calculated penalties as to decrease likelihood ratio of each of the branches to which the penalties are to be added. The obtained branch metric is input to a decoder, thereby reflecting the penalty corresponding to the decoding result.
    Type: Application
    Filed: February 24, 2011
    Publication date: September 29, 2011
    Applicants: Fujitsu Limited, Fujitsu Semiconductor Limited
    Inventors: Mitsuru Tomono, Naoto Yoneda, Makoto Hamaminato
  • Publication number: 20110197112
    Abstract: A modified soft output Viterbi algorithm (SOVA) detector receives a sequence of soft information values and determines a best path and an alternate path for each soft information value and further determines, when the best and alternate paths lead to the same value for a given soft information value, whether there is a third path departing from the alternate path that leads to an opposite decision with respect to the best path for a given soft information value. The SOVA detector then considers this third path when updating the reliability of the best path. The modified SOVA detector achieves max-log-map equivalence effectively through the Fossorier approach and includes modified reliability metric units for the first N stages of the SOVA detector, where N is the memory depth of a given path, and includes conventional reliability metric units for the remaining stages of the detector.
    Type: Application
    Filed: October 1, 2010
    Publication date: August 11, 2011
    Applicant: STMICROELECTRONICS, INC.
    Inventors: Sivagnanam Parthasarathy, Lun Bin Huang, Alessandro Risso
  • Patent number: 7975212
    Abstract: A sequential decoding method and a decoding apparatus are provided. According to the method, an open stack is adopted for storing a plurality of paths. When the codeword generated by an internal decoder in the decoding apparatus is incorrect, a codeword is generated again by using the paths stored in the open stack. Accordingly, the complexity of decoding is reduced.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: July 5, 2011
    Assignee: Sunplus Technology Co., Ltd.
    Inventors: Shin-Lin Shieh, Po-Ning Chen, Yung-Hsiang Han
  • Patent number: 7962841
    Abstract: A majority voting Viterbi decoder includes a branch metric calculator (BMC) for measuring a difference between a received symbol and a reference symbol and outputting branch metrics from the difference; an add-compare-selection (ACS) unit for determining an optimal path using the branch metrics; a survival path memory unit for outputting decoded symbols by performing decoding based on the optimal path; and a majority voting unit for determining a final decoded symbol by performing majority voting for the decoded symbols output from the survival path memory unit. Accordingly, by adding the majority voting unit, a decoding depth can be reduced without the loss of an encoding gain required in a system, and by reducing the decoding depth, miniaturization is possible, power consumption can be reduced, and a processing delay in a memory can be minimized.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: June 14, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Shi-Chang Rho, Jun Jin Kong
  • Patent number: 7900119
    Abstract: One embodiment of the invention relates to a network communication device. The network communication device includes a network interface configured to receive an initial data stream. The network communication device also includes an interleaving redundancy encoder that comprises a memory unit arranged in N columns and D rows. The interleaving redundancy encoder is configured to calculate at least one redundancy byte based on a series of equally spaced, non-consecutive bytes in the initial data stream, where a number of bytes between equally spaced bytes is approximately equal to D?1. Other systems and methods are also disclosed.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: March 1, 2011
    Assignee: Lantiq Deutschland GmbH
    Inventor: Bernd Heise
  • Patent number: 7895505
    Abstract: An input unit inputs sequentially bit data, where the bit data is convolutionally coded by a generator matrix defined according to a constraint length and a coding rate and has the number of streams defined by the coding rate. A temporary decoded data shift register unit delays temporary decoded data over at least a period of time corresponding to the constraint length. A generation unit generates, per stream, bit data serving as candidates for a decoding, by performing exclusive OR based on the generator matrix on the delayed temporary decoded data and the inputted bit data. A comparator and a selector select any of the bit data per stream generated by the generation unit, as a decoding result, and outputs the selected decoding result.
    Type: Grant
    Filed: March 23, 2007
    Date of Patent: February 22, 2011
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Katsuaki Hamamoto
  • Patent number: 7882413
    Abstract: Time-space encoding and/or decoding may employ time variant linear transformations. Turbo coding and/or decoding may be used in conjunction with the use of time variant linear transformations. Such time variant linear transformations may be unitary in nature.
    Type: Grant
    Filed: January 19, 2006
    Date of Patent: February 1, 2011
    Assignee: New Jersey Institute of Technology
    Inventors: Hangjun Chen, Alexander M. Haimovich
  • Patent number: 7793199
    Abstract: A method for reducing the computational complexity of a Viterbi decoder, which is suitable for all code rates of a convolutional code applied by the Viterbi decoder. The method dramatically reduces the branch metric computation to thus reduce the complexity of implementing the Viterbi decoder, without affecting the capability of error correction. Upon the best mode, the Viterbi decoder can reduce the required branch metric computation to ¼k of the original computation.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: September 7, 2010
    Assignee: Tatung Company
    Inventor: Tsung-Sheng Kuo
  • Patent number: 7751506
    Abstract: A MIMO receiver implements a method for the soft bit metric calculation with linear MIMO detection for LDPC codes, after linear matrix inversion MIMO detection. In the receiver, a detector detects the estimated symbol and the noise variance. Further, a soft metric calculation unit computes the distance between the estimated symbol and the constellation point, and then divides the distance by the noise variance to determine the soft bit metrics.
    Type: Grant
    Filed: December 1, 2005
    Date of Patent: July 6, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Huaning Niu, Chiu Ngo
  • Patent number: 7752528
    Abstract: A digital broadcast transmitting system and a signal processing method thereof that improves the receiving performance of the system. A digital broadcast transmitter includes a randomizer to receive and randomize a transport stream into a specified position of which stuff bytes are inserted, a replacement sequence generator to generate known data including a predefined sequence, a stuff-byte exchange unit to insert the known data into the specified position of the transport stream into which stuff bytes are inserted, an encoder to encode the transport stream output from the stuff-byte exchange unit for an error correction, and a transmission unit to modulate the encoded transport stream, RF-convert the modulated transport stream and transmit the RF-converted data. The digital broadcast receiving performance is improved even in an inferior multi-path channel by detecting the known data from the received transmission and using the known data for synchronization and equalization.
    Type: Grant
    Filed: May 3, 2006
    Date of Patent: July 6, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eui-jun Park, Yong-deok Chang, Sung-soo Park
  • Patent number: 7712013
    Abstract: In an embodiment, a method includes performing a redundancy check to determine if a baseline bit sequence is compliant. When the baseline bit sequence is not compliant, the method additionally includes performing an iterative process until a compliant, candidate bit sequence is identified. The iterative process includes identifying one or more existing branches within a conceptual tree diagram, calculating scores for potential paths branching from the one or more existing branches, and performing a subsequent redundancy check on a next candidate bit sequence, which corresponds to a potential path that has a next lowest score, to determine if the next candidate bit sequence is compliant.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: May 4, 2010
    Assignee: Intel Corporation
    Inventors: Meir Griniasty, Moti Altahan
  • Patent number: 7676731
    Abstract: A method for retransmitting coded bits by a transmitter in response to a retransmission request from a receiver in a mobile communication system. The method comprises determining a modulation technique to be used at retransmission as a modulation technique having a lower modulation order than a modulation technique used at initial transmission; determining a puncturing pattern according to an HARQ (Hybrid Automatic Repeat Request) type, and selecting as many coded bits as the number of coded bits that can be symbol-mapped by the determined modulation technique, among the coded bits punctured by the determined puncturing pattern; and symbol-mapping the selected coded bits by the determined modulation technique, and transmitting the symbol-mapped coded bits to the receiver.
    Type: Grant
    Filed: November 4, 2002
    Date of Patent: March 9, 2010
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Yong-Suk Moon, Hun-Kee Kim, Jae-Seung Yoon
  • Patent number: 7676732
    Abstract: A method for retransmitting coded bits by a transmitter in response to a retransmission request from a receiver in a mobile communication system. The method comprises determining a modulation technique to be used at retransmission as a modulation technique having a lower modulation order than a modulation technique used at initial transmission; determining a puncturing pattern according to an HARQ (Hybrid Automatic Repeat Request) type, and selecting as many coded bits as the number of coded bits that can be symbol-mapped by the determined modulation technique, among the coded bits punctured by the determined puncturing pattern; and symbol-mapping the selected coded bits by the determined modulation technique, and transmitting the symbol-mapped coded bits to the receiver.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: March 9, 2010
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Yong-Suk Moon, Hun-Kee Kim, Jae-Seung Yoon
  • Patent number: 7653868
    Abstract: A method and apparatus are disclosed for improving the maximum data rate of reduced-state Viterbi detectors with local feedback. The maximum data rate that may be achieved by the disclosed reduced state Viterbi detectors is improved by precomputing a number of candidate branch metrics and performing pipelined selection of an appropriate branch metric. A reduced state Viterbi detector is thus disclosed that precomputes branch metrics for speculative sequences of one or more channel symbols; selects one of said precomputed branch metrics based on at least one decision from at least one corresponding state using at least two pipeline registers; and selects a path having a best path metric for a given state.
    Type: Grant
    Filed: April 11, 2008
    Date of Patent: January 26, 2010
    Assignee: Agere Systems Inc.
    Inventor: Erich Franz Haratsch
  • Patent number: 7640478
    Abstract: A method for decoding tail-biting convolutional codes is disclosed. In the method, all beginning states of a trellis diagram are initialized. Forward Viterbi metrics are calculated for the trellis diagram. A trace-back process is performed from an ending state of the trellis diagram at a first time instance to a first state where all surviving paths converge at a second time instance. Backward Viterbi metrics are calculated for a predetermined period of time from the first state at the second time instance to a second state at a third time instance. A trace-back process is performed from a designated state, which is equal to the second state, at the first time instance to determine a most likely path for the convolutional codes in the trellis diagram.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: December 29, 2009
    Assignee: Cisco Technology, Inc.
    Inventors: Ahmadreza Hedayat, Hang Jin
  • Patent number: 7617440
    Abstract: This invention provides the correct Viterbi decode traceback starting index is obtained for all constraint lengths and frame sizes. Reverse transpose operations that depend on the last active add-compare-select unit a cascade block of the state metric update process. This last active add-compare-select unit controls selection of T counter signals used in the decode.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: November 10, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Tod D. Wolf
  • Patent number: 7587181
    Abstract: Provided is a method and system for controlling current characteristics in a transceiver having a transmitter. The transmitter includes a plurality of current cells. Each cell is configurable for operating in different modes. The method includes determining a first probability associated with transmitting data at a particular symbolic level and determining a second probability associated with each cell being used during a transmission at the particular symbolic level. Next, one of the modes for each cell is selected in accordance with anticipated performance requirements. An average current of the transmitter is then calculated based upon the determined first and second probabilities and the selected modes.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: September 8, 2009
    Assignee: Broadcom Corporation
    Inventors: Yee Ling Cheung, Kevin T. Chan, Jan Mulder
  • Patent number: 7562277
    Abstract: A data transmitting/receiving system adds identifying information to a data packet based on characteristics of the data. The identifying information can be a data type of a payload data of an IP/UDP/RTP packet and/or a temporal data sequence of the payload data. The IP/UDP/RTP packet added with the identifying information is segmented into an IP/UDP/RTP header and IP/UDP/RTP data. The segmented IP/UDP/RTP header and the IP/UDP/RTP data can be transmitted through different channels. A receiver sends retransmission control information based on the added identifying information extracted by the receiver, the retransmission control information providing retransmission time and priority information. A transmitter retransmits reception error occurring IP/UDP/RTP data according to the retransmission control information received by the transmitter.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: July 14, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-hoon Park, Yung-Iyul Lee
  • Patent number: 7530010
    Abstract: A hybrid trace back apparatus and a high-speed Viterbi decoding system having the same are disclosed. The hybrid trace back apparatus includes: a register exchanging unit for receiving survivor values of each states from a path metric calculator, and obtaining a block survival value through a register exchange operation as much as a bit length for a block trace back operation; a first storing unit for the register exchange operation; a second storing unit for storing the block survival value obtained through the register exchange operation until the block survival value is written in a block trace back memory; and a block trace back unit for outputting decoded data by performing a block trace back operation while writing a value of the second storing unit.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: May 5, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: In-San Jeon, Hyuk Kim, Kyung-Soo Kim, Ik-Soo Eo, Hee-Bum Jung
  • Patent number: 7487432
    Abstract: A reduced-state Viterbi detector is disclosed that precomputes branch metrics for a multiple-step trellis for speculative sequences of one or more channel symbols; selects one of said precomputed branch metrics for multi-step state transitions based on at least one multi-step decision from at least one corresponding state; and selects a path having a best path metric for a given state.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: February 3, 2009
    Assignee: Agere Systems Inc.
    Inventors: Jonathan James Ashley, Erich Franz Haratsch
  • Patent number: 7437656
    Abstract: A method for recoding an input sequence of words, including assigning a respective bit-grade to at least one of the bits in a first word in the input sequence, deriving candidate words from the first word in response to the respective bit-grade, and inserting one of the candidate words into each of a plurality of candidate sequences, so that each of the candidate sequences contains one of the candidate words. The method further includes adding subsequent words to the candidate sequences, the subsequent words consisting of a further candidate word derived from a further word in the input sequence, computing respective sequence parameters for the candidate sequences, based on a relation between the candidate words and the subsequent words in the candidate sequences, selecting one of the candidate sequences in response to the sequence parameters, and outputting one of the candidate words contained in the selected candidate sequence.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: October 14, 2008
    Assignee: Mysticom Ltd.
    Inventors: Eyran Lida, Boaz Shahar
  • Publication number: 20080222498
    Abstract: A sequential decoding method and a decoding apparatus are provided. According to the method, an open stack is adopted for storing a plurality of paths. When the codeword generated by an internal decoder in the decoding apparatus is incorrect, a codeword is generated again by using the paths stored in the open stack. Accordingly, the complexity of decoding is reduced.
    Type: Application
    Filed: October 25, 2007
    Publication date: September 11, 2008
    Applicant: SUNPLUS TECHNOLOGY CO., LTD.
    Inventors: Shin-Lin SHIEH, Po-Ning CHEN, Yung-Hsiang HAN
  • Patent number: 7406650
    Abstract: Variable code rate and signal constellation turbo trellis coded modulation (TTCM) codec. The decoding can be performed on signals whose various symbols have been mapped to multiple modulations (constellations and mappings) according to a rate control sequence. The rate control sequence may include a number of rate controls arranged in a period that is repeated during encoding to generate the signal that is subsequently decoded. Either one or both of an encoder that generates the signal and a decoder that decodes the signal may adaptively select a new rate control sequence based on operating conditions of the communication system, such as a change in signal to noise ratio (SNR).
    Type: Grant
    Filed: July 24, 2006
    Date of Patent: July 29, 2008
    Assignee: Broadcom Corporation
    Inventors: Kelly Brian Cameron, Ba-Zhong Shen, Hau Thien Tran
  • Patent number: 7380199
    Abstract: A method and apparatus are disclosed for improving the maximum data rate of reduced-state Viterbi detectors with local feedback. The maximum data rate that may be achieved by the disclosed reduced-state Viterbi detectors is improved by precomputing a number of candidate branch metrics and performing pipelined selection of an appropriate branch metric. A reduced-state Viterbi detector is thus disclosed that precomputes branch metrics for speculative sequences of one or more channel symbols; selects one of said precomputed branch metrics based on at least one decision from at least one corresponding state using at least two pipeline registers; and selects a path having a best path metric for a given state.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: May 27, 2008
    Assignee: Agere Systems Inc.
    Inventor: Erich Franz Haratsch