Abstract: A serial data receiver circuit included in a computer system may include a front-end circuit, a sample circuit that includes multiple analog-to-digital converter circuits, and a recovery circuit. The front-end circuit may generate an equalized signal using multiple signals that encode a serial data stream of multiple data symbols. Based on a baud rate of the serial data stream, a determined number of the multiple analog-to-digital converter circuits sample, using a recovered clock signal, the equalized signal at the respective times to generate corresponding samples. The recovery circuit generates, using the samples, the recovered clock signal and recovered data symbols.

Abstract: Cohort definition and selection system for a computer having a memory, a central processing unit and a display, the system including: a cohort definition module to configure the memory according to a phenotype vector. The phenotype vector includes a patient ID to uniquely associate the phenotype vector to a patient, a plurality of demographic dimension fields, each demographic dimension field to describe a respective demographic aspect of the patient, a calculated dimension field to describe a calculated information related to the patient, a plurality of phenotype-based dimension fields, each phenotype-based dimension field to indicate relevance of the respective phenotype-based dimension field to the patient, and a child phenotype vector to recursively define a phenotype-based dimension field, and a cohort selection module to select a set of phenotype vectors that are within a predetermined error from a cohort selection criteria.

Abstract: A method for processing a stream of data represented by a plurality of symbols associated with a constellation. The method includes applying a symbol constellation extension projection to at least one of the plurality of symbols, the symbol constellation extension projection having an outward angular region, the outward angular region defined by a value of an angle, and the value of the angle equal to or less than an angular distance between two symbols in the constellation. The value of the angle is based on a constellation and a code rate used for encoding and transmitting the stream of data.

Abstract: An example device includes processing circuitry configured to determine a first state of a data structure, the first state representing a first quantizer applied to a previously quantized or inverse quantized value of a previous transform coefficient of residual data for a block of the video data and update the data structure to a second state according to the first state and a parity of a partial set of syntax elements representing a partial set of a plurality of coefficient levels for the previous transform coefficient. The processing circuitry is further configured to determine a second quantizer to be used to quantize or inverse quantize a current value of a current transform coefficient according to the second state of the data structure and quantize or inverse quantize the current value of the current transform coefficient using the second quantizer.

Abstract: In various embodiment, the disclosed systems, methods, and apparatuses describe extending the usage spectrum for cable networks (e.g., hybrid fiber-coaxial networks). In particular, embodiments of the disclosure described determining a first portion of a signal having a first frequency band, the first frequency band being greater than approximately 1.2 GHz; determining a second portion of the signal having a second frequency band, the second frequency band being less than or equal to approximately 1.2 GHz; applying an attenuation to the first portion of the signal; and transmitting the second portion of the signal at a flat power-spectral density. Various other related systems, methods, and apparatuses are described.

Abstract: A turbo decoder circuit performs a turbo decoding process to recover a frame of data symbols from a received signal comprising soft decision values for each data symbol of the frame. The data symbols of the frame have been encoded with a turbo encoder comprising upper and lower convolutional encoders which can each be represented by a trellis, and an interleaver which interleaves the encoded data between the upper and lower convolutional encoders. The turbo decoder circuit comprises a clock, a configurable network circuitry for interleaving soft decision values, an upper decoder and a lower decoder.

Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). A method of decoding a signal in a communication system includes receiving an encoded bit-stream corresponding to message bits and first Cyclic Redundancy Check (CRC) bits, obtaining a codeword through a traceback for at least part of the encoded bit-stream, generating second CRC bits by performing CRC encoding on the codeword, and performing decoding based on at least part of the second CRC bits.

Abstract: A multi-core audio processor includes a data protocol interface configured to receive a stream of audio data, a plurality of data processing cores including a single sample processing core and a block data processing core, an audio fabric block configured to route samples of the stream between the data protocol interface and the plurality of data processing cores. The single sample processing core includes an execution unit configured to execute one or more low latency instructions for performing computations for the samples.

Abstract: A multi-core audio processor includes an audio fabric block configured to organize data received from a plurality of audio interfaces into streams for processing by a plurality of digital signal processing cores. The plurality of digital signal processing cores include a single sample processing core and a frame processing core. The multi-core audio processor also includes a pool of undedicated random access memory (RAM) and a main controller configured to dynamically allocate memory resources from the pool of undedicated RAM amongst one or more of the plurality of digital signal processing cores.

Abstract: The present application discloses a forward and backward smooth decoding method and device suitable for an OvXDM system, and a system. Importance weights of particles in a particle set corresponding to a symbol are calculated by using a forward process and a backward process, and screening is performed with reference to forward importance weights of particles and backward importance weights of particles, to output a final decoding sequence.

Abstract: A multiple access scheme is provided. A first communications terminal encodes a first data stream using a forward error correction (FEC) code, and scrambles the encoded first data stream based on a first scrambling signature. A second communications terminal encodes a second data stream using the FEC code, and scrambles the encoded second data stream based on a second scrambling signature. The first scrambling signature and the second scrambling signature are used, respectively, by the first terminal and the second terminal to distinguish the first encoded data stream from the second encoded data stream as respectively originating from the first terminal and the second terminal in a multiple access scheme, whereby the first encoded data stream and the second encoded data stream simultaneously share a wireless communications channel. The FEC code is a low density parity check (LDPC) code configured with a data node degree of two or three.

Abstract: Sequence detectors and detection methods are provided for detecting symbol values corresponding to a sequence of input samples obtained from an ISI channel. The sequence detector comprises a branch metric unit (BMU) and a path metric unit (PMU). The BMU, which comprises an initial set of pipeline stages, is adapted to calculate, for each input sample, branch metrics for respective possible transitions between states of a trellis. To calculate these branch metrics, the BMU selects hypothesized input values, each dependent on a possible symbol value for the input sample and L>0 previous symbol values corresponding to possible transitions between states of the trellis. The BMU then calculates differences between the input sample and each hypothesized input value. The BMU compares these differences and selects, as the branch metric for each possible transition, an optimum difference in dependence on a predetermined state in a survivor path through the trellis.

Abstract: The disclosure may provide for a communication method and system. A transmitter of the communication system may include an interleaver and a first encoder for determining parity bits. The transmitter also may include a multiplexer for joining the parity bits with the data. A second encoder may be positioned after the multiplexer for implementing an error correcting code. A receiver of the communication system may include a decoder followed by an interleaver. When errors are detected in received data at the decoder, one or more processors of the receiver may be configured to correct portions of the received data and combine the corrected portions with the received data.

Abstract: Sequence detectors and detection methods are provided for detecting symbol values corresponding to a sequence of input samples obtained from an ISI channel. The sequence detector comprises a branch metric unit (BMU) and a path metric unit (PMU). The BMU, which comprises an initial set of pipeline stages, is adapted to calculate, for each input sample, branch metrics for respective possible transitions between states of a trellis. To calculate these branch metrics, the BMU selects hypothesized input values, each dependent on a possible symbol value for the input sample and L>0 previous symbol values corresponding to possible transitions between states of the trellis. The BMU then calculates differences between the input sample and each hypothesized input value. The BMU compares these differences and selects, as the branch metric for each possible transition, an optimum difference in dependence on a predetermined state in a survivor path through the trellis.

Abstract: A DTV transmitting system includes a frame encoder, a randomizer, a block processor, a group formatter, a deinterleaver, and a packet formatter. The frame encoder builds an enhanced data frame and adds parity data into the data frame. The frame encoder further divides the data frame into first and second sub-frames including first and second portions of the parity data, respectively, and permutes a plurality of the first sub-frames and a plurality of the second sub-frames, respectively. The randomizer randomizes enhanced data in the permuted sub-frames, and the block processor codes the randomized data at a rate of 1/N1. The group formatter forms a group of enhanced data having one or more data regions and inserts the 1/N1 coded data into at least one of the data regions. The deinterleaver deinterleaves the group of enhanced data, and the packet formatter formats the deinterleaved data into enhanced data packets.

Abstract: A method at a mobile device, the method comprising: receiving one or more data symbols; determining reduced symbols for each of the data symbols, the reduced symbols corresponding to each of at least two orthogonal components of the data symbols; and, storing the reduced symbols in a symbol buffer.

Abstract: An image decoding method including: obtaining an old quantization scaling matrix which is a decoded quantization scaling matrix and is used for decoding a new quantization scaling matrix; obtaining, from the coded stream, an update parameter indicating an amount of change in the new quantization scaling matrix with respect to the old quantization scaling matrix; decoding the new quantization scaling matrix using the old quantization scaling matrix obtained in the obtaining of an old quantization scaling matrix and the update parameter obtained in the obtaining of an update parameter; and decoding the coded image using the new quantization scaling matrix decoded in the decoding of the new quantization scaling matrix.

Abstract: A method, system, and computer program product for performing robust, parallel data transfer by a processor device. Data is segmented into k-bit segments, where k?1. The k-bit segments are convolution encoded, using m?1 stages of delay. The n output streams are transmitted in parallel for increased effective data rate, where n>k. The n output streams are received. The n output streams are exclusive-or'ed with pathing allowed by the convolution encoding, in a trellis-decoding diagram. Error-corrected data is identified as an overall path in the trellis-decoding diagram with zero Hamming radius.

Abstract: A circuit and a method are used estimate quality of the output of a wireless receiver. This quality measure is used to control the supply voltage and thereby provide power savings.

Abstract: A method includes initiating a first decode operation of data at an error correction code (ECC) hard bit decoder in a data storage device that includes a controller and a memory. The method further includes, in response to the first decode operation indicating that the data is uncorrectable by the first decode operation, identifying one or more bits of the data that correspond to a disturb condition test pattern, changing a value of the one or more identified bits of the data to generate modified data, and initiating a second decode operation at the ECC hard bit decoder using the modified data.

Abstract: The present invention provides a method of processing data. The method of processing data includes receiving a broadcasting signal where mobile service data are multiplexed with main service data, extracting transmission-parameter-channel signaling information and fast-information-channel signaling information from a data group within the received mobile service data; obtaining first program table information describing virtual channel information of an ensemble and a service provided by the ensemble using the fast-information-channel signaling information, the ensemble the ensemble corresponding to a virtual channel group of the received mobile service data, obtaining information indicating that second program table information, which describes an additional service provided by the ensemble, is included in the ensemblem and parsing the second program table information according to the obtained information; and providing the additional service by using the second program table information.

Abstract: Systems and methods are disclosed for decoding solid-state memory cells using one-read soft decision decoding. A controller of a data storage device is configured to perform a first decoding of a first code word based at least in part on data associated with a reading of the first code word, and to detect a decoding failure associated with the first decoding. The controller determines reliability information for decoding the first code word in response to the decoding failure based at least in part on data associated with a successful decoding of a second code word and performs a second decoding of the first code word based at least in part on the reliability information.

Abstract: A digital broadcasting system and a method for transmitting and receiving digital broadcast signal are disclosed. The method of processing a digital broadcast signal comprises encoding signaling information for mobile data, forming data groups including mobile data, a plurality of long known data sequences, a plurality of segmented known data sequences and the encoded signaling information, interleaving data in the data groups, transmitting the digital broadcast signal including the data groups having the interleaved data, and wherein the signaling information includes concatenation information indicating whether the segmented known data sequences are concatenated between the data groups included in the digital broadcast signal.

Abstract: A data communications network in which a first information-containing radio frequency signal input is applied to a modulation circuit for modulating a carrier wave with the signal input, and a second information-containing radio frequency signal is applied to at the modulation circuit for modulating least one of the constellation points of the first modulation.

Abstract: Methods, software, circuits and systems involving a low complexity, tailbiting decoder. In various embodiments, the method relates to concatenating an initial and/or terminal subblock of the serial data block and outputting decoded data from an internal block of the modified data block. The circuitry generally includes a buffer, logic configured to concatenate an initial and/or terminal subblock to the serial data block, and a decoder configured to decode the data block, estimate starting and ending states for the data block, and output an internal portion of the serial data block and the one or more sequences as decoded data. The invention advantageously reduces the complexity of a suboptimal convolutional decoder, ensures smooth transitions at the beginning and end of the serial data block during decoding, and increases the reliability of the starting and ending states, without adding overhead to the transmitted data block.

Abstract: Improved systems and methods for delivering CATV content over a fiber optic network from a transmitter.

Abstract: In a solid state memory device, codewords stored in a unit of the memory device are decoded using an error correcting iterative decoding process. An average number of iterations needed for successfully decoding codewords of the unit is determined, and the average number of iterations is monitored. The average number of iterations can be taken as a measure of wear of the subject unit.

Abstract: A novel framing method for a variable net bit rate digital communications system that utilizes a set of different QAM constellations and punctured trellis code combinations, each combination designated as a mode. This frame structure has a variable integral number of QAM symbols per frame depending on the selected mode, but the number of bytes and Reed-Solomon packets per frame is constant. This is achieved even though the number of data bits per QAM symbol for some modes is fractional. Also the number of trellis coder puncture pattern cycles per frame is an integer for all modes. This arrangement simplifies the synchronization of receiver processing blocks such as the Viterbi decoder, de-randomizer, byte de-interleaver, and Reed-Solomon decoder.

Abstract: A method of detecting a bit sequence, includes estimating parameters to be used to determine a probability distribution of a present signal in each of states of a present time, and calculating metrics of the respective states based on the parameters. The method further includes selecting survivor states from the states based on the metrics, and detecting the bit sequence based on a path to each of the survivor states.

Abstract: Systems and techniques for decoding are described. A described technique includes receiving coded bit streams that are differently encoded versions of an original bit stream, the coded bit streams including coded bits that are based on the original bit stream, where the coded bit streams have different encoding rates; identifying, within the coded bit streams, repeated coded bits of a coded bit of the coded bits that has been repeated N times; combining the coded bit streams to produce a combined bit stream by at least combining the repeated coded bits into a combined coded bit; determining, without multiplying by a normalization factor that is based on N, a bit metric for the combined coded bit that is a function of N; and decoding the combined bit stream by at least using the bit metric.

Abstract: A method and apparatus for Turbo encoding uses a set of rate-compatible Turbo Codes optimized at high code rates and derived from a universal constituent code. The Turbo Codes have rate-compatible puncturing patterns. The method comprises: encoding a signal at a first and second encoder using a best rate ½ constituent code universal with higher code rates, the first encoder and the second encoder each producing a respective plurality of parity bits for each information bit; puncturing the respective plurality of parity bits at each encoder with a higher rate best puncturing patterns; and puncturing the respective plurality of parity bits at each encoder with a lower rate best puncturing pattern. In a variation, the best rate ½ constituent code represents a concatenated of polynomials 1+D2+D3 (octal 13) and 1+D+D3 (octal 15), D a data bit. A Turbo Encoder is provided which has hardware to implement the method.

Abstract: A method for performing data shaping is applied to a controller of a Flash memory, where the Flash memory includes a plurality of blocks. The method includes: performing a program optimization operation according to original data and a plurality of shaping codes, in order to generate trace back information corresponding to a Trellis diagram and utilize the trace back information as side information; and dynamically selecting at least one shaping code from the shaping codes according to the side information to perform data shaping on the original data.

Abstract: In an arrangement of the disclosed systems, devices, and methods, a codeword encoded with a first number of check symbols is received and asymmetrically processed according to a second number of check symbols, where the second number of check symbols is less than the first number of check symbols, to produce an error locator polynomial and an error evaluator polynomial. A derivative of the error locator polynomial is produced by outputting a first polynomial term and a second polynomial term, wherein the second polynomial term is a constant. The derivative of the error locator polynomial is produced using a variable finite-field multiplier and without use of a divider.

Abstract: Methods for programming memory cells. One such method for programming memory cells includes generating an encoded stream using a data stream and programming the memory cells using the encoded stream to represent the data stream. A particular bit position of the encoded stream has a first voltage level when the particular bit position of the data stream has a particular logical state, and the particular bit position of the encoded stream has either a second voltage level or a third voltage level when the particular bit position of the data stream has a logical state other than the particular logical state.

Abstract: A decoding apparatus has an on-chip buffer, an external buffer interface, and a turbo decoder. The on-chip buffer is arranged for buffering each code block to be decoded. The external buffer interface is arranged for accessing an off-chip buffer. The turbo decoder is arranged for decoding a specific code block read from the on-chip buffer. The specific code block is not transmitted from the on-chip buffer to the off-chip buffer via the external buffer interface unless decoding fail of the specific code block is identified.

Abstract: In one embodiment, systems and methods of operating a SOVA system is disclosed that comprises determining the start and stop values for a trellis tree and using the start and stop values to determine the initial states of a plurality of branches within the trellis tree.

Abstract: Systems and methods for power efficient iterative equalization on a channel are provided. An iterative decoder decodes received data from a channel detector using a decoding process. The decoder computes a decision metric based on the decoded data and adjusts the number of iterations of the decoding process based on the decision metric. The adjustment occurs prior to a reliability criterion for the decoded data being satisfied. The decoder may pass control back to the channel detector if the adjusted number of iterations has occurred or if the reliability criterion is satisfied. Adjusting the number of iterations of the decoding process may include increasing the number of iterations from a predetermined number of iterations. The decision metric may be based on syndrome weight or hard decisions. The decision metric may be chosen to reduce average power consumption of the detector, the decoder, or circuitry including the detector and the decoder.

Abstract: Embodiments of decoding data stored in solid-state memory arrays are disclosed. In one embodiment, multiple read operations are performed while taking inter-cell interference (ICI) into account. Soft-decision information, such as log-likelihood ratios (LLRs), is determined by using known data and its corresponding multi-read output. Soft-decision information is provided to a detector. Reliability is improved and performance is increased.

Abstract: A digital broadcasting system which is robust against an error when mobile service data is transmitted and a method of processing data are disclosed. The mobile service data is subjected to an additional coding process and the coded mobile service data is transmitted. Accordingly, it is possible to cope with a serious channel variation while applying robustness to the mobile service data.

Abstract: A method for improving the data rate of data for M/H receivers and for improving the quality of channel estimation in an ATSC-M/H transport data stream marks the transport data packets determined for the transmission of data for M/H receivers in N (e.g., 38) consecutively transmitted transport data packets in an ATSC-M/H-slot of the uncoded ATSC-M/H transport data stream originally determined for the transmission of data for stationary receivers. Coded data for M/H receivers are inserted in the marked transport data packets and introduce training sequences in segments of data fields of the coded ATSC-M/H transport data stream containing marked transport data packets.

Abstract: A low-density parity check (LDPC) decoder is provided that eliminates the need to calculate customized check node codeword estimates by considering the check node processor and the variable node processor as a single processer having a shared memory for storing common variables to be used during both the check node processing and the variable node processing of the iterative decoding method.

Abstract: Methods and apparatus for trellis termination of a turbo decoder are disclosed which simplifies the hardware implementation. As a given example, backward state metrics, which is required to be calculated with forward state metric as part of a constitute decoding, are initialized with pre-calculated values based on input bits.

Abstract: Techniques are provided for performing joint equalization and decoding of multidimensional codes transmitted over multiple symbol durations. A reduced state sequence estimation (RSSE) decoder is provided for a multidimensional code. A multidimensional code symbol comprises a number of symbol components of lower dimensionality. The RSSE decodes comprises at least one branch metric unit that calculates branch metrics for a received signal based on intersymbol interference and intrasymbol interference estimates, the at least one branch metric unit compensating for intrasymbol interference caused by symbol components within a current multidimensional code symbol; and a decision feedback unit that processes survivor symbols to calculate the intersymbol interference estimates for different code states of the multidimensional code and channels used to transmit the multidimensional code.

Abstract: Methods and apparatus are provided for encoding input data for recording in s-level storage of a solid state storage device, where s f 2. Input data words are encoded in groups of M input data words in accordance with first and second BCH codes to produce, for each group, a set of M first codewords of the first BCH code. The set of M first codewords is produced such that at least one predetermined linear combination of the M first codewords produces a second codeword of the second BCH code, this second BCH code being a sub-code of the first BCH code. The sets of M first codewords are then recorded in the s-level storage. If each of the first and second codewords comprises N q-ary symbols where q=pk, k is a positive integer and p is a prime number, the q-ary code alphabet can be matched to the s-ary storage by ensuring that q and s are uth and vth powers respectively of a common base r, where u and v are positive integers and k f u, whereby p(k/u)v=s.

Abstract: A state metric calculator for calculating state metrics of stages in a trellis of a sequence estimation technique is described. The calculator has a processing path containing operations needed for calculating a state metric of a trellis stage from state metrics of an earlier trellis stage. One or more data stores are located in the processing path to divide the path into separate sections. The sections can then operate on the production of different state metrics to one another in, if desired, the same clock cycle.

Abstract: An iterative decoder for decoding a code block comprises a computation unit configured to perform forward and backward recursions over a code block or a code sub-block in each decoding iteration. A first forward/backward decoding scheme is used in a first iteration and a second forward/backward decoding scheme is used in a second iteration. The first and second decoding schemes are different in view of forward and backward processing.

Abstract: A receiver configured for use in a communication system, such as a magnetic recording channel, and having a soft-output channel detector provided with a soft-input/soft-output (SISO) modulation codec for parity bits of a block error-correction code. A transmitter of the communication system is configured to encode data by applying a modulation code to the parity bits that have been generated using the block error-correction code. The SISO modulation codec provides an interface between the soft-output channel detector and a parity-check decoder that enables decoding iterations between them in a manner that takes into account inter-bit correlations imposed by the modulation code. In some embodiments, the soft-output channel detector is configured to operate at a fractional rate and to process an input signal carrying non-binary symbols, and the parity-check decoder is configured to apply parity-check-based decoding that is based on a non-binary low-density parity-check code.

Abstract: Methods and apparatuses for combining error coding and modulation schemes are described herein. One or more methods include encoding data using linear error correcting code, modulating the encoded data, writing the modulated data to memory, and decoding the written data using a Viterbi algorithm and a linear error correcting code decoder.

Abstract: Apparatus having corresponding methods and storage devices comprise: an iterative decoder configured to generate codewords based on input samples, wherein the iterative decoder is further configured to perform a number of decoding iterations for each codeword, wherein the number of decoding iterations is an integer greater than zero, and wherein the number of decoding iterations does not exceed a limit number; and a sensor configured to generate one or more measurements of a physical variable, wherein the limit number is set in accordance with the one or more measurements generated by the sensor.

Abstract: Provided is a receiver for processing VSB signal. The receiver includes a first equalizer/decoder unit and a second equalizer/decoder unit. The first equalizer/decoder unit performs a first equalizing operation, first TCM decoding and first RS decoding on a received symbol to output a first dibit. The second equalizer/decoder unit performs a second equalizing operation, second TCM decoding and second RS decoding on the received symbol to output a transport stream. The first dibit is provided as a priori information for a soft-decision operation of the second TCM decoding.