Abstract: A decoding device that performs decoding of data transmitted from each of a plurality of users comprises an iterative decoding section that repeats decoding of the data until no error is detected in a result of decoding, an error detection section that performs error detection on the decoding result each time decoding is performed, and a decoding order control section that estimates with respect to each of the plurality of users a decoding completion time, which is a time period required until no error is detected in the result of decoding of the data transmitted from the user, and that assigns priorities to the users in increasing order of the estimated decoding completion time. The iterative decoding section performs decoding of the data transmitted from the users in descending order of the priorities.

Abstract: An electric circuit device operable under a first power supply includes: a first circuit; a switch connecting the first circuit with the first power supply; a second circuit for producing a signal output; a control signal output unit for outputting a control signal in accordance with the signal output of the second circuit, wherein while the first circuit is supplied with a first power supply voltage via the switch by supplying of a driving voltage to the switch, the supply of the driving voltage is temporality cut off in response to the control signal.

Abstract: Systems and methods to mitigate impulse noise are provided. A particular method includes providing a signal from a transmission source to a mitigator. The mitigator checks the signal for complex impulse noise comprising at least a first periodic impulse noise component correlated to a first portion of a sinusoid representing frequency of an alternating current power source associated with the transmission source and a second periodic impulse noise component correlated to a second portion of the sinusoid. The method further includes receiving noise mitigation instructions from the mitigator at the transmission source to compensate for the complex impulse noise.

Abstract: In a semiconductor test apparatus, a voltage source generates a power supply voltage to be supplied to a DUT. A decision processor makes the DUT execute a predetermined test sequence. A noise generator superimposes a periodic pulse-like noise voltage on the power supply voltage to be supplied to the DUT, while the test sequence is being executed. The noise generator superimposes a noise voltage synchronized with a clock signal to be supplied to the DUT.

Abstract: A digital data recovery system for converting a suboptimal signal into a converted signal that closely approximates an original signal includes a first data filter, a first interpolator and a second interpolator. The first data filter filters the suboptimal signal to generate a first filtered signal. The first interpolator receives the first filtered signal and generates a first interpolated signal. Substantially concurrently, the second interpolator receives the suboptimal signal and generates a second interpolated signal. The digital data recovery system may further comprise a second data filter that receives the second interpolated signal and generates a second filtered signal. Further, the first data filter can include a set of first coefficients and the second data filter can include a set of second coefficients. Moreover, the second coefficients can be updated and subsequently transformed in order to update the first coefficients.

Abstract: Data receiver circuitry in the device is provided with one or more error signal output leads. An error signal on such a lead includes an error indication as soon as possible after the associated low level circuitry detects a data error. The timing of such an error indication is compared to the timing of noise from various possible noise sources in the device. The noise source that produced significant noise closest in time prior to the error indication is identified as the noise source responsible for the data error that caused the error indication.

Abstract: A network communication device includes a host interface, which is coupled to communicate with a host processor, having a memory, so as to receive a work request to convey one or more data blocks over a network. The work request specifies a memory region of a given data size, and at least one data integrity field (DIF), having a given field size, is associated with the data blocks. Network interface circuitry is configured to execute an input/output (I/O) data transfer operation responsively to the work request so as to transfer to or from the memory a quantity of data that differs from the data size of the memory region by a multiple of the field size, while adding the at least one DIF to the transferred data or removing the at least one DIF from the transferred data.

Abstract: A method and apparatus for deinterleaving in a communication system is disclosed. The method and apparatus deinterleave data units using a data deinterleaver; compressed deinterleave input symbol quality information (SQI) units using a compressed deinterleaver, wherein at least one of the input SQI units deinterleaved by the compressed deinterleaver corresponds to at least one of the plurality of data units deinterleaved by the data deinterleaver; and apply the deinterleaved SQI units to the corresponding deinterleaved data units.

Abstract: A method of recovering data in a line signal which is predicted to be subjected to repetitive noise impulses, the line signal comprising a series of data frames, the method comprising the steps of: predicting a group comprising one or more frames in said line signal which are expected to be corrupted by a noise signal; blanking said group of one or more frames which are predicted to be corrupted; determining the preceding and succeeding frames adjacent to said group; and including in each said group of one or more frames one or more parity blocks wherein if said noise signal deviates from its predicted timing interval or duration and corrupts the data carried in one or more of said frames adjacent to said group, the corrupted data is recovered using one or more of said parity blocks of said group of blanked frames and the other one of said adjacent frames.

Abstract: Errors induced by noise pulses in digital electronic circuits clocked with a clock signal are detected by providing at least one additional clock signal offset in time with respect to the clock signal by a given interval, and performing for at least one component of the circuit a comparison of correspondence between two versions of one and the same signal. The comparison is clocked by the additional clock signal and the absence of correspondence between the two versions of said signal identifies an error induced in the circuit by a noise pulse.

Abstract: A semiconductor integrated circuit system has a control target circuit executing a program, a system information monitor unit for outputting system information indicating a state of the control target circuit, a circuit characteristic monitor unit for determining a circuit characteristic of the control target circuit and outputting the circuit characteristic as circuit characteristic information, a malfunction determination unit for determining whether or not the control target circuit is normally operating based on the system information, a reference circuit characteristic holding unit for holding the circuit characteristic information as reference circuit characteristic information when the control target circuit is normally operating, a malfunction factor determination unit for determining a malfunction factor based on the circuit characteristic information and on the reference circuit characteristic information when the control target circuit is not normally operating, and a correction target determinatio

Abstract: A method for configuring a biometric template protected authentif ication system, in which the desired classification threshold (T) is first selected to optimize the trade-i off between FAR and FRR of the system, and then the ECC used in the authentif ication process is chosen such that the number (b) of errors which can be corrected thereby is equal to or greater than the selected classification threshold. During authentif ication, the number (b) of errors in a first codeword derived from biometric data associated with a physical object is determined and used in the decision process to accept or reject authentif ication.

Abstract: In a method for detecting anomalies in a sensor-networked environment, packages of data are received from a plurality of sensors located in the environment. At least one candidate problem location in the environment is identified based upon data contained in the packages. A principal components analysis is performed on the data collected from sensors associated with the identified at least one candidate problem location to identify a number of hidden variables and the number of hidden variables are analyzed to detect anomalies in the environment. In addition, detected anomalies are outputted. An analyzer for performing the method is provided.

Abstract: The invention relates to a circuit for comparing two n-digit binary data words x[1](t), . . . , x[n](t) and x?[1](t), . . . , x?[n](t), which in the error-free case are either identical or inverted bit-by-bit with respect to each other, with a series connection of a combinatorial circuit for implementing a first combinatorial function, a controllable register and a combinatorial circuit for implementing another combinatorial function.

Abstract: Processing a coded signal formed so that multiple signal points, having individual signal values consonant with coded values, are arranged in accordance with a predetermined order. A signal restoration unit calculates an average value for signal values at signal points immediately preceding and following a predetermined signal point. The predetermined signal point comprises the coded signal. The signal restoration unit calculates, for selected preceding signal points, a signal value difference for the two selected signal points, and obtains first difference values. The signal restoration unit calculates, for selected following signal points, a signal value difference for the two selected signal points, and obtains second difference values. The signal restoration unit corrects the average value by employing either one or a plurality of either the first or the second, or both first and second difference values to obtain a restored value for a signal value at the predetermined signal point.

Abstract: A facsimile machine receives image data from a facsimile machine of another end. A Random Access Memory (RAM) stores a measured average value and fluctuation of an Eye Quality Monitor (EQM) value of the image data, and a number of error lines of the image data as an EQM data table. In past facsimile communication, a main control unit receives a training signal from the facsimile machine of the other end, and executes a training process. The main control unit measures an average value and fluctuation of an EQM value of the training signal, and compares the measured average value and the fluctuation of the EQM value with the average value and the fluctuation of the EQM value stored in the EQM data table. When there is no match, the main control unit executes the training process again.

Abstract: In a signal transmission medium such as an ac power line, impulse noise in the line may be dealt with by detecting impulse noise in the transmission medium, determining whether the impulse noise is periodic or complex, and, at least approximately, correlating the time at which periodic impulse noise occurs in the transmission medium to the phase of the ac power line frequency. One or more noise mitigation techniques may be applied with respect to the impulse noise. Methods also include predicting at least the approximate time of the next periodic noise impulse, and at least its approximate occurrence in the phase of the ac power line frequency. Methods also address impulse noise in complex impulse conditions.

Abstract: A method and apparatus provide a receiver with an architecture to regulate a bit error rate of the receiver using an offset based on detecting false transitions in received data. In an embodiment, such false transitions in data may be determined in a bang-bang detector.

Abstract: According to one embodiment a computer system is disclosed. The computer system includes a bus and a chipset coupled to the bus. The chipset detects the slew rate of a signal transmitted over the bus by the chipset. In addition the chipset adjusts the slew rate based upon the state of the signal.

Abstract: A device for estimating a likelihood of a wireless link outage includes a memory, a variability calculator, and an outage predictor. The memory maintains a history of signal quality for a signal received from a transmitter. The variability calculator is coupled to the memory. The variability calculator computes a variability statistic for the history of signal quality maintained in the memory. The outage predictor is coupled to the variability calculator. The outage predictor estimates the likelihood of the wireless link outage in direct proportion to the variability statistic.

Abstract: A semiconductor integrated circuit having a plurality of wirings and a scan chain including a testing circuit configured to detect glitch noise caused by crosstalk between the wirings and a plurality of scan flip-flops connected in series, the semiconductor integrated circuit includes a retention circuit receiving a data signal propagating a test-subject wiring, and a detection circuit receiving the data signal and an output signal of the retention circuit, detecting glitch noise occurring in the data signal, and delivering an output signal to the retention circuit.

Abstract: A method for detecting anomalies in a digitized complex signal analyzed by a detection unit, including a machine learning and a diagnosis of the intensity and/or the rarity of an anomaly, the learning including the steps of: 1.1 selecting sequences of values of the signal; 1.2 transforming the signal to extract therefrom characteristics of a type easily extracted by a human eye; and 1.3 reducing number n of digital data by an automatic compression; the diagnosis including the steps of: 2.1 applying steps 1.1 to 1.3 to a polling window (Fk) likely to include an anomaly; 2.2 comparing the obtained vector with a reference defined according to the same transformation and compression structure.

Abstract: An inventive information processor performs a predetermined process substantially continuously without causing runaway in its CPU even if extraneous noise has entered the power supply terminal thereof. When the incoming noise reaches relatively low Level 1(L), important information, determining the state of the CPU, is protected by saving it on a register. Thereafter, when the noise level exceeds Level 1(H), important information, representing the status of the predetermined process, is protected by storing it on a memory. Subsequently, when the noise level reaches Level 2, the CPU is suspended. And when the noise has decreased to less than Level 1(L), the predetermined process is resumed in accordance with the information saved and protected on the register and memory. Accordingly, even if noise has entered, the predetermined process can be continued without causing runway in the CPU after having been suspended for a while.

Abstract: An application specific integrated circuit includes a clock recovery circuit which recovers from an input signal a repetitive sequence of data values wherein no two consecutive values are the same and a recovered clock. An address generator responds to the recovered clock to cause storage of the data values in said memory in a set of locations having addresses generated by the address generator, so that the address generated by the generator increments in response to a repetitive transition in the recovered clock. The existence of a clock glitch is found by reading the data values from the set of locations to determine whether any two consecutive locations contain the same data value.

Abstract: Method of optimising the size of blocks of coded data, intended to be subjected to iterative decoding, the method comprising a first step evaluating a resource (T) available for the decoding of a block of normal size (N) and a second step seeking, amongst a plurality of block sizes (N/k) which are submultiples of the normal size by an integer factor (k) greater than or equal to 1 and requiring on average a number of iterations ({overscore (n)}iterations) compatible with the said available resource, the one which makes it possible to obtain the lowest error rate at the output of the iterative decoding.

Abstract: A semiconductor memory device includes: a determination section; an expected value control section; and an accumulation section. The determination section determines coincidence/non-coincidence between input data and an expected value. The expected value control section catches a read expected value in a read operation only. The accumulation section catches a determination result according to an accumulation-transmission signal. When the accumulation-transmission signal is in a transmission state, a determination result is caught, while when the accumulation-transmission signal enters an accumulation state, the next determination result is caught in a case of coincidence determination and once a non-coincidence determination result is caught, thereafter the non-coincidence determination result continues to be held.

Abstract: An apparatus and a method for checking that an electronic circuit device or an electronic circuit component such as an LSI operates normally or abnormally by applying an input pattern to the electronic circuit device or the electronic circuit component together with electromagnetic noises before comparing an obtained output pattern with an expected pattern so as to judge whether or not the patterns match in order to evaluate immunity to electromagnetic noises (conductive or radiation noises).