Error/fault Detection Technique Patents (Class 714/799)
  • Patent number: 10331514
    Abstract: Apparatuses and methods for performing an error correction code (ECC) operation are provided. One example method can include performing a first error code correction (ECC) operation on a portion of data, performing a second ECC operation on the portion of data in response to the first ECC operation failing, and performing a third ECC operation on the portion of data in response to the second ECC operation failing.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: June 25, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Mustafa N. Kaynak, Patrick R. Khayat, Sivagnanam Parthasarathy
  • Patent number: 10313054
    Abstract: A communication device (alternatively, device) includes a processor configured to support communications with other communication device(s) and to generate and process signals for such communications. In some examples, the device includes a communication interface and a processor, among other possible circuitries, components, elements, etc. to support communications with other communication device(s) and to generate and process signals for such communications. In some examples, a device encodes information using a low density parity check (LDPC) code to generate an LDPC coded signal and transmits the LDPC coded signal to another communication device. in other examples, a device receives an LDPC coded signal from another communication device and decodes the LDPC coded signal using an LDPC matrix. The LDPC matrix includes a left hand side matrix and a right hand side matrix (e.g., having CSI (Cyclic Shifted Identity) sub-matrices on a main diagonal and another diagonal adjacently located to the main diagonal).
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: June 4, 2019
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Ba-Zhong Shen, Matthias Korb, Andrew John Blanksby, Ron Porat
  • Patent number: 10298430
    Abstract: A transmission apparatus includes a transmission signal generator which, in operation, generates a transmission signal having an aggregate physical layer protocol data unit (PPDU) that includes a legacy preamble, a legacy header, a non-legacy preamble, a plurality of non-legacy headers and a plurality of data fields; and a transmitter which, in operation, transmits the generated transmission signal, wherein the legacy preamble, the legacy header and the plurality of non-legacy headers are transmitted using a standard bandwidth, the non-legacy preamble and the plurality of data fields are transmitted using a variable bandwidth that is larger than the standard bandwidth and wherein a plurality of sets of each of the plurality of non-legacy headers and each of the plurality of data fields are transmitted sequentially in a time domain.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: May 21, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Lei Huang, Hong Cheng Michael Sim, Takenori Sakamoto
  • Patent number: 10269194
    Abstract: It is possible to achieve monitoring of a processor element while suppressing the cost. A multiprocessor system 1 includes a bus mechanism including a storage unit 6 configured to store bus access information when a first processor element 2 has executed a process to be monitored, a requesting unit 7 configured to request a second processor element 3 to execute a monitoring process after the first processor element 2 has completed the execution of the process to be monitored, and a comparing unit 8 configured to compare bus access information regarding access of the first processor element 2 stored in the storage unit 6 with bus access information input from the second processor element 3 when the second processor element 3 has executed the monitoring process. The second processor element 3 executes the monitoring process in an idle time.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: April 23, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Naotaka Kawakami
  • Patent number: 10256986
    Abstract: A system and method for recovering missed Multimedia Broadcast and Multicast Service (MBMS) data frames in a Multicast Broadcast Single Frequency Network (MBSFN) is provided. The method includes storing a first set of Service Data Units (SDUs) in a first Radio Link Control (RLC) buffer, wherein the first set of SDUs is broadcasted using a first set of MBMS data frames from a first eNB, storing a second set of SDUs in a second RLC buffer, wherein the second set of SDUs is broadcasted using a second set of MBMS data frames from a second eNB, and comparing the first set of MBMS data frames associated with the first set of SDUs with the second set of MBMS data frames associated with the second set of SDUs to recover the missed MBMS data frame in the first set of RLC SDUs received from the first eNB.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: April 9, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Balaji Srinivasan Thiruvenkatachari, Sivashankar Sekar
  • Patent number: 10193793
    Abstract: The present technology relates to a browser apparatus, a recording medium, a server apparatus, and an information processing method by which a load in viewing web content can be reduced. Provided is a browser apparatus that implements a web browser including a unicast communication function section that sends a request to a web site and receives web content from the web site using a unicast protocol, and a multicast communication function section that receives web content multicast-distributed using a multicast protocol. The browser apparatus includes a control unit that controls, in response to an external input, the unicast communication function section of the web browser to send a request to a web site and receive web content from the web site using the unicast protocol.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: January 29, 2019
    Assignee: SONY CORPORATION
    Inventors: Tetsuo Yutani, Takashi Togame
  • Patent number: 10165470
    Abstract: Apparatuses, methods, and computer readable media are disclosed. A HE station may include circuitry. The circuitry may be configured to: generate a HE packet with a short preamble format or a long preamble format, wherein the HE packet comprises one or more legacy signal (L-SIG) fields followed by one or more HE signal fields (HE-SIG) and an HE long-training field (HE-LTF); and configure the HE packet to indicate whether the HE packet is configured with the short preamble format or the long preamble format. The HE packet may be configured with the short preamble format or the long preamble format based on one from the following group: a symbol after the L-SIG fields, a L-SIG polarity of a repeated L-SIG, a number of times the L-SIG fields is repeated, or a length field of one of the one or more L-SIG fields.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: December 25, 2018
    Assignee: Intel IP Corporation
    Inventors: Shahrnaz Azizi, Robert J. Stacey, Thomas J. Kenney, Eldad Perahia
  • Patent number: 10157013
    Abstract: A method for data storage includes storing data in a group of analog memory cells by writing respective input storage values to the memory cells in the group. After storing the data, respective output storage values are read from the analog memory cells in the group. Respective confidence levels of the output storage values are estimated, and the confidence levels are compressed. The output storage values and the compressed confidence levels are transferred from the memory cells over an interface to a memory controller.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: December 18, 2018
    Assignee: Apple Inc.
    Inventors: Uri Perlmutter, Dotan Sokolov, Ofir Shalvi, Oren Golov
  • Patent number: 10120751
    Abstract: Examples may include techniques to recover data from a solid state drive (SSD) using exclusive OR (XOR) parity information. Data saved to non-volatile types of block-erasable memory such as NAND memory included in the SSD may be recovered via use of XOR parity information saved to types of write-in-place memory such as a 3-dimensional cross-point memory also included in the SSD.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: November 6, 2018
    Assignee: INTEL CORPORATION
    Inventors: Jawad B. Khan, Anand S. Ramalingam, Pranav Kalavade
  • Patent number: 10063239
    Abstract: An integrated circuit protection device, including: groups of radiation detection elements distributed in a matrix array; logic gates combining outputs of the detection elements in rows and in columns, each output of a detection element being connected to a gate combining a row and to a gate combining a column; and a circuit for interpreting signals supplied by said logic gates and including an event counter and a delay element.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: August 28, 2018
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Alexandre Sarafianos, Bruno Nicolas
  • Patent number: 10063557
    Abstract: Some embodiments of the invention provide a program for recovering access to an account. The program receives an access recovery parameter (ARP) after providing a first credential to log into an account and providing a notification of a second credential necessary for accessing another resource. The program then receives a request to modify the first credential and receives the second credential. Next, after authenticating the second credential, the program uses the ARP to modify the first credential without providing the first credential.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: August 28, 2018
    Assignee: Apple Inc.
    Inventors: Ivan Krstic, James Wilson, Eric Daniel Friedman, Selvarajan Subramaniam, Patrice O. Gautier, John Patrick Gates, Ramarathnam Santhanagopal, Prabhakaran Vaidyanathaswami, Sudhakar Mambakkam, Raghunandan Pai, Karthik Narayanan
  • Patent number: 10055141
    Abstract: Provided is a storage device, a liquid container and a host device that appropriately control whether or not writing is to be performed with an efficient data configuration. The storage device 100 includes a control unit 110 that performs processing for communication with a host device 400, a storage unit 120, and a storage control unit 130 that performs access control on the storage unit 120. The control unit 110 receives a write data packet from the host device 400, and if a data pattern of write data included in the write data packet and additional data is judged as not matching a specific pattern, makes update instruction of address information and write instruction regarding write data to the storage control unit 130. If judged as matching, the control unit 110 does not make a write instruction regarding the write data, while making an update instruction of the address information.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: August 21, 2018
    Assignee: Seiko Epson Corporation
    Inventor: Shuichi Nakano
  • Patent number: 10042991
    Abstract: A method and apparatus for easily restricting a use right and improving use convenience in a mobile terminal are provided. The method includes displaying a profile list for selecting a set operation mode of the mobile terminal from the displayed profile list; setting an operation mode of the mobile terminal as the selected operation mode, when the set operation mode is selected from the displayed profile list; and displaying a screen associated with the selected operation mode, wherein the set operation mode includes an open mode to use all functions of the mobile terminal and a limited mode to use only set functions.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: August 7, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young Joo Park, Se Hwan Park
  • Patent number: 10015514
    Abstract: A motion vector predictor candidate generating unit makes a prediction based on a motion vector of one of coded neighboring blocks that are neighboring to a coding target block in space or time and generates a plurality of motion vector predictor candidates. A motion vector predictor redundant candidate removing unit removes the motion vector predictor candidates having identity among the motion vector predictor candidates predicted based on a coded neighboring block that is neighboring in space from a motion vector predictor candidate list with at least one being left. A motion vector predictor selecting unit selects a motion vector predictor from the plurality of motion vector predictor candidates. A first bitstream generating unit codes information representing the selected motion vector predictor.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: July 3, 2018
    Assignee: JVC KENWOOD Corporation
    Inventors: Shigeru Fukushima, Hiroya Nakamura, Hideki Takehara
  • Patent number: 9910760
    Abstract: An aspect of the present invention proposes a solution for correctly intercepting, capturing, and replaying tasks (such as functions and methods) in an interception layer operating between an application programming interface (API) and the driver of a processor by using synchronization objects such as fences. According to one or more embodiments of the present invention, the application will use what appears to the application to be a single synchronization object to signal (from a processor) and to wait (on a processor), but will actually be two separate synchronization objects in the interception layer. According to one or more embodiments, the solution proposed herein may be implemented as part of an module or tool that works as an interception layer between an application and an API exposed by a device driver of a resource, and allows for an efficient and effective approach to frame-debugging and live capture and replay of function bundles.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: March 6, 2018
    Assignee: Nvidia Corporation
    Inventors: Jeffrey Kiel, Dan Price, Mike Strauss
  • Patent number: 9906811
    Abstract: In inter prediction that is performed by partitioning a first block, which is obtained by partitioning each picture, into one or more second blocks, a spatial merge candidate generating unit derives a spatial merge candidate without referring to a block included in a first block that includes a second block. In case of a mode where a coding block is divided by a horizontal border into prediction blocks arranged vertically, the reference index derivation unit of a time merge candidate sets reference index information of a time merge candidate to a value of reference index information of an encoded prediction block adjacent to a left edge of a prediction block subject to encoding.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: February 27, 2018
    Assignee: JVC KENWOOD Corporation
    Inventors: Hiroya Nakamura, Shigeru Fukushima, Hideki Takehara
  • Patent number: 9906810
    Abstract: In inter prediction that is performed by partitioning a first block, which is obtained by partitioning each picture, into one or more second blocks, a spatial merge candidate generating unit derives a spatial merge candidate without referring to a block included in a first block that includes a second block. In case of a mode where a coding block is divided by a horizontal border into prediction blocks arranged vertically, the reference index derivation unit of a time merge candidate sets reference index information of a time merge candidate to a value of reference index information of an encoded prediction block adjacent to a left edge of a prediction block subject to encoding.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: February 27, 2018
    Assignee: JVC KENWOOD Corporation
    Inventors: Hiroya Nakamura, Shigeru Fukushima, Hideki Takehara
  • Patent number: 9906809
    Abstract: In inter prediction that is performed by partitioning a first block, which is obtained by partitioning each picture, into one or more second blocks, a spatial merge candidate generating unit derives a spatial merge candidate without referring to a block included in a first block that includes a second block. In case of a mode where a coding block is divided by a horizontal border into prediction blocks arranged vertically, the reference index derivation unit of a time merge candidate sets reference index information of a time merge candidate to a value of reference index information of an encoded prediction block adjacent to a left edge of a prediction block subject to encoding.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: February 27, 2018
    Assignee: JVC KENWOOD Corporation
    Inventors: Hiroya Nakamura, Shigeru Fukushima, Hideki Takehara
  • Patent number: 9848187
    Abstract: A merging motion information calculating unit calculates motion information of a plurality of coded neighboring blocks located at predetermined positions neighboring to a coding target block in space as spatial motion information candidates of the coding target block, in a case where there are spatial motion information candidates having the same motion information out of the spatial motion information candidates, sets one of the spatial motion information candidates having the same motion information as the spatial motion information candidate and, calculates a temporal motion information candidate of the coding target block by using the motion information of a coded block included in a picture that is different in time from a picture including the coding target block, and includes the spatial motion information candidates and the temporal motion information candidate in candidates for the motion information.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: December 19, 2017
    Assignee: JVC KENWOOD Corporation
    Inventors: Kazumi Arakage, Hideki Takehara, Shigeru Fukushima, Hiroya Nakamura
  • Patent number: 9848372
    Abstract: Systems and methodologies are described that facilitate identifying peers based upon encoded signals during peer discovery in a peer to peer network. For example, direct signaling that partitions a time-frequency resource into a number of segments can be utilized to communicate an identifier within a peer discovery interval; thus, a particular segment selected for transmission can signal a portion of the identifier, while a remainder can be signaled based upon tones communicated within the selected segment. Moreover, a subset of symbols within the resource can be reserved (e.g., unused) to enable identifying and/or correcting timing offset. Further, signaling can be effectuated over a plurality of peer discovery intervals such that partial identifiers communicated during each of the peer discovery intervals can be linked (e.g., based upon overlapping bits and/or bloom filter information).
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: December 19, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Junyi Li, Rajiv Laroia, Saurabha R. Tavildar, Thomas J. Richardson, Xinzhou Wu, Leonard Henry Grokop
  • Patent number: 9743089
    Abstract: In a moving picture coding device that further divides a first block acquired by dividing each picture of a moving picture into a predetermined size into one or a plurality of second blocks and codes the moving picture in units of blocks, a quantization parameter calculation unit calculates a quantization parameter of the second block. A predictive quantization parameter deriving unit derives a predictive quantization parameter of the second block by using the quantization parameter of one or a plurality of third blocks that are neighboring to the second block. The predictive quantization parameter deriving unit derives the predictive quantization parameter of the second block by using a quantization parameter of a fourth block coded before the second block in a case where the third block neighboring to the second block is located at a position beyond a boundary of the first block.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: August 22, 2017
    Assignee: JVC KENWOOD Corporation
    Inventors: Masayoshi Nishitani, Hiroya Nakamura, Shigeru Fukushima, Motoharu Ueda
  • Patent number: 9694207
    Abstract: A control device (control unit) to be used for controlling a scanning electromagnet that is used for scanning irradiation, which includes: a command-value processing line (a memory, an arithmetic circuit, an interface) that generates a command value for driving the scanning electromagnet on the basis of a treatment plan, and outputs the generated command value in synchronization with an accelerator; and a comparator unit that detects an error in the processing line; wherein a circuit (for example, the arithmetic circuit) that constitutes at least a part of the processing line is made redundant, and the comparator unit detects occurrence of the error in the processing line when outputs from the circuit made redundant are unmatched to each other.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: July 4, 2017
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Takaaki Iwata
  • Patent number: 9686566
    Abstract: A prediction information derivation unit derives inter prediction information candidates from inter prediction information of coded prediction blocks neighboring a prediction block subject to coding within the same picture as the prediction block subject to coding and inter prediction information of a prediction block in a coded picture that is different from the prediction block subject to coding. The prediction information derivation unit determines an inter prediction information candidate to be used for inter prediction of the prediction block subject to coding from the inter prediction information candidates that have been derived. A second bitstream generation unit codes an index that indicates the inter prediction information candidate based on the number of the inter prediction information candidates.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: June 20, 2017
    Assignee: JVC KENWOOD Corporation
    Inventors: Hiroya Nakamura, Hideki Takehara, Shigeru Fukushima, Motoharu Ueda
  • Patent number: 9681134
    Abstract: A prediction information deriving unit derives the inter-prediction information candidates from inter-prediction information of a prediction block neighboring to a coding target prediction block or a prediction block present at the same position as or near the coding target prediction block in a coded picture at a temporally different position from the coding target prediction block. A candidate supplementing unit supplements inter-prediction information candidates having the same prediction mode, reference index, and motion vector until the number of inter-prediction information candidates reaches the designated number of candidates when the number of inter-prediction information candidates is smaller than the designated number of candidates.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: June 13, 2017
    Assignee: JVC KENWOOD Corporation
    Inventors: Hiroya Nakamura, Shigeru Fukushima, Hideki Takehara
  • Patent number: 9672106
    Abstract: A method for implementing erasure coding, including identifying a plurality of storage units, determining a number of storage unit failures to be tolerated, organizing data within the plurality of storage units as a matrix of rows and columns for computing one or more parity data, configuring the matrix to include one or more additional rows having preset values, computing the one or more parity data from the matrix that corresponds to the number of storage unit failures to be tolerated, wherein the one or more parity data comprises a row parity, a first diagonal parity, and a second diagonal parity, wherein the one or more additional rows having the preset values are used to compute the first diagonal parity and the second diagonal parity; and wherein the first diagonal parity comprises a different slope from the second diagonal parity.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: June 6, 2017
    Assignee: NUTANIX, INC.
    Inventors: Dmitri Bronnikov, Binny Sher Gill
  • Patent number: 9674545
    Abstract: In inter prediction that is performed by partitioning a first block, which is obtained by partitioning each picture, into one or more second blocks, a spatial merge candidate generating unit derives a spatial merge candidate without referring to a block included in a first block that includes a second block. In case of a mode where a coding block is divided by a horizontal border into prediction blocks arranged vertically, the reference index derivation unit of a time merge candidate sets reference index information of a time merge candidate to a value of reference index information of an encoded prediction block adjacent to a left edge of a prediction block subject to encoding.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: June 6, 2017
    Assignee: JVC KENWOOD Corporation
    Inventors: Hiroya Nakamura, Shigeru Fukushima, Hideki Takehara
  • Patent number: 9667966
    Abstract: A prediction information deriving unit derives the inter-prediction information candidates from inter-prediction information of a prediction block neighboring to a coding target prediction block or a prediction block present at the same position as or near the coding target prediction block in a coded picture at a temporally different position from the coding target prediction block. A candidate supplementing unit supplements inter-prediction information candidates having the same prediction mode, reference index, and motion vector until the number of inter-prediction information candidates reaches the designated number of candidates when the number of inter-prediction information candidates is smaller than the designated number of candidates.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: May 30, 2017
    Assignee: JVC KENWOOD Corporation
    Inventors: Hiroya Nakamura, Shigeru Fukushima, Hideki Takehara
  • Patent number: 9667989
    Abstract: In a moving picture coding device that codes moving pictures in units of a block by partitioning a first block, which is obtained by partitioning each picture of the moving pictures into predetermined sizes, into one or a plurality of second blocks, a quantization parameter calculation unit calculates a quantization parameter of the second block. A predictive quantization parameter deriving unit derives a predictive quantization parameter of the second block using quantization parameters of a third block adjacent to the left of the second block and a fourth block adjacent to the top of the second block. A differential quantization parameter generation unit generates a differential quantization parameter of the second block from a difference between the quantization parameter of the second block and the predictive quantization parameter. A first bitstream generation unit codes the differential quantization parameter of the second block.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: May 30, 2017
    Assignee: JVC KENWOOD Corporation
    Inventors: Masayoshi Nishitani, Hiroya Nakamura, Shigeru Fukushima, Motoharu Ueda
  • Patent number: 9667986
    Abstract: In a moving picture coding device that further divides a first block acquired by dividing each picture of a moving picture into a predetermined size into one or a plurality of second blocks and codes the moving picture in units of blocks, a quantization parameter calculation unit calculates a quantization parameter of the second block. A predictive quantization parameter deriving unit derives a predictive quantization parameter of the second block by using the quantization parameter of one or a plurality of third blocks that are neighboring to the second block. The predictive quantization parameter deriving unit derives the predictive quantization parameter of the second block by using a quantization parameter of a fourth block coded before the second block in a case where the third block neighboring to the second block is located at a position beyond a boundary of the first block.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: May 30, 2017
    Assignee: JVC KENWOOD Corporation
    Inventors: Masayoshi Nishitani, Hiroya Nakamura, Shigeru Fukushima, Motoharu Ueda
  • Patent number: 9661342
    Abstract: In a moving picture coding device that codes moving pictures in units of a block by partitioning a first block, which is obtained by partitioning each picture of the moving pictures into predetermined sizes, into one or a plurality of second blocks, a quantization parameter calculation unit calculates a quantization parameter of the second block. A predictive quantization parameter deriving unit derives a predictive quantization parameter of the second block using quantization parameters of a third block adjacent to the left of the second block and a fourth block adjacent to the top of the second block. A differential quantization parameter generation unit generates a differential quantization parameter of the second block from a difference between the quantization parameter of the second block and the predictive quantization parameter. A first bitstream generation unit codes the differential quantization parameter of the second block.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: May 23, 2017
    Assignee: JVC KENWOOD Corporation
    Inventors: Masayoshi Nishitani, Hiroya Nakamura, Shigeru Fukushima, Motoharu Ueda
  • Patent number: 9661343
    Abstract: A motion vector predictor candidate constructing unit performs prediction based on a motion vector of one of coded blocks neighboring a coding target block in the same picture as the coding target block, constructs a plurality of motion vector predictor candidates, and adds the motion vector predictor candidates to a motion vector predictor candidate list. A motion vector predictor candidate number limiting unit limits the number of motion vector predictor candidates added to the motion vector predictor candidate list to a maximum candidate number according to a size of a prediction block. A motion vector predictor selecting unit selects a motion vector predictor from the motion vector predictor candidate list. A coding unit codes information representing an index of the selected motion vector predictor in the motion vector predictor candidate list.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: May 23, 2017
    Assignee: JVC KENWOOD Corporation
    Inventors: Hiroya Nakamura, Shigeru Fukushima, Hideki Takehara
  • Patent number: 9648620
    Abstract: A method includes generating a data packet at an access point. The data packet is to be communicated using a waveform that includes a first set of tones that is allocated to a first destination device and a second set of tones that is allocated to a second destination device. The first set of tones is non-overlapping with respect to the second set of tones, and each tone of the first set of tones and each tone of the second set of tones is an orthogonal frequency-division multiple access (OFDMA) tone. The method also includes transmitting the data packet to the first destination device via an institute of electrical and electronics engineers (IEEE) 802.11 wireless network and transmitting the data packet to the second destination device via the IEEE 802.11 wireless network.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: May 9, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Rahul Tandra, Sameer Vermani, Bin Tian, Albert Van Zelst
  • Patent number: 9467170
    Abstract: A controller for a nonvolatile memory device includes a transfer control module and a decoder module. The transfer control module is configured to request a read of data from a flash memory module. The data to be read includes data corresponding to a first codeword. The transfer control module is configured to receive hard decisions corresponding to the first codeword from the flash memory module. The transfer control module is configured to receive soft information corresponding to the first codeword from the flash memory module. Both the hard decisions corresponding to the first codeword and the soft information corresponding to the first codeword are received without receiving any intervening hard decisions or soft information corresponding to another codeword. The decoder module is configured to decode the first codeword using the hard decisions and the soft information corresponding to the first codeword.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: October 11, 2016
    Assignee: Marvell World Trade Ltd.
    Inventors: Shashi Kiran Chilappagari, Gregory Burd
  • Patent number: 9459956
    Abstract: A low density parity check decoder includes a variable node processor operable to generate variable node to check node messages and to calculate perceived values based on check node to variable node messages, a check node processor operable to generate the check node to variable node message vectors and to calculate checksums based on the variable node to check node messages, and a convergence detector and bit map generator operable to convergence of the perceived values and to generate at least one bit map that identifies variable nodes that are connected to check nodes with unsatisfied parity checks.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: October 4, 2016
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Alexander Hubris, Zhengang Chen, AbdelHakim S. Alhussien, YingQuan Wu
  • Patent number: 9455800
    Abstract: A device for mitigating effects of impulse noise on data packet transfer over a communication line is configured at least partially according to physical layer characteristics of the communication line. As an example, a data packet retransmission device might be configured to retransmit in response to each retransmission request an amount of data packets depending on the physical layer interleaving delay ID and/or data bit rate DBR.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: September 27, 2016
    Assignee: Alcatel Lucent
    Inventors: Geert Bert Maarten Ysebaert, Katleen Peggie Florimond Van Acker, Piet Michel Albert Vandaele
  • Patent number: 9448921
    Abstract: Technologies are described herein for allocating pages in a flash memory. Some example technologies may receive multiple data elements and a write request to write the multiple data elements to the flash memory. Example technologies may identify a correlation between a subset of the data elements based on correlation criteria. Example technologies may allocate neighboring pages of the flash memory for storing the subset of the data elements. Example technologies may write the subset of the data elements into the allocated pages.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: September 20, 2016
    Assignee: EMPIRE TECHNOLOGY DEVELOPMENT LLC
    Inventor: Xudong Ma
  • Patent number: 9336885
    Abstract: A charge constrained bit sequence is processed to obtain a lower bound on a number of bit errors associated with the charge constrained bit sequence. The lower bound is compared against an error correction capability threshold associated with an error correction decoder. In the event the lower bound is greater than or equal to the error correction decoder threshold, an error correction decoding failure is predicted.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: May 10, 2016
    Assignee: SK Hynix Memory Solutions Inc.
    Inventors: Arunkumar Subramanian, Frederick K. H. Lee, Xiangyu Tang, Lingqi Zeng, Jason Bellorado
  • Patent number: 9292418
    Abstract: The described embodiments include a program code testing system that determines the vulnerability of multi-threaded program code to soft errors. For multi-threaded program code, two to more threads from the program code may access shared architectural structures while the program code is being executed. The program code testing system determines accesses of architectural structures made by the two or more threads of the multi-threaded program code and uses the determined accesses to determine a time for which the program code is exposed to soft errors. From this time, the program code testing system determines a vulnerability of the program code to soft errors.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: March 22, 2016
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Vilas Sridharan, Mark E. Wilkening, Sudhanva Gurumurthi
  • Patent number: 9294092
    Abstract: A packaged component may include an interposer and integrated circuit dies mounted on the interposer. At least one of the dies may be a radiation-hardened integrated circuit die, whereas the remaining dies may be non-radiation-hardened dies. If desired, the interposer may be a radiation-hardened interposer whereas the integrated circuit dies may be non-radiation-hardened dies. The radiation-hardened die or the radiation-hardened interposer may include monitor circuitry that is used to test non-radiation-hardened circuitry of the packaged component. Test results may be stored in a database at the monitor circuitry or transmitted to external devices such as a server. The monitor circuitry may be used to reconfigure failed circuitry or may control multiplexing circuitry in the interposer to functionally replace the failed circuitry. If desired, the monitor circuitry may adjust power consumption of non-radiation-hardened circuitry based on the test results.
    Type: Grant
    Filed: July 26, 2013
    Date of Patent: March 22, 2016
    Assignee: Altera Corporation
    Inventor: Michael D. Hutton
  • Patent number: 9257982
    Abstract: A packaged component may include an interposer and integrated circuit dies mounted on the interposer. At least one of the dies may be a radiation-hardened integrated circuit die, whereas the remaining dies may be non-radiation-hardened dies. If desired, the interposer may be a radiation-hardened interposer whereas the integrated circuit dies may be non-radiation-hardened dies. The radiation-hardened die or the radiation-hardened interposer may include monitor circuitry that is used to test non-radiation-hardened circuitry of the packaged component. Test results may be stored in a database at the monitor circuitry or transmitted to external devices such as a server. The monitor circuitry may be used to reconfigure failed circuitry or may control multiplexing circuitry in the interposer to functionally replace the failed circuitry. If desired, the monitor circuitry may adjust power consumption of non-radiation-hardened circuitry based on the test results.
    Type: Grant
    Filed: July 26, 2013
    Date of Patent: February 9, 2016
    Assignee: Altera Corporation
    Inventor: Michael D. Hutton
  • Patent number: 9239609
    Abstract: An electronic apparatus is provided. The electronic apparatus includes a serial advanced technology attachment (SATA) physical layer, a clock generator and a control unit. The SATA physical layer is configured to provide connection with an SATA device and perform data transmission with the SATA device is performed at a first clock frequency. The clock generator is configured to provide a clock signal having the first clock frequency to the SATA physical layer. When at least one specific event is detected by the control unit, the control unit controls the clock generator to provide the clock signal having a second clock frequency to the SATA physical layer, so that the SATA physical layer performs data transmission with the SATA device at the second clock frequency. The second clock frequency is lower than the first clock frequency.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: January 19, 2016
    Assignee: VIA TECHNOLOGIES, INC.
    Inventor: Cheng-Ming Huang
  • Patent number: 9208020
    Abstract: A data storage system configured to efficiently search and update system data is disclosed. In one embodiment, the data storage system can attempt to correct errors in retrieved data configured to index system data. Metadata stored along with user data in a memory location can be configured to indicate a logical address associated in a logical-to-physical location mapping with a physical address at which user data and metadata are stored. The data storage system can generate modified versions of logical address indicated by the metadata and determine whether such modified versions match the physical address in the logical-to-physical mapping. Modified versions of the logical address can be generated by flipping one or more bits in the logical address indicated by the metadata. Efficiency can be increased and improved performance can be attained.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: December 8, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventor: Johnny A. Lam
  • Patent number: 9166917
    Abstract: Disclosed are various embodiments for frame preemption and fragmentation at the media access control (MAC) sublayer of the link layer or the MAC merge sublayer of the link layer. Traffic classes may be organized into preemptive traffic classes and non-preemptive traffic classes. Preemptable frames may be fragmented when a preemptive frame is to be transmitted. The fragmentation may be indicated through modification of the value of cyclic redundancy check (CRC) field in a predetermined way, through addition of a fragmentation trailer, and/or through other approaches.
    Type: Grant
    Filed: June 30, 2012
    Date of Patent: October 20, 2015
    Assignee: BROADCOM CORPORATION
    Inventor: Patricia A. Thaler
  • Patent number: 9158295
    Abstract: A process is modeled by resolving the process into a plurality of process stages, including at least a first process stage and a second process stage, and developing a plurality of models, each model corresponding to a respective one of the plurality of process stages, wherein the model corresponding to each process stage is developed using data from one or more runs of that process stage and output quality data relating to the one or more runs of that process stage and wherein the model corresponding to each process stage is adapted to produce an output quality prediction associated with that process stage, and wherein the output quality prediction produced by the model of a first one of the process stages is used to develop the model of a second one of the process stages.
    Type: Grant
    Filed: May 21, 2011
    Date of Patent: October 13, 2015
    Assignee: FISHER-ROSEMOUNT SYSTEMS, INC.
    Inventors: Terrence L. Blevins, Wilhelm K. Wojsznis, Christopher J. Worek, Mark Nixon
  • Patent number: 9094348
    Abstract: Through the identification of different packet-types, packets can be handled based on an assigned packet handling identifier. This identifier can, for example, enable forwarding of latency-sensitive packets without delay and allow error-sensitive packets to be stored for possible retransmission. In another embodiment, and optionally in conjunction with retransmission protocols including a packet handling identifier, a memory used for retransmission of packets can be shared with other transceiver functionality such as, coding, decoding, interleaving, deinterleaving, error correction, and the like.
    Type: Grant
    Filed: November 8, 2013
    Date of Patent: July 28, 2015
    Assignee: TQ DELTA, LLC
    Inventor: Marcos C. Tzannes
  • Patent number: 9049270
    Abstract: A device is positioned upstream of a modulator in a digital service stream broadcasting chain, and is adapted to receive a plurality of transport streams and to transmit a transport stream to a modulator, each transport stream encapsulating a digital service stream adapted to be broadcast by the modulator, the digital service streams representing the same digital service. The device is also adapted to: digital service streams from the received transport streams; detect errors in the streams; align the extracted streams; select a stream from the aligned streams, according to any errors detected; encapsulate the selected stream, in order to form the stream to be transmitted to the modulator.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: June 2, 2015
    Assignee: ENENSYS TECHNOLOGIES
    Inventors: Ludovic Poulain, Laurent Roul
  • Patent number: 9043689
    Abstract: A method begins by a processing module obtaining common storage name information regarding data that is stored in storage units of a distributed storage network (DSN) as a set of data slices. Each data slice of the set of data slices has a unique storage name, where each of the unique storage names for the set of data slices has common naming information regarding the data. The method continues where the processing module interprets the common storage name information to determine whether a difference exists between the common naming information of a data slice of the set of data slices and the common naming information of other data slices of the set of data slices. When the difference exists, the method continues where the processing module indicates a potential storage error of the data slice and implements a storage error process regarding the potential storage error of the data slice.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: May 26, 2015
    Assignee: Cleversafe, Inc.
    Inventors: Jason K. Resch, John Quigley, Wesley Leggette, Andrew Baptist
  • Patent number: 9032276
    Abstract: The present invention includes generating a tie-breaking metric via a comparative tie-breaking metric training process, monitoring an output of a channel detector in order to identify a tie condition between a first log-likelihood ratio (LLR) value and a second LLR value of a symbol, and upon identifying a tie condition between the first LLR value and the second LLR value of the symbol, applying the generated tie-breaking metric to the symbol in order to assign a hard decision to the symbol.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: May 12, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Wu Chang, Fan Zhang, Yang Han, Ming Jin
  • Patent number: 9032277
    Abstract: In an arrangement of the disclosed systems, devices, and methods, a codeword encoded with a first number of check symbols is received and asymmetrically processed according to a second number of check symbols, where the second number of check symbols is less than the first number of check symbols, to produce an error locator polynomial and an error evaluator polynomial. A derivative of the error locator polynomial is produced by outputting a first polynomial term and a second polynomial term, wherein the second polynomial term is a constant. The derivative of the error locator polynomial is produced using a variable finite-field multiplier and without use of a divider.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: May 12, 2015
    Assignee: Altera Corporation
    Inventors: Martin Langhammer, Chuck Rumbolt
  • Patent number: 9026880
    Abstract: A check node processing unit updates an extrinsic value ratio based on a prior value ratio for each row of a parity check matrix with respect to input data. An identifying unit identifies, based on an element of the parity check matrix that can be identified by a row and column associated with the updated extrinsic value ratio, a next-target element in the same column and in a different row. The identifying unit identifies an element to be updated in the next step by the check node processing unit, from among multiple elements included in the same column. A variable node processing unit updates, based on the extrinsic value ratio, a prior value ratio associated with the identified next-target element after the check node processing unit completes the updating of each row. The check node processing unit and the variable node processing unit alternately and iteratively execute their operations.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: May 5, 2015
    Inventor: Atsushi Hayami