Error Correction, Recovery Or Fault Tolerance Using At Least Two Different Redundancy Techniques And At Least One Technique Not Involving Redundancy (epo) Patents (Class 714/E11.007)
  • Patent number: 11792057
    Abstract: A communication system comprises a transmitter and a receiver that communicate differential phase modulated data over a wireline channel pair. The transmitter encodes data symbols by generating first and second data signals with differentially phase shifted signal transitions with respect to one another. The receiver receives the first data signal and the second data signal and samples the first data signal based on a signal transition timing of the second data signal to generate a first output data symbol. The receiver furthermore samples the second data signal based on signal transition timing of the first data signal to generate a second output data symbol.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: October 17, 2023
    Assignee: Rambus Inc.
    Inventors: Masum Hossain, Richelle L. Smith, Carl W. Werner
  • Patent number: 11526457
    Abstract: The present invention relates to a semiconductor device having a first processor element configured to receive a first interrupt request signal, a second processor element configured to receive a second interrupt request signal, a first priority determination circuit configured to receive a plurality of interrupt signals and to output the first interrupt request signal to the first processor element, a second priority determination circuit configured to receive the plurality of interrupt signals and to output the second interrupt request signal to the second processor element, a checker circuit configured detect failures of the first priority determination circuit and the second priority determination circuit, and a control circuit configured to select one of the first priority determination circuit or the second priority determination circuit as a circuit to be checked. The control circuit selects the circuit to be checked based on the first interrupt request signal and the second interrupt request signal.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: December 13, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Taro Kawao
  • Patent number: 11514000
    Abstract: Embodiments relate to providing a multi-cloud, multi-region, parallel file system cluster service with replication between file system storage nodes. In some embodiments, a first file system storage node of a file system storage cluster receives a request from a client device to write data to a first file system stored on the first file system storage node. In response to the request to write the data to the first file system, a plurality of servers of the first file system storage node writes, in parallel, the data to the first file system and sends instructions to a second file system storage node of the file system storage cluster for writing the data to a second file system stored on the second file system storage node.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: November 29, 2022
    Assignee: CLOUDBRINK, INC.
    Inventors: Michael Yoshito Nishimoto, Saravanan Purushothaman, Vinay Gaonkar, Ramanand Thattai Narayanan
  • Patent number: 8948960
    Abstract: Systems and methods are provided for arbitrating sensor and actuator signals in various devices. One system includes input/output (I/O) circuitry, redundant computation circuits coupled to the I/O circuitry, and an arbitration circuit coupled between the I/O circuitry and the redundant computation circuits. The I/O circuitry is configured to be coupled to multiple non-redundant systems, and the redundant computation circuits are configured to be coupled to one of multiple system buses. One such device is an aircraft including multiple non-redundant systems and a plurality of system buses that are configured to transmit redundant messages to the non-redundant systems.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: February 3, 2015
    Assignee: Honeywell International Inc.
    Inventor: Scot E. Griffith
  • Patent number: 8732296
    Abstract: A system, method, and computer program product are provided for redirecting internet relay chat (IRC) traffic identified utilizing a port-independent algorithm and controlling IRC based malware. In use, IRC traffic communicated via a network is identified utilizing a port-independent algorithm. Furthermore, the IRC traffic is redirected to a honeypot.
    Type: Grant
    Filed: May 6, 2009
    Date of Patent: May 20, 2014
    Assignee: McAfee, Inc.
    Inventors: Vinoo Thomas, Nitin Jyoti, Cedric Cochin, Rachit Mathur
  • Publication number: 20130227332
    Abstract: Embodiments of the invention provide systems and methods for recovering a failed data summarization. According to one embodiment, recovering a failed instance can comprise processing existing summarization instances identified as instances for which a new data summarization instance needs to wait. Upon a completion or a timeout of each of the instances identified as instances for which the new data summarization instance needs to wait, an exclusive lock can be acquired on a table storing scope information for the plurality of data summarization instances. One or more existing data summarization instances that match the new data summarization instance or that have an overlapping scope with the new data summarization instance can be processed, remaining tasks to be performed by the new data summarization instance can be defined, the exclusive lock can be released, and the remaining tasks to be performed by the new data summarization instance can be performed.
    Type: Application
    Filed: February 29, 2012
    Publication date: August 29, 2013
    Applicant: Oracle International Corporation
    Inventors: SHANE ROBERT VERMETTE, Amrit Mishra, Vijay Manguluru, Ajit Kumar Das
  • Publication number: 20130138995
    Abstract: A method for managing multiple nodes hosting multiple memory segments, including: identifying a failure of a first node hosting a first memory segment storing a hypervisor; identifying a second memory segment storing a shadow of the hypervisor and hosted by a second node; intercepting, after the failure, a hypervisor access request (HAR) generated by a core of a third node and comprising a physical memory address comprising multiple node identification (ID) bits identifying the first node; modifying the multiple node ID bits of the physical memory address to identify the second node; and accessing a location in the shadow of the hypervisor specified by the physical address of the HAR after the multiple node ID bits are modified.
    Type: Application
    Filed: November 30, 2011
    Publication date: May 30, 2013
    Applicant: Oracle International Corporation
    Inventors: Ramaswamy Sivaramakrishnan, Jiejun Lu, Aaron S. Wynn
  • Publication number: 20120260120
    Abstract: A method of controller election includes, upon failure of a master controller within a team comprising a number of controllers, automatically promoting another of the number controllers to serve as an elected master controller and designating the elected master controller as a new master controller if it is determined that the failure of the master controller is not temporary.
    Type: Application
    Filed: April 7, 2011
    Publication date: October 11, 2012
    Inventors: Yves Mongeau, Richard H. Blanchette
  • Publication number: 20120239976
    Abstract: Disclosed is an apparatus and method for determining a dwell time in a non-volatile memory circuit after a shutdown of the memory circuit. A voltage shift is calculated by comparing a first read level voltage required to read a test block stored before the shutdown and a second read level voltage required to read a second test block stored after the shutdown. A shutdown time is determined from a look up table indexed by the voltage shift and a number of program/erase cycles. The dwell time is calculated as a function of the drive temperature, a clock, and a block time stamp. Once the dwell time is calculated, a controller calculates a new read level voltage based, in part, on the dwell time and provides one or more programming commands representative of the new read level voltage to the memory circuit to read the memory circuit.
    Type: Application
    Filed: July 8, 2011
    Publication date: September 20, 2012
    Applicant: STEC, Inc.
    Inventors: Aldo G. COMETTI, Lun Bin Huang, Ashot Melik-Martirosian
  • Patent number: 8260492
    Abstract: A method and system for redundancy management is provided for a distributed and recoverable digital control system. The method uses unique redundancy management techniques to achieve recovery and restoration of redundant elements to full operation in an asynchronous environment. The system includes a first computing unit comprising a pair of redundant computational lanes for generating redundant control commands. One or more internal monitors detect data errors in the control commands, and provide a recovery trigger to the first computing unit. A second redundant computing unit provides the same features as the first computing unit. A first actuator control unit is configured to provide blending and monitoring of the control commands from the first and second computing units, and to provide a recovery trigger to each of the first and second computing units. A second actuator control unit provides the same features as the first actuator control unit.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: September 4, 2012
    Assignee: Honeywell International Inc.
    Inventors: Kent Stange, Richard Hess, Gerald B Kelley, Randy Rogers
  • Publication number: 20120124411
    Abstract: The invention relates to a method for fault identification in a System-on-Chip (SoC) consisting of a number of IP cores, wherein each IP core is a fault containment unit, and where the IP cores communicate with one another by means of messages via a Network-on-Chip, and wherein an excellent IP core provides a TRM (Trusted Resource Monitor), wherein a faulty control message which is sent from one non-privileged IP core to another non-privileged IP core is identified and projected by an (independent) fault container unit, as a result of which this faulty control message cannot cause any failure of the message receiver.
    Type: Application
    Filed: July 7, 2010
    Publication date: May 17, 2012
    Inventor: Stefan Poledna
  • Publication number: 20120110376
    Abstract: Various embodiments of the present invention provide systems and methods for managing solid state drives. As an example, a storage system is described that include at least a first flash memory block and a second flash memory block, and a control circuit. The first flash memory block and the second flash memory block are addressable in the storage system. The control circuit is operable to identify the first flash memory block as partially failed, receive a write request directed to the first flash memory block; and direct the write request to the second flash memory block.
    Type: Application
    Filed: January 11, 2012
    Publication date: May 3, 2012
    Inventors: David L. Dreifus, Robert W. Warren, Brian McKean
  • Publication number: 20120079335
    Abstract: A new computer system is invented for handling large scale calculation.
    Type: Application
    Filed: September 27, 2011
    Publication date: March 29, 2012
    Inventors: Xianghui Wang, Wensheng Hua
  • Publication number: 20120079354
    Abstract: A non-volatile semiconductor memory device comprises a memory cell array including a plurality of memory cells arrayed capable of storing information in accordance with variations in threshold voltage. A likelihood calculator has a plurality of likelihood calculation algorithms for deriving a likelihood value about a stored data bit from a threshold value read out of the memory cell. An error correction unit executes error correction through iterative processing using the likelihood value obtained at the likelihood calculator. A likelihood calculator controller changes among the likelihood calculation algorithms in the likelihood calculator based on a certain value of the number of iterations in the iterative processing obtained from the error correction unit.
    Type: Application
    Filed: December 2, 2011
    Publication date: March 29, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hironori UCHIKAWA, Tatsuyuki ISHIKAWA, Mitsuaki HONMA
  • Publication number: 20120066545
    Abstract: A fault-tolerant system including a plurality of modules each further including a CPU subsystem, a fault-tolerant control unit, and an I/O subsystem, wherein the fault-tolerant control unit includes a master FT control LSI chip and at least one slave FT control LSI chip. One module is placed in an active state whilst the other module is placed in a standby state, so that I/O requests made by CPU subsystems of these modules are selectively delivered to I/O subsystems based on the master/slave relationship. Upon receiving fault information representing a failed subsystem which is either the CPU subsystem or the I/O subsystem found in the module, the master FT control LSI chip sends a command for controlling isolation of the failed subsystem to the slave FT control LSI chip, so that the slave FT control LSI chip controls isolation of the failed subsystem based on the command.
    Type: Application
    Filed: September 12, 2011
    Publication date: March 15, 2012
    Inventor: SHINJI ABE
  • Publication number: 20120042201
    Abstract: Memory devices and methods are described that include serially chained memory devices. In one or more of the configurations shown, a serial chain of memory devices includes a number of memory devices, and an error recovery device at an end of the chain. In one configuration shown, the serial chain of memory devices includes a chain of devices where each device is a stacked die memory device. Methods are described that show using the error recovery device in write operations and data recovery operations.
    Type: Application
    Filed: October 24, 2011
    Publication date: February 16, 2012
    Inventor: David R. Resnick
  • Publication number: 20110276825
    Abstract: The present invention relates to a device and a method for coordinating an APS operation and a recovery operation. The device includes a working channel detection unit, a protection channel detection unit, a protection protocol unit and a recovery protocol unit. The method comprises: when the working channel of current service fails, the working channel detection unit reporting a working channel alarm to the protection protocol unit and a recovery protocol unit of current node; the recovery protocol unit starting up a timer after receiving the working channel alarm, and the protection protocol unit determining whether the recovery operation needs to be started up immediately after receiving the working channel alarm, and if yes, the protection protocol unit notifying the recovery protocol unit to start up the recovery operation immediately; the recovery protocol unit starting up the recovery operation immediately after receiving the notification.
    Type: Application
    Filed: January 21, 2010
    Publication date: November 10, 2011
    Applicant: ZTE Corporation
    Inventors: Jun Dong, Zhenyu Wang
  • Publication number: 20110145530
    Abstract: One embodiment includes method acts for detecting race conditions. The method includes beginning a critical section, during which conflicting reads and writes should be detected to determine if a race condition has occurred. This is performed by executing at a thread one or more software instructions to place a software lock on data. As a result of executing one or more software instructions to place a software lock on data, several additional acts are performed. In particular, the thread places a software lock on the data locking the data for at least one of exclusive writes or reads by the thread. And, at a local cache memory local to the thread, the thread enters the thread's memory isolation mode enabling local hardware buffering of memory writes and monitoring of conflicting writes or reads to or from the cache memory to detect reads or writes by non-lock respecting agents.
    Type: Application
    Filed: December 15, 2009
    Publication date: June 16, 2011
    Applicant: MICROSOFT CORPORATION
    Inventors: Martin Taillefer, Gad Sheaffer
  • Publication number: 20110138225
    Abstract: A processing device may automatically provide protective services and may provide backup services for backing up and restoring user files, system files, configuration files, as well as other information. The processing device may be configured to check one or more performance conditions and perform an action to improve performance based on the one or more performance conditions. The processing device may monitor configuration and file changes and provide a user with a capability to persist or discard configuration changes and/or file changes made by an application during a session. The processing device may include a recovery button or switch, which when selected or pressed may cause the processing device to be restored to an operational state. The processing device may automatically detect instabilities and may automatically attempt to repair possible causes of the instabilities. The processing device may also include an additional chipset, which may perform backup and recovery services.
    Type: Application
    Filed: February 11, 2011
    Publication date: June 9, 2011
    Applicant: Microsoft Corporation
    Inventors: Kohulan Gunabalasubramaniam, Mukesh Karki, Narayanan Parthasarathy, Bohdan Raciborski
  • Publication number: 20110131445
    Abstract: An apparatus and method of page program operation is provided. When performing a page program operation with a selected memory device, a memory controller loads the data into the page buffer of one selected memory device and also into the page buffer of another selected memory device in order to store a back-up copy of the data. In the event that the data is not successfully programmed into the memory cells of the one selected memory device, then the memory controller recovers the data from the page buffer of the other memory device. Since a copy of the data is stored in the page buffer of the other memory device, the memory controller does not need to locally store the data in its data storage elements.
    Type: Application
    Filed: February 7, 2011
    Publication date: June 2, 2011
    Applicant: MOSAID TECHNOLOGIES INCORPORATED
    Inventors: Hong Beom PYEON, Jin-Ki KIM, HakJune OH
  • Publication number: 20110087948
    Abstract: A loss correction encoding device having an improved capability of loss correction using LDPC-CC is disclosed. In the loss correction encoding device (120), a rearranging unit (122) rearranges information data contained in n information packets according to the constraint length Kmax and the encoding rate (q?1)/q of a cheek polynomial of the loss correction code used in a loss correction encoding unit (123). Specifically, the rearranging unit (122) rearranges the information data in such a way that continuous Kmax×(q?1) pieces of information data after rearrangement are contained in different information packets. The rearranging unit (122) distributes the information data to information blocks from n information packets (n satisfies formula (1)).
    Type: Application
    Filed: July 2, 2009
    Publication date: April 14, 2011
    Inventors: Yutaka Murakami, Shutai Okamura
  • Publication number: 20110072298
    Abstract: An information processing device includes SBs; an XBB for executing data transfer between the SBs; and an SCF for managing and controlling the SBs and the XBB. The SB includes a transmitting/receiving unit for transmitting a notification packet indicating occurrence of an error via the XBB when detecting the occurrence of the error. The SCF includes an executing unit for executing a configuration change process corresponding to an instruction when detecting the instruction related to the SB, a suspending unit for suspending acceptance of an error report from the SB in which the error occurs during execution of the configuration change process and an XBB controller for controlling the XBB to destroy the notification packet received from the SB of which configuration change process is being executed and controlling the XBB to inhibit transfer of the notification packet to the SB of which configuration change process is being executed.
    Type: Application
    Filed: November 23, 2010
    Publication date: March 24, 2011
    Applicant: FUJITSU LIMITED
    Inventor: Yasuhiro Kuroda
  • Publication number: 20110055652
    Abstract: Provided is a method of performing hybrid automatic repeat request (HARQ) of a receiver in a wireless communication system. The method includes: receiving data in a transmission time interval (TTI) unit consisting of a plurality of consecutive subframes; and transmitting acknowledgment (ACK)/non-acknowledgment (NACK) for the received data, wherein the data is received using a plurality of redundancy versions respectively allocated to the plurality of subframes, and the ACK/NACK is transmitted with an interval of a predetermined processing delay from a transmission time of a specific redundancy version among the plurality of redundancy versions.
    Type: Application
    Filed: April 2, 2009
    Publication date: March 3, 2011
    Inventor: Hyung Ho Park
  • Publication number: 20100250943
    Abstract: A method for electronically fused encryption key security includes inserting a plurality of inverters between a bank of security fuses and a fuse sense logic module. The method also includes sensing an activated set of the bank of security fuses and the plurality of inverters. The method further includes comparing the sensed activated set of the bank of security fuses and the plurality of inverters with a software key to determine whether at least a substantial match is made.
    Type: Application
    Filed: March 27, 2009
    Publication date: September 30, 2010
    Applicant: International Business Machines Corporation
    Inventors: Robert W. Berry, JR., Jonathan J. DeMent, John S. Liberty
  • Publication number: 20100251051
    Abstract: A method and apparatus for decoding portions of a data stream, wherein each portion comprises a plurality of samples. The method comprises storing portions of the data stream, decoding portions of the data stream to form decoded portions, and storing the decoded portions. The method further comprises identifying that a portion of the data stream is degraded. Following identifying that a portion of the data stream is degraded, the method generates a decoded portion for the degraded portion of the data stream using the stored decoded portions. The method also updates a state of a decoder by: estimating a pitch period of the degraded portion; selecting a group of successive samples of the stored portions of the data stream, the group of successive samples offset from the degraded portion in the data stream by a multiple of the estimated pitch period; and decoding the selected samples at the decoder.
    Type: Application
    Filed: March 30, 2009
    Publication date: September 30, 2010
    Applicant: Cambridge Silicon Radio Limited
    Inventors: Xuejing Sun, Kuan-Chieh Yen
  • Publication number: 20100241798
    Abstract: A non-volatile memory data address translation scheme is described that utilizes a hierarchal address translation system that is stored in the non-volatile memory itself. Embodiments of the present invention utilize a hierarchal address data and translation system wherein the address translation data entries are stored in one or more data structures/tables in the hierarchy, one or more of which can be updated in-place multiple times without having to overwrite data. This hierarchal address translation data structure and multiple update of data entries in the individual tables/data structures allow the hierarchal address translation data structure to be efficiently stored in a non-volatile memory array without markedly inducing write fatigue or adversely affecting the lifetime of the part. The hierarchal address translation of embodiments of the present invention also allow for an address translation layer that does not have to be resident in system RAM for operation.
    Type: Application
    Filed: June 4, 2010
    Publication date: September 23, 2010
    Inventor: Wanmo Wong
  • Publication number: 20100235484
    Abstract: Remotely administering a server, the server including non-volatile memory upon which is disposed one or more digital images representing the server, the server also including one or more components each of which includes non-volatile memory in which is disposed one or more digital images representing the component, where the server is connected for data communications to a management module, and remotely administering the server includes: retrieving, by the management module from the server, the digital images representing the server and the digital images representing the installed components; generating, by the management module with the digital images representing the server and the digital images representing the installed components, a graphical representation of the server with the installed components; and presenting, by the management module to a user through a GUI, the graphical representation of the server with the installed components.
    Type: Application
    Filed: March 12, 2009
    Publication date: September 16, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joseph E. Bolan, James R. Goffena, Sumeet Kochar, Adam L. Soderlund
  • Publication number: 20100169720
    Abstract: A system and associated method for determining a recovery time for a resource in a heterogeneous computing environment comprising interdependent resources. A graph for the resource representing all sequence dependencies and all group relations are created. The recovery time may be a cumulative startup time or a cumulative shutdown time of the resource considering interdependencies of the resource to other resources. The recovery time for all support resources having sequence dependencies with the resource is calculated and each node representing the support resources are removed from the graph. Then the recovery time for all member resources left in the graph that have group relations with the resource is calculated per a group type of the resource. The recovery time for the resource is a sum of the recovery time of all support resources, the recovery time of all member resources, and a unit recovery time of the resource.
    Type: Application
    Filed: December 29, 2008
    Publication date: July 1, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas Lumpp, David B. Petersen, Wolfgang Schaeberle, Juergen Schneider, Isabell Schwertle
  • Publication number: 20100156622
    Abstract: A system and method of handling poll-based alarms. The method begins by detecting a high-priority problem in a network. Next, network elements in the network related to the high-priority problem are mapped. The mapping step includes grouping network elements into focus groups wherein each focus group includes network elements having the same alarm. The mapped network elements are then polled for alarms. The polled alarms of the network elements are then correlated and processed.
    Type: Application
    Filed: December 23, 2008
    Publication date: June 24, 2010
    Inventors: Andras Veres, Szabolcs Malomsoky, Gergely Szabo, Tamas Borsos, Peter Benko, Peter Vaderna, Ferenc Kubinszky
  • Publication number: 20100162053
    Abstract: A system including one or more memory devices, and an error detection and correction method are disclosed. A memory device of the system includes an input for receiving a packet. A first portion of the packet may include at least one command byte, and a second portion of the packet may include parity bits to facilitate command error detection. The memory device may include an error manager configured to detect, based on the parity bits, whether an error exists in the at least one command byte, and circuitry configured to provide the packet to the error manager.
    Type: Application
    Filed: April 6, 2009
    Publication date: June 24, 2010
    Applicant: MOSAID Technologies Incorporated
    Inventor: Peter Gillingham
  • Publication number: 20100153816
    Abstract: A system and method for identifying the accessibility of femto base stations in a communication system. The system and method includes a plurality of macro base stations, open-access femto base stations and femto base stations with different subscriber groups. At least one of the base stations includes a transmitter configured to apply a base station identifier, such as a closed subscription group identifier, as a cyclic redundancy check (CRC) mask to XOR (exclusive OR) the CRC of a broadcast channel communication or an input to generate a scrambling sequence to the broadcast channel communication.
    Type: Application
    Filed: July 28, 2009
    Publication date: June 17, 2010
    Applicant: Samsung Electronics, Co., Ltd.
    Inventors: Ying Li, Zhouyue Pi, Farooq Khan, Baowei Ji
  • Patent number: 7734596
    Abstract: Techniques used in an automatic failover configuration having a primary database system, a standby database system, and an observer for preventing divergence among the primary and standby database systems while increasing the availability of the primary database system. In the automatic failover configuration, the primary database system remains available even in the absence of both the standby and the observer as long as the standby and the observer become absent sequentially. The failover configuration further permits automatic failover only when the observer is present and the standby and the primary are synchronized and inhibits state changes during failover. The database systems and the observer have copies of failover configuration state and the techniques include techniques for propagating the most recent version of the state among the databases and the observer and techniques for using carefully-ordered writes to ensure that state changes are propagated in a fashion which prevents divergence.
    Type: Grant
    Filed: November 24, 2006
    Date of Patent: June 8, 2010
    Inventors: Stephen John Vivian, Raymond Guzman, Douglas Andrew Voss, Benedicto Elmo Garin, Jr.
  • Publication number: 20100138711
    Abstract: Equipment protection of a switch matrix (SM) in a network node, which contains a number of matrix modules (M1.1-M4.4, E1.5-E4.6) is achieved by slicing an input signal into k parallel signal slices (x(0)-x(3)) with k>2; coding the k signal slices into a number of n coded signal slices (x(0)-x(5)) with n>k+1 using an error correcting code to add redundancy to said input signal; switching said n coded signal slices through the switching matrix (SM) via n distinct matrix modules; and decoding the n coded signal slices into k decoded signal slices to correct errors introduced while passing through said switch matrix. Preferably, the switch matrix (SM) contains a first number of matrix boards (MB1-MB4, EB5, EB6), each carrying a second number of matrix modules (M1.1-M4.4, E1.5-E4.6). The n coded signal slices are switched via matrix modules on n distinct matrix boards.
    Type: Application
    Filed: November 18, 2009
    Publication date: June 3, 2010
    Inventors: Silvio Cucchi, Giuseppe Badalucco, Carlo Costantini, Riccardo Gemelli, Luigi Ronchetti
  • Publication number: 20100125773
    Abstract: A digital broadcast receiving system and a method for controlling the same are disclosed. The method includes the steps of receiving a broadcast signal having mobile service data and main service data multiplexed therein, extracting transmission parameter channel (TPC) signaling information and fast information channel (FIC) signaling information from a data group within the received mobile service data, wherein the FIC signaling information includes a current/next (C/N) indicator, and wherein the TPC signaling information includes FIC version information, and detecting ensemble configuration information of a current MH frame.
    Type: Application
    Filed: January 21, 2010
    Publication date: May 20, 2010
    Inventors: Chul Soo Lee, In Hwan Choi, Jae Hyung Song, Sung Ryong Hong
  • Publication number: 20100050051
    Abstract: A receiving system and a data processing method are disclosed. The receiving system includes a signal receiving unit, an FIC handler, a manager, and a decoding unit. The signal receiving unit receives multiple Reed-Solomon (RS) frames comprising desired mobile service data for multiple ensembles and fast information channel (FIC) data including an indicator field, wherein the indicator field indicates whether or not the desired mobile service data are delivered through the multiple ensembles. The FIC handler obtains the indicator field from the FIC data. The manager determines at least one ensemble based upon the indicator field. And, the decoding unit decodes IP streams of the desired mobile service data from the RS frame of the determined ensemble.
    Type: Application
    Filed: August 18, 2009
    Publication date: February 25, 2010
    Inventors: Jae Hyung Song, Gomer Thomas, In Hwan Choi
  • Publication number: 20100042868
    Abstract: A method and system are provided for performing an activity. Accordingly, an activity to be performed is determined, a stored hierarchy is examined indicating a first alternate component for performing the activity first and a second alternate component for performing the activity if the first alternate component fails. The first alternate component is invoked to perform the activity, and when a failure of the first alternate component to perform the activity is detected, the second alternate component is invoked to perform the activity. A revised hierarchy is stored indicating that the second alternate component is to be invoked to perform the activity before the first alternate component is invoked to perform the activity.
    Type: Application
    Filed: February 11, 2009
    Publication date: February 18, 2010
    Applicant: FIRST DATA CORPORATION
    Inventors: Jacob Apelbaum, Elizabeth Denlea
  • Publication number: 20100031120
    Abstract: Apparatus and methods are provided to correct burst errors from a communication channel. Embodiments may include correcting burst errors in received data using a decoder configured as a Meggitt decoder with an additional selection criterion to correct a burst error having a length larger than the code error correction capability.
    Type: Application
    Filed: June 28, 2006
    Publication date: February 4, 2010
    Inventors: Andrey Vladimirovich Belogolovy, Andrei Anatol'evich Ovchinnikov, Andrey Gennadievich Efimov
  • Publication number: 20100017689
    Abstract: A vestigial sideband (VSB) modulation transmission system and a method for encoding an input signal in the system are disclosed. According to the present invention, the VSB transmission system includes a convolutional encoder for encoding an input signal, a trellis-coded modulation (TCM) encoder for encoding the convolutionally encoded signal, and a signal mapper mapping the trellis-coded signal to generate a corresponding output signal. Different types of the convolutional encoders are explored, and the experimental results showing the performances of the VSB systems incorporating each type of encoders reveals that a reliable data transmission can be achieved even at a lower input signal to noise ratio when a convolutional encoder is used as an error-correcting encoder in a VSB system.
    Type: Application
    Filed: September 21, 2009
    Publication date: January 21, 2010
    Inventors: In Hwan Choi, Young Mo Gu, Kyung Won Kang, Kook Yeon Kwak
  • Publication number: 20100011256
    Abstract: If an error occurs during workflow processing, the present invention interrupts job processing appropriately while dispersing a load to the devices. When executing a plurality of processing steps with a plurality of devices in accordance with workflow setting information that defines the sequence of processing, a workflow execution method of the present invention includes the steps of: interrupting the processing step being executed when an error occurs in a first device; searching the workflow setting information including the processing step in the first device in which the error has occurred; specifying a second device in which another processing step included in the searched workflow setting information is executed; giving a notification that the error has occurred in the first device to the second device; restarting the interrupted processing step when the first device is recovered; and giving a notification that the first device has recovered to the second device.
    Type: Application
    Filed: July 8, 2009
    Publication date: January 14, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Satoru Nakajima
  • Publication number: 20100005356
    Abstract: A receiving method and apparatus for combining Hybrid Automatic Repeat Request (HARQ) data in a wireless communication system are provided. More particularly, a method and apparatus for increasing HARQ combining capability while effectively using a limited-sized memory are provided. The receiving method for combining the HARQ data includes predicting a maximum size of currently receivable data, converting HARQ data received from a transmitting end into Log Likelihood Ratio (LLR) information, determining whether the received HARQ data is retransmitted data, if the determination result shows that the HARQ data is not the retransmitted data, determining whether the converted LLR information is compressed according to the predicted maximum data size, and storing the converted LLR information in a memory according to the determination result on whether compression is necessary.
    Type: Application
    Filed: July 7, 2009
    Publication date: January 7, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Sang Cho, Byung-Tae Kang, Jin-Woo Roh
  • Publication number: 20090323620
    Abstract: Apparatuses of a base station and terminal in a wireless communication system and their operating methods are provided. An operating method of a base station in a broadband wireless communication system includes determining whether to relocate at least one persistently allocated resource, when it is determined to relocate the at least one persistently allocated resource, relocating the at least one persistently allocated resource, generating a resource relocation Information Element (IE) indicative of the resource relocation using an offset of a Resource Block (RB), and transmitting the resource relocation IE.
    Type: Application
    Filed: June 29, 2009
    Publication date: December 31, 2009
    Applicant: SAMSUNG ELECTRONICS CO. LTD.
    Inventors: Se-Ho KIM, Chang-Yoon OH, Jun-Sung LIM, Hee-Won KANG
  • Publication number: 20090327819
    Abstract: A method, system and machine-readable storage medium for providing fault tolerance in a distributed mobile architecture (dMA) system. The method includes receiving a message or failing to receive the message within a predetermined time relating to a first dMA gateway (dMAG) at a second dMAG. It is determined whether the first dMAG is not operational or is otherwise offline based on the received message or the failure to receive the message. One or more dMA nodes associated with the first dMAG are notified in order to request connections to an external system via the second dMAG. The external system is also notified to request connections to one or more dMA nodes associated with the first dMAG via the second dMAG.
    Type: Application
    Filed: June 27, 2008
    Publication date: December 31, 2009
    Applicant: Lemko, Corporation
    Inventor: Shaowei Pan
  • Publication number: 20090276686
    Abstract: A method and apparatus are described for protecting real time media including receiving media packets, generating media bit strings from the media packets, applying a forward error correcting code across the generated media bit strings to generate at least one forward error correcting bit string and generating at least one forward error correcting packet from the at least one forward error correcting bit string. Also described are a method and apparatus for recovering from losses of real time media packets including forming media bit strings from received media packets, forming forward error correcting bit strings from received forward error correcting packets, decoding the formed media bit strings and forward error correcting bit strings to obtain recovered media bit strings and recover lost media packets from the recovered media bit strings. Further described is a data structure for a forward error correcting header on computer readable media.
    Type: Application
    Filed: December 21, 2006
    Publication date: November 5, 2009
    Inventors: Hang Liu, Mary-Luc Champel, Mingquan Wu, Xiaojun Ma, Huanqiang Zhang, Jun Li
  • Publication number: 20090271685
    Abstract: The present invention discloses a packet processing method, comprising: A. the transmitter acquiring the redundancy information based on the payload of at least one transmitted packet and transmitting the redundancy information to the receiver; B. the receiver restoring the payload of the abnormal packet according to the redundancy information relating to the abnormal packet. The present invention also discloses the packet transmitting apparatuses and packet receiving apparatuses. By performing error correction and restoration for abnormal packets, the present invention improves packet transmission reliability and thus the quality of transmitted media streams.
    Type: Application
    Filed: May 10, 2007
    Publication date: October 29, 2009
    Applicant: H3C TECHNOLOGIES CO., LTD.
    Inventors: Yutian Li, Gang Zhao
  • Publication number: 20090219990
    Abstract: A system and method for transmitting video signals to a plurality of receivers in a multicast session, including controlling and adapting coding, transmission and protection schemes of a plurality of layers of a network protocol stack are described.
    Type: Application
    Filed: August 30, 2005
    Publication date: September 3, 2009
    Inventors: Liqiao Han, Hang Liu, Kumar Ramaswamy
  • Publication number: 20090222709
    Abstract: The Universal Packet Loss Recovery System is capable of recovering end-to-end network packet losses to obtain reliable end-to-end network delivery of multimedia streaming content over Internet Protocol (IP) networks, where packet losses appear above the transport layer. This system incorporates the use of Packet Forward Error Correction Coding (FEC) with packet interleaving processing prior to transport. Packet FEC Coding is an error correction coding method at the packet level which improves link transmission reliability. At the source end of the packet-switching network, the Packet FEC Coding scheme encodes a stream of transport multimedia content packets by including redundant packets to allow for recovery of lost packets by the Packet FEC Coding decoder at the user end of the packet-switching network. Since lost packets appear only above the transport layer in the IP network protocol stack, Packet FEC Coding can be viewed as a transport layer or application layer coding method.
    Type: Application
    Filed: February 28, 2008
    Publication date: September 3, 2009
    Applicant: IP Video Communications Coporation
    Inventors: Shu Lin, Harry Tan, Robert M. Liang
  • Publication number: 20090199071
    Abstract: Various embodiments of the present invention provide systems and circuits that provide for LDPC decoding and/or error correcting. For example, various embodiments of the present invention provide LDPC decoder circuits that include a soft-input memory, a memory unit, and an arithmetic unit. The arithmetic unit includes a hardware circuit that is selectably operable to perform a row update and a column update. In such cases, a substantial portion of the circuitry of the hardware circuit used to perform the row update is re-used to perform the column update.
    Type: Application
    Filed: February 5, 2008
    Publication date: August 6, 2009
    Inventor: Nils Graef
  • Publication number: 20090193288
    Abstract: Systems and methods that provide for assignment and recovery of tokens as part of a plurality of nodes and distributed application framework/network. The assignment component assigns numbers and tasks to candidates and facilitates multiple leader election. Moreover, a recovery component can recover a token for a node that leaves the network (e.g., crashes). Such recovery component ensures consistency, wherein only one server is assigned recovery of the token and associated tasks.
    Type: Application
    Filed: January 25, 2008
    Publication date: July 30, 2009
    Applicant: MICROSOFT CORPORATION
    Inventors: Gopala Krishna Reddy Kakivaya, Lu Xun
  • Publication number: 20090183054
    Abstract: An information recording medium, a recording and/or reproducing apparatus, and a recording and/or reproducing method in which an access time and a frequency of seek operations can be reduced in the information recording medium implementing logical overwrite, thereby allowing noise and power consumption to be reduced. The information recording medium includes: a first area in which user data is recorded and replacement data for replacing defect data among the user data by logical overwrite is recorded; and a second area in which the user data recorded in the first area is copied and recorded, wherein when the user data recorded in the first area is copied and recorded in the second area, the replacement data for replacing the defect data is copied and recorded in a location where the detect data would have been recorded.
    Type: Application
    Filed: July 30, 2008
    Publication date: July 16, 2009
    Applicant: Samsung Electronics, Co., Ltd.
    Inventors: Joon-hwan KWON, Kyung-Geun Lee, Sung-hae Hwang
  • Publication number: 20090177948
    Abstract: A system, method and apparatus are provided for encoding and decoding a source file. The source file is encoded by dividing it into a plurality of shares comprised of a plurality of packets. A bit vector is generated. For at least one share, an FEC packet is generated by XOR'ing a subset of packets from the plurality of packets in the share in accordance with the bit vector. The process of encoding continues until terminated. Once the FEC encoded packets are received, each of the plurality of packets which is not a linear combination of previously received packets is stored into a file. A sequence of XOR operations to perform in-place on the file to reconstruct the source file are generated and performed on the file.
    Type: Application
    Filed: March 16, 2009
    Publication date: July 9, 2009
    Applicant: KENCAST, INC.
    Inventors: Michael J. Fischer, H. Lewis Wolfgang, Weimin Fang