Abstract: Embodiments of the invention are generally directed to systems, methods, and apparatuses for reliability, availability, and serviceability solutions for memory technology. In some embodiments, a host determines the configuration of the memory subsystem during initialization. The host selects a write cyclic redundancy code (CRC) mechanism and a read CRC mechanism based, at least in part, on the configuration of the memory subsystem. Other embodiments are described and claimed.

Abstract: In response to detecting a failed server, subscription message processing of a failover server is stopped. A subscription queue of the failed server is opened. A marker message is published to all subscribers of a particular messaging topic. The marker message includes an identification of the failover server managing the subscription queue of the failed server. Messages within the subscription queue of the failed server are processed. In response to determining that a message in the subscription queue of the failed server is the marker message, the subscription queue of the failed server is closed. Then, the failover server resumes processing of its original subscription queue looking for the marker message, while processing yet unseen messages from the queue. Once the marker message is found in the original subscription queue, normal operation is resumed.

Abstract: A method performs a hybrid automatic repeat-request (HARQ) operation in a wireless orthogonal frequency division multiple access (OFDMA) network. A quality of a channel between a transmitter and a receiver is estimated as an error metric. A packet for the HARQ operation is fragmented adaptively at the transmitter according to the estimated error metric. The fragmentation is performed at the HARQ layer when the error metric is less than a predetermined threshold, otherwise the fragmentation is performed at the MAC layer.

Abstract: A means is presented by which two trellis stages can be processes simultaneously and in parallel with one another (e.g., during a single clock cycle) thereby significantly increasing data throughput. Any one or more modules within a REX module can be implemented using a radix-4 architecture to increase data throughput. For example, any or more of a SMU (Survivor Memory Unit), a PED (Path Equivalency Detector), and a RMU (Reliability Measure Unit) can be implemented in accordance with the principles of radix-4 decoding processing.

Abstract: ACS (Add Compare Select) implementation for radix-4 SOVA (Soft-Output Viterbi Algorithm). A means is presented by which two trellis stages can be processes simultaneously and in parallel with one another (e.g., during a single clock cycle) thereby significantly increasing data throughput. During each processing iteration, the ACS module generates a hard decision for each of two trellis stages, as well as a corresponding reliability for each of the two hard decisions. Also, the ACS module is operable to generate the updated state metric for the state at the current trellis stage as well. Multiple operations are performed simultaneously and in parallel, and control logic circuitry and/or operations employed to select which of the multiple simultaneously-generated resultants is to be employed for each of the hard decisions, reliabilities, and next state metric for the current trellis stage.

Abstract: Embodiments of the invention relate to methods and systems for error detection and recovery from errors during pipelined execution of data. A cascaded, delayed execution pipeline may be implemented to maintain a precise machine state. In some embodiments, a delay of one or more clock cycles may be inserted prior to a write back stage of each pipeline to facilitate error detection and recovery. Because a precise machine state is maintained error detection and recovery mechanisms may be built directly into register files of the system. If an error is detected execution of the instruction associated with the error and all subsequent instructions may be restarted.

Abstract: An information providing device includes: a registration information memory unit for memorizing registration information from a database management system; a request information receiving unit for receiving request information for screen information transmitted from a terminal device upon an instruction from a user; an expiration date lapse judgment unit for judging whether or not an expiration date set up for the registration information elapses when request information is received; a registration information acquisition/update unit for acquiring the registration information when the expiration date elapses; an acquisition error detection unit; a screen information generation unit for generating the screen information when the registration information is acquired through the program interface; a screen information transmission unit; and an appropriateness judgment information generation unit for generating appropriateness judgment information used for judging whether or not the screen information is appro

Abstract: A data processing system for storing and identifying footprint data in a data processing system enabling automated collection, identification and formatting recovery of footprint data executing on a mainline routine. A footprint area is allocated onto a failure recovery routine stack for use by the mainline routine for storing footprint data. The mainline routine stores footprint data within the first footprint area. The data processing system can then receive a request from a diagnostic tool, where the request includes at least one search parameter. The data processing system can output any footprint data to a diagnostic tool corresponding to the search parameters in the request.

Abstract: There is provided a method and system for replicating data at another location. The system includes a source node that contains data in a data storage area. The source node is coupled to a network of potential replication nodes. The processor determines at least two eligible nodes in the network of nodes and determines the communication cost associated with a each of the eligible nodes. The processor also determines a probability of a concurrent failure of the source node and each of eligible nodes, and selects at least one of the eligible nodes for replication of the data located on the source node. The selection is based on the determined communication costs and probability of concurrent failure.

Abstract: A method and apparatus for handling data error in a data transmission system including a relay station which receives a data from a transmission apparatus and transmits the data to a receiving apparatus is provided. A relay station which transmits, to a receiving apparatus, a data received from a transmission apparatus, the relay station including: a data receiver to receive the data from the transmission apparatus; an error detector to detect whether an error of the received data is generated; and a data transmitter to transmit the received data and an error generation indicator for the received data to the receiving apparatus when the error is generated. According to the present invention, it is possible to combine transmitted data with retransmitted data and decode error-free data by transmitting data including a generated error to a receiving apparatus when error is again generated in the retransmitted data.

Abstract: Methods, systems, and products are disclosed for verifying the integrity of web server content. A client-side integrity verification of a web page communicated from a web server to a client computer is received. A server-side error in the web page is received from the web server. The results of the client-side integrity verification are merged with the server-side error. The results of the client-side integrity verification and the server-side error are presented.

Abstract: There is provided with a transmitter including: an input unit configured to input a data symbol sequence; a block generator configured to sequentially generate data blocks each including a plurality of data symbols by using the data symbol sequence; an addition unit configured to add a duplicate of h data symbols at an end of a first data block to a head of the first data block as a cyclic prefix to obtain a first data block with the cyclic prefix; and a transmission unit configured to transmit the first data block with the cyclic prefix, wherein the block generator uses, as k data symbols that precede the h data symbols at the end of the first data block, a duplicate of k data symbols at an end of a second data block that precedes the first data block.

Abstract: An information processing apparatus has an error correction function for checking an error of stored data read out from a flash memory. If an error is found, error information thereof is temporarily stored into a register and then stored in a nonvolatile memory at an appropriate timing. At an appropriate timing such as power-on, the information processing apparatus reads the stored data in which the error is found again on the basis of the error information stored in the nonvolatile memory, corrects the error and then rewrites the stored data into the flash memory. It is thereby possible to repair a recoverable bit error such as a read disturb. Therefore, a normal read operation can be performed without a hitch, and this can avoid giving any uncomfortable feeling to users.

Abstract: A depuncturing unit depunctures a punctured convolutional code sequence and outputs the result to a decoding execution unit. The decoding execution unit executes Viterbi decoding, and it includes an ACS processing unit with a variable radix. A radix control unit controls a radix of the ACS processing unit according to a puncturing rate indicating a degree of puncturing of the convolutional code sequence which is acquired by a header analysis unit in a subsequent stage, in such a way that the radix of the ACS processing unit is larger as the puncturing rate is higher.

Abstract: An apparatus and method for transmitting an ACK/NACK message from an RS in a wireless communication system using relaying is disclosed, in which the RS checks scheduling information for data transmission from a lower node, receives data from the lower node according to the scheduling information, checks errors in the data, generates error report information indicating whether the data has errors, and transmits the error report information to an upper node.

Abstract: A cyclic redundancy check (CRC) is used for improving error check coverage during memory access. In memory reading process, a part of read data is outputted from the memory via a CRC bus, and a CRC result and the other part of the read data are outputted from the memory via a data bus.

Abstract: In a method and apparatus to conceal an error in an audio signal, when the current frame has no error and a past frame input prior to the current frame has an error, a parameter for the past frame is generated using a parameter for the current frame and a parameter of a frame out of frames input prior to the past frame and a previously stored parameter is updated with the generated parameter, thereby concealing an error of an audio signal without additional delay and preventing degradation in sound quality in a frame that is input after a frame having an error.

Abstract: According to one embodiment, a storage apparatus includes: a data transmission unit capable of transmitting data to a host apparatus in a data format in which a content to be transmitted to the host apparatus is accompanied by a CRC; a storage medium in which the content is stored; an error detection unit capable of detecting a reading error occurring in a processing in which the content is read from the storage medium; and an error information recording unit making the error information detected by the error detection unit be stored in an error information storage part. Further, the storage apparatus includes a CRC selection unit capable of selecting, based on the error information, whether to create a normal CRC or to intentionally create a mismatching CRC to make the host apparatus detect a CRC error in creating the CRC concerning the content.

Abstract: A method for securely transmitting data messages between at least one transmitting unit and at least one receiving unit of an HVDCT system. Each transmitting unit is connected to each receiving unit via at least two connection channels. Each data message is provided with a message counter that uniquely characterizes the data message, and each transmitting unit transmits the data message to each receiving unit via all of the connection channels. The message counter is calculated using an incrementing rule that is clocked by the transmission of the data messages. Each receiving unit uses the same incrementing rule, which is clocked by the reception of data messages, to calculate a comparison counter. Each transmitting unit stores data messages which have already been transmitted in a transmission buffer, and the receiving unit compares the message counter of each received data message with the comparison counter.

Abstract: Segregation of redundant control bits in an ECC permuted, systematic modulation code. Appropriately encoding of user information via combined modulation and RS (Reed-Solomon) encoding ensures segregation of scrambled user information, modulation redundancy bits, and RS redundancy bits in such a way that each of the components thereof can be segregated and stored within any desirable digital information memory storage device. By providing this segregated capability, when accessing a portion of a RS codeword from the memory, an entire RS codeword need not be read from the memory. In fact, only the particular field (or bits) needs to be accessed to perform correction thereon. This segregation provides for a reduction in the hardware complexity of translation between user information and a modulation codeword. Also, this segregation provides for the ability to perform correction of only one of the scrambled user information, the modulation redundancy bits, or the RS redundancy bits.

Abstract: In a data recovery processing, the conventional overhead, primarily, latency due to a rotational recording media is removed. Secondary, in a signal processing or in a recording and reproducing apparatus, reliability of data reproduction is improved by repeatedly processing data. These processing are achieved that input signal, i.e., raw analog signal read from the recording media is digitized to be stored in a secondary storage such as a memory or a FIFO memory. The apparatus includes a signal processing circuit to repeatedly process the stored digital signal in the secondary storage. When detecting data, operation of the circuit is efficiently controlled by a change over detector parameters, in which characteristics for the detecting performance. Resultantly, data recovery processing speed is increased and reliability of data reproduced is improved.

Abstract: A method for communication includes encoding data using at least one Error Correction Code (ECC) to generate first and second output data streams. The first output data stream is processed to generate a first output signal, which has a first acquisition time. The second output data stream is processed to generate a second output signal, which has a second acquisition time that is smaller than the first acquisition time. The first and second output signals are transmitted simultaneously over a communication channel.

Abstract: This is a method for controlling the decoding of a LDPC encoded codeword composed of several digital data, said LDPC code being represented by a bipartite graph between check nodes (CN1) and variable nodes (VNi). Said method comprises updating messages exchanged iteratively between variable nodes (VN1) and check nodes (CN1). Said method comprises, at each iteration, calculating for each variable node a first sum (?n)=of all the incident messages (?i) received by said variable node and the corresponding digital data (?ch) and calculating a second sum (VNRnew) of all the absolute values of the first sums (?n), and stopping the decoding process if the second sum (VNRnew) is unchanged or decreases within two successive iterations and if a predetermined threshold condition is satisfied.

Abstract: A flexible and relatively hardware efficient LDPC encoder is described. The encoder can be implemented with a level of parallelism which is less than the full parallelism of the code structure used to control the encoding process. Each command of a relatively simple microcode used to describe the code structure can be stored and executed multiple times to complete the encoding of a codeword. Different codeword lengths can be supported using the same set of microcode instructions but with the code being implemented a different number of times depending on the lifting factor selected to be used. The LDPC encoder can switch between encoding codewords of different lengths, without the need to change the stored code description information, by simply changing a code lifting factor used to control the encoding processes. When coding codewords shorter than the maximum supported codeword length some block storage locations and/or registers may go unused.

Abstract: Techniques used in an automatic failover configuration having a primary database system, a standby database system, and an observer for preventing divergence among the primary and standby database systems while increasing the availability of the primary database system. In the automatic failover configuration, the primary database system remains available even in the absence of both the standby and the observer as long as the standby and the observer become absent sequentially. The failover configuration further permits automatic failover only when the observer is present and the standby and the primary are synchronized and inhibits state changes during failover. The database systems and the observer have copies of failover configuration state and the techniques include techniques for propagating the most recent version of the state among the databases and the observer and techniques for using carefully-ordered writes to ensure that state changes are propagated in a fashion which prevents divergence.

Abstract: There are provided a customer premise equipment (CPE) device, a corresponding method, and a Digital Subscriber Line Access Multiplexer (DSLAM) for connecting to a digital network and performing forward error correction (FEC). The CPE device includes a decoder for decoding one of a plurality of incremental FEC signals for media content. Each of the plurality of incremental FEC signals is for providing incrementally increasing levels of FEC for the media content.

Abstract: Systems and methods provide an optionally keyed error-correcting code that is spectrally concentrated. Each codeword of the low dimensional spectral concentration code (LDSC code) typically has very few coefficients of large magnitude and can be constructed even with limited processing resources. Decoding can be performed on low power devices. Error-correcting code is constructed around a key using basic computer arithmetic for computations instead of finite field arithmetic, thus saving energy. A recipient who possesses the key enjoys correction of a relatively high percentage of noise errors. In one implementation, a direct list-decoder iteratively estimates a list of message words directly, instead of a list of codewords. In variations, a unique message word is selected from the list either by applying a randomness test or by using message passing.

Abstract: Techniques used in an automatic failover configuration having a primary database system, a standby database system, and an observer for preventing divergence among the primary and standby database systems while increasing the availability of the primary database system. In the automatic failover configuration, the primary database system remains available even in the absence of both the standby and the observer as long as the standby and the observer become absent sequentially. The failover configuration further permits automatic failover only when the observer is present and the standby and the primary are synchronized and inhibits state changes during failover. The database systems and the observer have copies of failover configuration state and the techniques include techniques for propagating the most recent version of the state among the databases and the observer and techniques for using carefully-ordered writes to ensure that state changes are propagated in a fashion which prevents divergence.

Abstract: A reception apparatus, method and a program using the reception method are provided to prevent degradation of reception quality due to interference. In a reception apparatus, an ADC samples data rIq[k] and rQq[k]. Based on the sampled data, a level detector finds an interference evaluation value Cc[l] for each OFDM symbol by counting the number of times one of the data rIq[k]q and rQq[kq] is clipped to the maximum output range of the ADC. When the interference evaluation value Cc[l] is greater than or equal to an interference decision value thc, a weighting control section corrects a soft-decision value wl,m,n by multiplying it by a weighting factor ?c so as to decrease contribution of an error correction code to decoding.

Abstract: A method and system to remotely log debug information is described. A computer executing program code generates debug information upon the occurrence of an error in execution. The debug information is then sent to a remote computer using a network adaptor. In one embodiment, the computer executing the program is Extensible Firmware Interface (EFI) compliant.

Abstract: A system and method for reducing power consumption in a Low Density Parity-Check Code (LDPC) decoder includes a sleep mode checking module and a gating circuit. The sleep mode checking module checks whether a check node is in sleep mode. The check node is considered to be in sleep mode when the absolute value of the message going to each of the one or more bit nodes corresponding to the check node is greater than a threshold value. The gating circuit turns OFF a Check Node and Bit Node Update Unit (CNBNU) associated with the check node when the check node is in the sleep mode. Turning OFF a CNBNU stops the exchange of messages between the check node and its corresponding one or more bit nodes.

Abstract: The present invention relates to a method for transmitting data packets from a mobile terminal to a base station using a hybrid automatic repeat request protocol and soft combining of received data. Further, the present invention provides a base station and a mobile terminal both adapted to perform the respective method steps. Moreover, a communication system is provided which comprises at least one base station and at least one mobile terminal. The present invention also provides a computer-readable medium for storing instructions that, when executed on a processor, cause the processor to transmit data packets from a mobile terminal to a base station using a hybrid automatic repeat request protocol and soft combining of received data. In order to restrict the interference caused by retransmissions, the present invention suggests controlling the amount of information in the retransmissions and thus the transmission power required for their transmission by TFCS restriction.

Abstract: A method for processing data of a received frame in a receiver of a broadband wireless communication system. The received data processing method includes extracting, from control information for data of one frame having multiple bursts, burst sizes of bursts constituting the frame and modulation scheme information applied to the frame; assigning burst identifiers (IDs) used for identifying the bursts, and assigning burst partial IDs to data concatenations having concatenation sizes based on the burst sizes and the modulation scheme information; forming, in a memory, burst regions for storing the data concatenations according to the burst IDs; dividing received data of one slot included in the frame into data concatenations based on the concatenation sizes, and decoding the data concatenations; and sequentially storing the decoded data concatenations in the memory according to a burst ID and a burst partial ID corresponding to each of the decoded data concatenations.

Abstract: An approach is provided for transmitting messages using low density parity check (LDPC) codes. Input messages are encoded according to a structured parity check matrix that imposes restrictions on a sub-matrix of the parity check matrix to generate LDPC codes. The LDPC codes are transmitted over a radio communication system (e.g., satellite network), wherein a receiver communicating over the radio communication system is configured to iteratively decode the received LDPC codes according to a signal constellation associated with the LDPC codes. The receiver is configured to iteratively regenerating signal constellation bit metrics after one or more decoding iterations.

Abstract: A digital data recording/reproducing method includes the steps of: interleaving data on a PI code for each PI code of a 208-row ECC block; and converting a short burst error into random errors by dispersing errors on the PI codes. Moreover, the digital data recording/reproducing method increases correction capability against several bytes to several tens bytes of errors generated at random without changing burst error correction length by performing this processing for respective PI codes by using interleave rules that are different as much as possible from one another.

Abstract: A system and method for soft decision forward error correction (FEC) decoding may be used to determine a possible error in a differential detection signal, for example, in a DPSK system. The system and method uses the constructive and destructive signals from a demodulator to provide an error locating signal. Using the error locating signal, the system and method converts the differential detection signal into a soft decision signal including multi-level soft values.

Abstract: In an interpretation interval INTALL used in a communication system, there are provided a future-direction interval INTF associated with a 5-bit sequence number (LastSendAckNum) transmitted after LastSendAckNum ±0, and a past-direction interval INTP associated with a 5-bit sequence number (LastSendAckNum) transmitted prior to LastSendAckNum ±0. A transmitter side encodes a 13-bit sequence number into the 5-bit sequence number while setting, as an upper limit, the 5-bit sequence number associated with the future-direction interval INTF.

Abstract: A digital television transmitting system includes a pre-processor, a packet generator, an RS encoder, and a trellis encoder. The pre-processor pre-processes enhanced data by coding the enhanced data for first forward error correction and expanding the FEC-coded enhanced data. The packet generator generates enhanced data packets including the pre-processed enhanced data and main data packets and multiplexes the enhanced and main data packets. Each enhanced data packet includes an adaptation field in which the pre-processed enhanced data are inserted. The RS encoder performs RS encoding on the multiplexed data packets for second forward error correction, and the trellis encoder performs trellis encoding on the RS-coded data packets.

Abstract: A method and apparatus are disclosed for forming a frame of interleaved information bits in a communication system, where the decoding of the frame of interleaved information bits may begin before all of the bits in the frame are received. An exemplary interleaved frame is formed by receiving a frame of N information bits within the communication system; encoding the information bits at a code rate R to provide encoded bits; and arranging the encoded bits into a frame of N/R coded bits, wherein a plurality of puncturing patterns pi are applied to the frame of N/R coded bits such that a code rate of R/ai is produced for each of the plurality of puncturing pattern pi. The arrangement of encoded bits involves applying a puncturing pattern pj to the encoded bits; and applying a permutation function to the punctured encoded bits to generate a fractional section of the frame of N/R coded bits. The fractional section of the frame of N/R coded bits comprises N/R*aj bits.

Abstract: RAID control of multiple hard disk drives in a computer system includes performing a fault-tolerant data computing operation for a written data.

Abstract: A product code encoder for non-volatile (NV) memory includes a first encoder that encodes data in codewords in a first dimension that is stored in the NV memory. The product code encoder also includes a second encoder that encodes data in codewords in a second dimension that is stored in the NV memory. A product code codeword is based on the codewords in the first dimension and the codewords in the second dimension.

Abstract: Application-level replication, the synchronization of data updates within a cluster of application servers, may be provided by having application servers themselves synchronize all updates to multiple redundant databases, precluding the need for database-level replication. This may be accomplished by first sending a set of database modifications requested by the transaction to a first database. Then a message may be placed in one or more message queues, the message indicating the objects inserted, updated, or deleted in the transaction. Then a commit command may be sent to the first database. The set of database modifications and a commit command may then be sent to second database. This allows for transparent synchronization of the database and quick recovery from a database failure, while imposing little performance or network overhead.

Abstract: Systems and methods for repairing a processor are provided. In one embodiment, a method for repairing a processor is provided that includes, for example, the steps of initializing and executing an operating system, determining that a cache element is faulty, and swapping in a spare cache element for said faulty cache element while the operating system is executing.