Abstract: Methods, systems, and computer-readable media to compare values of a bounded domain are disclosed. A particular method includes, for each value in a bounded domain, determining a corresponding set of allowable errors associated with the value. The sets of allowable errors are stored at a memory. The method includes determining a comparison score between a first value of the bounded domain and a second value of the bounded domain based on a comparison of a first set of allowable errors corresponding to the first value and a second set of allowable errors corresponding to the second value.

Abstract: An information processing apparatus includes active units and a standby unit. In the active units and the standby unit, CPUs and DIMMs are divided into a plurality of logical partitions, which are controlled to be diagnosed respectively by diagnosing units. A scheduling unit periodically diagnoses the CPUs and the DIMMs of the standby unit in each of the partitions in turn. If a fault occurs on the active units side, a switching controlling unit controls a partition not being diagnosed in the standby unit to be embedded in an active unit system of the information processing apparatus. The scheduling unit instructs a diagnosis with a smaller number of diagnosis items as a diagnosis performed at reboot after the standby unit is embedded.

Abstract: A computer system functions to dynamically assign the storage capacity to the host computer. If an event such as a failure occurs in the logical resources, the performance requirements of the virtual volumes must be guaranteed to the host computer. Accordingly, the computer system comprising a storage apparatus, wherein the storage apparatus detects the occurrence of an event in the logical resources, compares the performance of the logical resources where the event occurred with the performance of the virtual volumes and, in accordance with the result of the comparison, sets the correspondence relationship of the virtual volumes to the logical resources.

Abstract: Provided are an apparatus and method for processing data of flash memory. The apparatus includes a user requesting unit to request a data operation using a predetermined logical address, a transformation unit to transform the logical address into a physical address, and a control unit to record count data counting the number of predetermined bits of data, in an index region to indicate whether the data is valid when conducting the data operation.

Abstract: Detection of whether a result of a floating point operation is safe. Characteristics of the result are examined to determine whether the result is safe or potentially unsafe, as defined by the user. An instruction is provided to facilitate detection of safe or potentially unsafe results.

Abstract: Methods and apparatus are provided for verifying the integrity of a signal transmitted across a multiple rail data bus. The method and apparatus provide for independently processing a signal by a first processor and a second processor, the first and second processors being connected in parallel thereby generating a first processed signal and a second processed signal. Each of the processed signals is split into a first component sequence and a second component sequence, the first component sequences being different from the second component sequences. It is then determined that the first component sequences are not identical and that the second component sequences are not identical. If either of the first component sequences is not identical, or if either of the second component sequences is not identical, then an error signal is transmitted to a receiving device via a first or second rail of the bus.

Abstract: A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link interface, is to transmit the write data. A delay element is coupled to an output from the encoder. A receiver, coupled to the link interface, is to receive second error-detection information corresponding to at least the portion of the write data. Error-detection logic is coupled to an output from the delay element and an output from the receiver. The error-detection logic is to determine errors in at least the portion of the write data by comparing the first error-detection information and the second error-detection information, and, if an error is detected, is to assert an error condition.

Abstract: Methods and apparatus for executing an application are disclosed. In accordance with one embodiment, a request is received. One or more of a plurality of module types are instantiated such that a plurality of module objects are generated. A query plan linking the plurality of module objects is executed such that a response to the request is generated. The response is then returned.

Abstract: Dependencies between different channels or different services in a client or server may be determined from the observation of the times of the incoming and outgoing of the packets constituting those channels or services. A probabilistic model may be used to formally characterize these dependencies. The probabilistic model may be used to list the dependencies between input packets and output packets of various channels or services, and may be used to establish the expected strength of the causal relationship between the different events surrounding those channels or services. Parameters of the probabilistic model may be either based on prior knowledge, or may be fit using statistical techniques based on observations about the times of the events of interest. Expected times of occurrence between events may be observed, and dependencies may be determined in accordance with the probabilistic model.

Abstract: When a CPU executes a failure detection program, the CPU causes a program counter expected value register to store an expected value of an address which is stored in a program counter after a detection time passes from the start of execution of the failure detection program, and causes a detection time counter to start counting of the detection time. When the detection time counter finishes counting of the detection time, the first comparator outputs as a failure detection result a result of comparison between the address stored in the program counter and the expected value stored in the program counter expected value register.

Abstract: A plurality of integrated circuits in a system, each having a program memory loaded with different sections of a program, and a second memory. The integrated circuits perform the program, such that, when one of the integrated circuits requires a portion of the program, which is contained in its own program memory, it extracts it from the program memory and uses it, but when it requires a portion of the program, which is not contained in its own program memory, it reads it from the program memory of one of the other integrated circuits into its second memory and runs that portion of the program from there. In one example, the system is a line card, and the program is specific to one DSL protocol.

Abstract: A method performed by a domain name service client includes storing DNS entries in a local cache; sending a DNS query to another device to obtain an update to one of the DNS entries; determining whether a DNS response is received; and resetting a time-to-live (TTL) timer associated with the one of the DNS entries when the DNS response is not received.

Abstract: Electronic apparatus, systems, and methods to construct and operate the electronic apparatus and/or systems include a memory unit configured to receive data flow from two directions. The memory unit can be configured serially in a chain with other memory units. The chain can include an error check and correcting unit (ECC). Additional apparatus, systems, and methods are disclosed.

Abstract: Provided is a deterministic component model determining apparatus that determines a type of a deterministic component included in a probability density function supplied thereto, comprising a standard deviation calculating section that calculates a standard deviation of the probability density function; a spectrum calculating section that calculates a spectrum of the probability density function; a null frequency detecting section that detects a null frequency of the spectrum; a theoretical value calculating section that calculates a theoretical value of a spectrum for each of a plurality of predetermined types of deterministic components, based on the null frequency; a measured value calculating section that calculates a measured value of the spectrum for the deterministic component included in the probability density function, based on the standard deviation and the spectrum; and a model determining section that determines the type of the deterministic component included in the probability density function

Abstract: A computerized method for collecting error data and providing error reports relating to occurrences of errors of software applications installed on one or more computing devices is disclosed. Data for describing software applications and identifying software application errors is collected from the computing devices and stored in a catalog. Data associated with error occurrences is obtained and combined with related data being stored in the catalog. A report is generated based on the error occurrences and related catalog data.

Abstract: Even if data includes a defect or an outlier in features thereof, the influence of the defect or the outlier of the features is suppressed to perform a highly precise abnormality detection, and data including high-dimensional features is processable to accomplish the highly stable detection of an abnormality. Disclosed is an abnormality detection system which detects abnormal data in a data sequence including data of multi-dimensional features, and the system includes storing or generating a generation distribution of features of the data and reference data indicative of normal data; obtaining, every piece of the data sequence, a probability that when features are virtually generated from the generation distribution, the features are nearer to the reference data than the features of each piece of the data; and taking the probability as a one-dimensional dissimilarity degree between each piece of the data and the reference data, thereby determining abnormal data.

Abstract: An information processing apparatus comprising: a plurality of processing units; a plurality of individual monitoring units provided for each of the plurality of processing units, that monitor an operation condition of a corresponding processing unit, and judge whether or not the corresponding processing unit is operating normally, and notify the judgment result for the corresponding processing unit to outside; and an administrative unit connected to the plurality of individual monitoring units, that receives notification from any of the individual monitoring units, and performs troubleshooting processing on a processing unit corresponding to an individual monitoring unit that has made a notification that a corresponding processing unit is not operating normally.

Abstract: An information processing apparatus includes: a first communication section which communicates with an external device having a diagnosis function of a network using a first communication method; a second communication section which communicates with the external device using a second communication method; a first transmission section which transmits a diagnosis request to the external device through the first communication section; and a second transmission section which transmits a diagnosis signal to the external device through the second communication section, after transmission of the diagnosis request.

Abstract: A system and method for providing fault detection capability is provided which comprises a first node (2). The first node (2) comprises a first processing subsystem (5) generating data (14) to be transmitted. The first node (2) has a fault supervisor unit (13) adapted to gather and process fault indications arising in the first node (2). The first processing subsystem (5) and the fault supervisor unit are both integrated in the first node (2). The first node (2) is structured such that, when no fault indications are detected by the fault supervisor unit (13), the fault supervisor unit (13) provides a first key (15) as a validity key, and, when at least one fault indication is detected by the fault supervisor unit (13), the fault supervisor unit (13) provides a second key (16) as the validity key, and the data (14) to be transmitted are encrypted by overlaying the respective validity key (15; 16) on the data.

Abstract: An apparatus includes a receiver, an error detection unit, and an acknowledgement unit. The receiver may receive frames of data from a transmitter unit of a second apparatus via a first communication path. The error detection unit may detect data errors in the frames of data received via the first communication path. The acknowledgment unit may maintain an acknowledgement indicator indicative of whether frames received by the apparatus are error free. In response to the error detection unit detecting an error, the acknowledgement unit may indicate an error condition exists by freezing a value of the acknowledgement indicator, or alternatively the acknowledgement unit may set a current value of the acknowledgement indicator to a predetermined error value. Further, the apparatus may successively convey values of the acknowledgement indicator to the second apparatus via a second communication path while the apparatus is receiving frames.

Abstract: There is provided an analysis server including a first verifying unit that analyzes data acquired from a local power management system composed of an electronic appliance provided with a sensor and a power management apparatus managing power supply to the electronic appliance connected to a power network, by using history information of the local power management system or data acquired from another local power management system with a power usage state similar to that of the local power management system, a second verifying unit that analyzes the data acquired from the local power management system, by using an estimated value calculated by simulation using characteristics information and/or specification information of the electronic appliance, and a control unit that controls the first verifying unit and the second verifying unit.

Abstract: When a data write request to a disk drive 210 is received from a host computer 20, a first error detecting code of write data to be written to the disk drive 210 in response to the data write request is generated and stored, write processing of the write data to the disk drive 210 is executed, whether or not response time as time required for the write processing exceeds a predetermined threshold value is determined, data stored in a sector as a writing destination of the write data is read from the sector when the response time exceeds the threshold value, a second error detecting code of the read data is generated, and when the first error detecting code and the second error detecting code are compared with each other and the two codes do not coincide with each other, a signal indicating that the write processing is not normally performed is generated.

Abstract: A method includes receiving at a computing system empirical data related to one or more information technology entities. The method further includes receiving at the computing system one or more user experience indicators, the user experience indicators indicative of a user's experience using a computer application. The method further includes correlating by the computing system the empirical data with the one or more user experience indicators to determine a quality of service delivered to a user for a plurality of time periods. The method further includes determining by the computing system, based on the correlation, whether one or more issues with one of the one or more information technology entities are related to the quality of service delivered to the user.

Abstract: A multiple-processor system 2 is provided where each processor 4-0, 4-1 can be dynamically switched between running in a locked mode where one processor 4-1 checks the operation of the other processor 4-0 and a split mode where each processor 4-0, 4-1 operates independently. Multiple auxiliary circuits 8-0, 8-1 provide auxiliary functions for the plurality of processors 4-0, 4-1. In the split mode, each auxiliary circuit 8-0, 8-1 separately provides auxiliary functions for a corresponding one of the processors 4-0, 4-1. To ensure coherency when each processor 4-0, 4-1 executes a common set of processing operations, in the locked mode a shared one of the auxiliary circuits 8-0 provides auxiliary functions for all of the processors 4-0, 4-1.

Abstract: The invention relates to a method and system hardware for ingesting media content in a peer-to-peer network from a data stream. The data stream is made up of a sequence of packets of media data, and each packet is identified by a sequence identifier. The method includes commencing caching of the data packets from the data stream. A missing data packet is identified using the sequence identifiers of the packets and the size of the missing data packet is determined. A portion of the memory medium is skipped to provide a skipped portion of medium having no data cached therein. The skipped portion has a size corresponding to the determined size of the missing data packet. The missing data packet is then retrieved and inserted into the skipped portion of the memory medium.

Abstract: The Invention pertains to the field of broadcasting digital services to terminals for transmitting said services, and concerns the problem of the smooth transfer between two versions of a same stream upstream from a transmitter within transmission networks on a single modulation frequency. The invention relates to a device for the fine synchronization of different versions of a data stream received with a certain offset or various jitters. In order to do so, the device includes different paths for detecting errors (ETR) and synchronising the stream (SNF).

Abstract: A solid-state mass storage device and method of operating the storage device to anticipate the failure of at least one memory device thereof before a write endurance limitation is reached. The method includes assigning at least a first memory block of the memory device as a wear indicator that is excluded from use as data storage, using pages of at least a set of memory blocks of the memory device for data storage, writing data to and erasing data from each memory block of the set in program/erase (P/E) cycles, performing wear leveling on the set of memory blocks, subjecting the wear indicator to more P/E cycles than the set of memory blocks, performing integrity checks of the wear indicator and monitoring its bit error rate, and taking corrective action if the bit error rate increases.

Abstract: A method for checking reading errors of a memory includes the following steps. A first data fragment is received. A first count index according to the first data fragment is generated, wherein the first count index is corresponding to a quantity of one kind of binary value in the first data fragment. The first data fragment is written into the memory. The first data fragment is read from the memory as a second data fragment. A second count index is generated according to the second data fragment. The first count index is compared with the second count index.

Abstract: A multiuser scheme allowing for a number of users, sets of user, or carriers to share one or more channels is provided. In the invention, the available channel bandwidth is subdivided into a number of equal-bandwidth subchannels according to standard OFDM practice. A transmitter transmits data on a set of OFDM subchannels that need not be contiguous in the spectrum or belong to the same OFDM channel. A receiver receives and decodes the data and detects errors on subchannels. The receiver then broadcasts the identity of those subchannels on which the error rate exceeds a specific threshold, and the transmitter may select different subchannels for transmission based on this information.

Abstract: A wireless communication apparatus and an error detection result feedback method wherein unnecessary retransmissions are avoided to improve the system throughput. At a base station (200), a decoding unit (205) decodes code words, which have been mapped to a TTI bundle, for the respective TTIs in the TTI bundle. An error detecting unit (206) detects errors in the decoding results. A control information generating unit (209) sequentially transmits, in accordance with detection timings, error detection result information related to the code word transmitted in the tail TTI in the TTI bundle, as well as error detection result information related to the code word transmitted in at least one of the other TTIs. In this way, an apparatus that transmits the code words can use the result of error detection in the tail TTI as a reference used for deciding the execution of a retransmission, so that unnecessary retransmissions can be avoided.

Abstract: A method for easily detecting a memory error that may occur when a memory is accessed or an allocated memory is freed in the process of developing software is disclosed. The memory error detecting method includes: (a) generating an original block indication variable for indicating a starting memory block of a memory region allocated with respect to a variable included in a computer program; (b) detecting a memory error that may occur when the allocated memory region is accessed, by performing a certain operation (computing or arithmetic operation), before the allocated memory region is accessed, using a target block indication variable indicating memory block to be accessed in the allocated memory region and/or the original block indication variable; and (c) outputting information about a detected memory error.

Abstract: A system detects an error in a network device that receives data via a group of data streams. The system receives a data unit, where the data unit is associated with at least one of the streams and a sequence number for each of the associated streams. The system determines whether each sequence number associated with the data unit is a next sequence number for the corresponding stream, and detects an error for a particular stream when the sequence number for that stream is not a next sequence number.

Abstract: A communication system capable of identifying a path where a fault has occurred when the fault is detected. The communication system has a host computer with a host port, a switch with a switch port and a storage device with a storage port which is connected to the host port via the switch port. The host computer manages access path information indicating how the host port and the storage port are connected to the switch port, and identifies an access path influenced by a switch fault according to the access path information when the switch fault occurs.

Abstract: Various embodiments are described for back channel communication. One embodiment is a method that comprises receiving data at customer premises equipment (CPE), determining at least one error in the received data, formatting the determined error for communication to a central office (CO), and sending the formatted error to the CO via a back channel, wherein the formatted error is sent between sync frames of a discrete multitone (DMT) superframe.

Abstract: In a digital video system, high availability distribution is provided using spare modules such as an integrated receiver decoder, multimedia transcoder and streaming module in support of the primary modules. The primary modules multicast status messages which are monitored by the spare modules. When failure of a primary module is detected, the spare module takes over the role of the failed module, for example by joining the same multicast groups as the failed module and taking over processing of the streams of the failed module. Multiple redundancy schemes are described.

Abstract: The invention concerns a circuit protected against transitory perturbations, comprising a combinatorial logic circuit (10), having at least an output (A); a circuit (20) generating an error control code for said output, and a storage element (24) provided at said output, controlled by the circuit generating a control code to be transparent when the control code is correct, and to maintain its status when the control code is incorrect.

Abstract: Disclosed are a method, a system and a computer program product of operating a data processing system that can include or be coupled to multiple processor cores. In one or more embodiments, an error can be determined while two or more processor cores are processing a first group of two or more work items, and the error can be signaled to an application. The application can determine a state of progress of processing the two or more work items and at least one dependency from the state of progress. In one or more embodiments, a second group of two or more work items that are scheduled for processing can be unscheduled, in response to determining the error. In one or more embodiments, the application can process at least one work item that caused the error, and the second group of two or more work items can be rescheduled for processing.

Abstract: A computing device includes a processor, firmware, a hardware component, and a debugging module. The firmware stores error decoding logic particular to the computing device. The hardware component detects an error in the computing device, and responsively issues an interrupt and halts the processor such that the processor cannot execute any more computer-readable code. The debugging module loads the logic from the firmware at reset and executes the logic responsive to the interrupt. The debugging module does not use the processor to execute the logic, the firmware is not part of the debugging module, and the debugging module is not part of the hardware component. The firmware may also store a mapping between registers of the hardware component and field-replaceable hardware units of the computing device, which the debugging module loads at reset and uses when executing the error decoding logic to determine which unit has caused the error.

Abstract: A blanking primitive masking circuit has a detection and handling circuit that receives data containing blanking primitives. The detection and handling circuit generates a dynamic blanking signal when blanking primitives are detected. The received data is delayed and provided to a pattern detector that generates a synchronization signal provided to a memory and a phase sync signal provided to the detection and handling circuit and to a comparator. The comparator receives reference data from the memory, the delayed data, and the dynamic blanking signal. The comparator compares the reference data with the delayed data and generates bit error outputs from mismatched reference data bits and delayed data bits when the dynamic blanking signal from the detection and handling circuit is absent and suppressing the generation bit error outputs when the blanking primitive are in the delay data and the dynamic blanking signal is present.

Abstract: A method, information processing system, and processor work around a processing flaw in a processor. At least one instruction is fetched from a memory location. The at least one instruction is decoded. An opcode compare operation is compared with the at least one instruction and a set of values within at least one opcode compare register in response to the decoding. The instruction is marked with a pattern based on the opcode compare operation. The pattern indicates that the instruction is associated with a processing flaw.

Abstract: The present invention relates to a system for simulating/testing an aeronautic computer network architecture, especially installed on board an aircraft, and to a corresponding method. The system comprises: a communication network (2) comprising a plurality of switches (SW1-SW8); a plurality of real computers (11-14) connected to the network at the corresponding switches (SW1-SW4); a simulation unit (100) simulating at least one computer (15-17) of the said architecture and connected to the network at at least one corresponding switch (SW5-SW8), and a third switch (42), which receives, at input ports (PE), data (Mess13, Mess17) acquired at the monitoring ports (PM) of the said corresponding switches and emitted by the said computers over the network, the third switch being configured to duplicate the said data over a plurality of output ports (UTAPj OB1j, AFDXIFj, OTij), to which a plurality of consuming applications (100, 110, UTAP, OBi, OTi) is connected.

Abstract: An apparatus and method for assessing image quality in real-time in consideration of both a coding error generated in an image processing process and a packet error generated in an image transmission process are provided. The apparatus for assessing image quality in real-time includes: an image quality measurement unit measuring image degradation generated in processing an image; a packet degradation detection unit detecting a packet error generated in transmitting the image; and final outcome drawing unit finally assessing the quality of the image in consideration of both a degradation degree of the image measured by the image quality measurement unit and the packet error measured by the packet degradation detection unit.

Abstract: Methods, systems, and computer program products for identifying cyclical behaviors are provided. A method includes defining a time-based set of splines in an equation for a dataset, identifying a periodicity of a cycle derived from implementing the time-based set of splines on the dataset, and taking a responsive action as a result of identifying the periodicity of the cycle.

Abstract: Methods, systems, and computer program products for intelligent monitoring services are provided. A method includes sampling data for a subject over a defined time period and calculating a normative value for the defined time period based on the sampled data. The method also includes monitoring incoming data for the subject, comparing a monitored value for the incoming data to the normative value, and generating a responsive action when the monitored value deviates from the normative value.

Abstract: In one embodiment, an authentication module includes: a memory module that a plurality of data elements of an input interleaved signal are written to and read from; and a memory access controller configured to write the data elements of the input interleaved signal to the memory module sequentially in accordance with address information in a specific writing order commonly set between different signal formats of interleaved signals, and read the data elements written to the memory module from the memory module sequentially in accordance with address information in a specific reading order commonly set between the different signal formats, and output the read data elements as a restore signal.

Abstract: A computer readable storage medium stores a set of instructions executable by a processor. The set of instructions is operable to receive, from a user device, a query relating to a degradation of performance of the device within a network; receive, from a transceiver station, a record relating to a time to send data to the device; and identify the existence of an error in the device based on a determination that the time is greater than a predetermined threshold.

Abstract: A method and information processing system manage load and store operations executed out-of-order. At least one of a load instruction and a store instruction is executed. A determination is made that an operand store compare hazard has been encountered. An entry within an operand store compare hazard prediction table is created based on the determination. The entry includes at least an instruction address of the instruction that has been executed and a hazard indicating flag associated with the instruction. The hazard indicating flag indicates that the instruction has encountered the operand store compare hazard. When a load instruction is associated with the hazard indicating flag the load instruction becomes dependent upon all store instructions associated with a substantially similar flag.

Abstract: Computer-implemented methods and systems are provided for scanning web sites and/or parsing web content, including for testing online opt-out systems and/or cookies used by online systems. In accordance with one implementation, a computer-implemented method is provided for testing an opt-out system associated with at least one advertising system that uses cookies. The method includes transmitting a first request to an opt-out system, wherein the first request corresponds to a first test for testing at least one of the opt-out system and an advertising system; receiving a first stream sent in response to the first request; determining a first outcome of the first test based on the first stream; and generating a report based on the first outcome.

Abstract: Transforming portions of a message to a destination via a communication protocol. A message is received. It is detected whether the received message includes an encoded envelope. The encoded envelope includes a stack defining parameters including information for handling the received message in an original format. If the received message includes the encoded envelope, the defined parameters are transformed to coded parameters in a common format. The coded parameters express the same information for handling the received message in the communication protocol. The encoded envelope is encapsulated in the received message, and the received message in the common format is delivered to the destination. If the received message does not include an encoded envelope, coded parameters are generated in the common format for the received message by encoding addressing information from the received message. The received message having the coded parameters in the common format is delivered to the destination.

Abstract: Various embodiments herein include at least one of systems, methods, and software to detect and reduce messages from network entity management clients that are not utilized by a network management system. Once identified, the network management system may send a command to the network entity management clients to no longer send particular message types to the network management system. The network management system may also, or alternatively configured to take no action when such messages are subsequently received.