Error Or Fault Detection Or Monitoring (epo) Patents (Class 714/E11.024)
  • Publication number: 20110314337
    Abstract: Approaches based on dynamic tainting to assist transform users in debugging input models. The approach instruments the transform code to associate taint marks with the input-model elements, and propagate the marks to the output text. The taint marks identify the input-model elements that either contribute to an output string, or cause potentially incorrect paths to be executed through the transform, which results in an incorrect or a missing string in the output. This approach can significantly reduce the fault search space and, in many cases, precisely identify the input-model faults. By way of a significant advantage, the approach automates, with a high degree of accuracy, a debugging task that can be tedious to perform manually.
    Type: Application
    Filed: June 18, 2010
    Publication date: December 22, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Saurabh Sinha, Pankaj Dhoolia, Senthil Kk Mani, Vibha S. Sinha
  • Patent number: 8082412
    Abstract: A method and apparatus for of storing data comprising monitoring a plurality of storage units within a mass storage area and detecting when a storage unit within the mass storage area is overloaded. The method further comprising randomly distributing the data on the overloaded storage unit to the other storage units within the mass storage area.
    Type: Grant
    Filed: May 4, 2010
    Date of Patent: December 20, 2011
    Assignee: VeriSign, Inc.
    Inventors: Brian Bodmer, Eric Bodnar, Mark Tarantino, Jonah Kaj Fleming, Devdutt Sheth
  • Publication number: 20110307745
    Abstract: Provided are a computer program product, system and method for updating class assignments for data sets during a recall operation in a storage environment having a plurality of storage devices. Information on a data set is processed to determine at least one current attribute of the data set. A determination is made as to whether the determined at least one current attribute satisfies a criteria. Indication is made in a catalog to change a class associated with the data set in response to determining that the at least one current attribute satisfies the criteria, wherein the class is used to determine how to manage the data set. The data set is migrated from a first storage to a second storage. A recall operation is initiated to recall the data set from the second storage.
    Type: Application
    Filed: June 11, 2010
    Publication date: December 15, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Franklin Emmert McCune, Miguel Angel Perez, David Charles Reed, Max Douglas Smith
  • Publication number: 20110307746
    Abstract: Systems and methods for intelligent and flexible management and monitoring of computer systems are provided using platform management controllers (PMCs) located on circuit boards of a computer system. The PMCs provide for enhanced circuit board certification and security, enhanced systems monitoring and reporting, and enhanced systems control. The PMCs also allow for emulation of processor-based devices and are low-power, low-cost and very fast when compared to the devices replaced and functionality provided. A power supply tracking apparatus helps to ensure that a first power input to an operational circuit maintains a predefined relationship to a second power input to the operational circuit. Systems and methods for receiving computer systems diagnostics information and for customizably displaying such information from a diagnostics monitoring device are incorporated into a computer system.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 15, 2011
    Inventors: Jason A. Sullivan, Charles Abdouch
  • Publication number: 20110307768
    Abstract: An error detection device includes a control unit configured to identify two links that connects a relay communication device to two communication devices as a link pair, identify, from pluralities of inspection devices under the respective two links, a number of inspection devices corresponding to the number N of links where communication errors simultaneously occur (N is an integer of 1 or more) plus 1, determine (N+1) number of inspection flows between the (N+1) number of inspection device pairs, and generate inspection coverage information that includes the determined inspection flows. The error detection device includes a storage unit that stores the inspection coverage information, and a communication unit that sends the inspection coverage information to one device of the inspection device pairs.
    Type: Application
    Filed: May 18, 2011
    Publication date: December 15, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Takeshi YASUIE, Yuji Nomura
  • Publication number: 20110307359
    Abstract: An exemplary method includes a computing system accessing inventory data maintained in a repository of inventory data, the inventory data maintained for use in determining tax revenue to be collected from at least one customer, and auditing the inventory data, the audit including accessing a data record included in the inventory data, subjecting the data record to at least one of a validation process, a range split condition check process, and a tax code identifier check process, and generating output data representative of a result produced by the at least one of the validation process, the range split condition check process, and the tax code identifier check process. When the result indicates an error condition, the output data is configured to facilitate a correction of the error condition in the inventory data included in the repository of inventory data. Corresponding methods and systems are also disclosed.
    Type: Application
    Filed: June 10, 2010
    Publication date: December 15, 2011
    Applicant: VERIZON PATENT AND LICENSING, INC.
    Inventors: Ramakrishna Gude, Rose Joy
  • Publication number: 20110307742
    Abstract: A technique determines which configuration change(s) caused an application invocation failure of a computer application without the need for a knowledge database. To determine which configuration change is the most likely cause, the cause analysis program (121) checks other computers (102) that have experienced the same configuration changes. The cause analysis program checks and counts the application invocation results before and after each configuration change is done. If the same configuration changes are found in the other computers, the program checks whether each configuration change caused or cured the same problem in that computer. The program counts the similar cases for all of the computers. Subsequently, the program calculates the ratio of those instances involving a change from success to failure and the ratio of those instances involving a change from failure to success out of all instances for each configuration change.
    Type: Application
    Filed: August 19, 2011
    Publication date: December 15, 2011
    Applicant: HITACHI, LTD.
    Inventors: Yutaka KUDO, Tetsuya MASUISHI, Takahiro FUJITA, Yoshitsugu ONO
  • Publication number: 20110307744
    Abstract: An information processing system that processes received commands and data, the information processing system includes: an internal circuit that processes the received commands and data; a memory that stores the received commands and data as history; and a control circuit that reads the commands and data in the memory and outputs read commands and data to the internal circuit, in response to detection of a failure in the internal circuit.
    Type: Application
    Filed: May 25, 2011
    Publication date: December 15, 2011
    Applicant: FUJITSU LIMITED
    Inventor: Koji SANO
  • Publication number: 20110302462
    Abstract: A computer implemented method, system and/or computer program product handle problems caused by a modification to an information technology (IT) system. Problem-data, describing a known problem to a first IT system that occurred during a modification to the first IT system; severity-data, describing a severity of the known problem; and solution-data, describing a solution of steps to be taken to correct the known problem, are received and stored. A modification alert indicates that the modification will be applied to a second IT system that is different from the first IT system. If the first IT system and the second IT system share a pre-determined amount of common features, then a severity map, which describes the known problem, the severity of the known problem, and the solution to the known problem as applied to the second IT system, is displayed to a user of the second IT system.
    Type: Application
    Filed: June 7, 2010
    Publication date: December 8, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: WASEEM A. ROSHEN, MARK L. ALLSOP, ROBERT A. G. DANIEL, NADEEM MALIK
  • Publication number: 20110302460
    Abstract: An apparatus and method are provided for detecting an approaching error condition within a data processing apparatus. The data processing apparatus includes a second sequential storage structure which is arranged to latch the output signal generated by combinatorial circuitry dependent on a second clock signal. The second sequential storage structure has a main storage element to latch a value of the output signal for provision to subsequent combinatorial circuitry, and transition detection circuitry for detecting a change of the value of the output signal latched by the main storage element during a predetermined timing window, said change indicating an approaching error condition whilst the value stored in the main storage element is still correct. The second sequential storage structure can be operated in either a first mode of operation or a second mode of operation.
    Type: Application
    Filed: June 7, 2010
    Publication date: December 8, 2011
    Applicant: ARM LIMITED
    Inventors: Sachin Satish Idgunji, Shidhartha Das, David Michael Bull, Robert Campbell Aitken
  • Publication number: 20110302451
    Abstract: A method for testing financial operations of network applications within a computer network generates a test matrix to store test data relating to testing of financial operations related to the network applications within the computer network. A unique testing scenario is developed for testing the financial operations across a plurality of network applications and stored within the test matrix. An expected financial result achieved in accordance with execution of the unique testing scenario is calculated and stored within the test matrix. The unique testing scenario is executed using the network applications within the computer network to achieve an actual financial test result which is stored within the test matrix. The expected financial result is compared with the actual financial result to detect issues within the network applications relating to financial operations.
    Type: Application
    Filed: June 8, 2010
    Publication date: December 8, 2011
    Applicant: METROPCS WIRELESS, INC.
    Inventors: Terri Smith, Michelle L. Johnson
  • Publication number: 20110302458
    Abstract: Various exemplary embodiments relate to a method and related network node including one or more of the following: receiving, at a policy and charging rules node (PCRN), a request from a requesting node for an establishment of a first service data flow (SDF); generating a first rule set for implementing the first SDF in response to the request; transmitting a first rule of the rule set to a first node for installation of the first rule; waiting for a period of time for a response from the first node; determining from the response whether installation of the first rule at the first node failed or succeeded; and if installation of the first rule succeeded, transmitting a second rule of the first rule set to a second node for installation of the second rule.
    Type: Application
    Filed: June 7, 2010
    Publication date: December 8, 2011
    Applicant: Alcatel-Lucent Canada, Inc.
    Inventors: Ajay Kirit Pandya, Robert Alexander Mann, Mike Vihtari
  • Publication number: 20110302450
    Abstract: A circuit arrangement and method utilize existing redundant execution pipelines in a processing unit to execute multiple instances of stability critical instructions in parallel so that the results of the multiple instances of the instructions can be compared for the purpose of detecting errors. For other types of instructions for which fault tolerant or stability critical execution is not required or desired, the redundant execution pipelines are utilized in a more conventional manner, enabling multiple non-stability critical instructions to be concurrently issued to and executed by the redundant execution pipelines. As such, for non-stability critical program code, the performance benefits of having multiple redundant execution units are preserved, yet in the instances where fault tolerant or stability critical execution is desired for certain program code, the redundant execution units may be repurposed to provide greater assurances as to the fault-free execution of such instructions.
    Type: Application
    Filed: June 4, 2010
    Publication date: December 8, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark J. Hickey, Adam J. Muff, Matthew R. Tubbs, Charles D. Wait
  • Publication number: 20110296162
    Abstract: An exemplary embodiment of the present invention provides a method of lowering power consumption. The method includes temporarily disabling a plurality of status indicators on a plurality of electronic components without disabling the operation of the electronic components.
    Type: Application
    Filed: February 24, 2009
    Publication date: December 1, 2011
    Inventor: Eugene Pakenham
  • Publication number: 20110296267
    Abstract: Embodiments of methods and apparatus for reducing electromagnetic interference of a received signal are disclosed. One method includes receiving a signal over at least two conductors, extracting a common-mode signal from the at least two conductors, processing the common-mode signal, and reducing electromagnetic interference of the received signal by summing the processed common-mode signal with the received signal.
    Type: Application
    Filed: May 28, 2010
    Publication date: December 1, 2011
    Applicant: TERANETICS, INC.
    Inventors: Moshe Malkin, Jose Tellado
  • Publication number: 20110296256
    Abstract: An I/O device includes a host interface that may receive and process transaction packets sent by a number of processing units, with each processing unit corresponding to a respective root complex. The host interface includes an error handling unit having error logic implemented in hardware that may determine, as each packet is received, whether each transaction packet has an error and to store information corresponding to any detected errors. The error handling unit may include an error processor that may be configured to execute error processing instructions to determine any error processing operations based upon the information. The error processor may also generate and send one or more instruction operations, each corresponding to a particular error processing operation. The error handling unit may also include an error processing unit that may execute the one or more instruction operations to perform the particular error processing operations.
    Type: Application
    Filed: May 25, 2010
    Publication date: December 1, 2011
    Inventors: John E. Watkins, Elisa Rodrigues, Abbas Morshed
  • Publication number: 20110296252
    Abstract: A method of managing a ring-based overlay network that is configured to allow routing of messages across an underlying IP network to destinations not specified by an IP address. The method comprises firstly sending a probe message from an initiating node of the overlay network around the ring, with each peer node forwarding the probe message to a successor or predecessor node. Upon detection of a forwarding failure at a node of the ring, a Probe error message is sent from that node to the initiating node. The initiating node represents the final destination for the Probe message.
    Type: Application
    Filed: June 12, 2008
    Publication date: December 1, 2011
    Inventor: Jouni Maenpaa
  • Publication number: 20110296229
    Abstract: A system and method for detecting decimal floating point data processing exceptions. A processor accepts at least one decimal floating point operand and performs a decimal floating point operation on the at least one decimal floating point operand to produce a decimal floating point result. A determination is made as to whether the decimal floating point result fails to maintain a preferred quantum. The preferred quantum indicates a value represented by a least significant digit of a significand of the decimal floating point result. An output is provided, in response to the determining that the decimal floating point result fails to maintain the preferred quantum, indicating an occurrence of a quantum exception. A maskable exception can be generated that is immediately trapped or later detected to control conditional processing.
    Type: Application
    Filed: May 28, 2010
    Publication date: December 1, 2011
    Applicant: International Business Machines Corporation
    Inventors: MICHAEL F. COWLISHAW, Silvia Melitta Mueller, Eric Schwarz, Phil C. Yeh
  • Publication number: 20110296255
    Abstract: An I/O device includes a host interface that may be configured to receive and process a plurality of transaction packets sent by a number of processing units, with each processing unit corresponding to a respective root complex. The host interface includes an error handling unit having error logic implemented in hardware that may be configured to determine whether each transaction packet has an error and to store information corresponding to any detected errors within a storage. More particularly, the error handling unit may perform the error detection and capture of the error information as the transaction packets are received, or in real time, while the error handling unit may include firmware that may subsequently process the information corresponding to the detected errors.
    Type: Application
    Filed: May 25, 2010
    Publication date: December 1, 2011
    Inventors: John E. Watkins, Elisa Rodrigues
  • Publication number: 20110289373
    Abstract: One or more technologies described herein can be used for viewing results of a simulation of a software executable in a multi-processor electronic circuit design. A debug environment can display simulation results related to the multiple processors, for example, as a correlated software debug view of the processors. In at least some embodiments, the disclosed technologies can be used to examine a correlation between an error in the simulation results and one or more inter-processor synchronization events.
    Type: Application
    Filed: November 19, 2010
    Publication date: November 24, 2011
    Inventors: Russell A. Klein, Marco A. Minato
  • Publication number: 20110289379
    Abstract: In a method for transmitting data of various traffic types an xDSL modem is utilized. Detectors are used to detect the traffic types of the data which are to be transmitted and the detected traffic types are taken as a basis for dynamically adjusting a data transmission rate for the xDSL modem.
    Type: Application
    Filed: August 4, 2011
    Publication date: November 24, 2011
    Inventor: Stefan UHLEMANN
  • Publication number: 20110283145
    Abstract: Apparatus and methods for reducing infrastructure failure rates. The apparatus and methods may compile and store data related to the physical devices and applications associated with an infrastructure change. Variables may be derived from the stored data using a range of methods and multiple variable values may be consolidated. A model may be developed based on the values and relationships of the derived variables. The model may be applied to assess the risk of a prospective infrastructure change.
    Type: Application
    Filed: May 13, 2010
    Publication date: November 17, 2011
    Applicant: Bank of America
    Inventors: Rachel Nemecek, John Cowan, Edward M. Dunlap, JR., Eric Hunsaker, Charles C. Howie
  • Publication number: 20110283146
    Abstract: Apparatus and methods for reducing infrastructure failure rates. The apparatus and methods may involve reduction of data complexity. The reduction may be based on the use of nonlinear analysis to derive representative variables, which may be multi-valued. Multi-valued variables may be consolidated. A model may be developed based on the values and relationships of the derived variables. The model may be applied to assess the risk involved in a prospective infrastructure change.
    Type: Application
    Filed: May 13, 2010
    Publication date: November 17, 2011
    Applicant: Bank of America
    Inventors: Rachel Nemecek, John Cowan, Edward M. Dunlap, JR., Eric Hunsaker, Charles C. Howie
  • Publication number: 20110283149
    Abstract: Techniques for monitoring distributed software health and membership of nodes and software components operating in a compute cluster are disclosed. In one embodiment, each node in the compute cluster operates a watchdog monitoring component in addition to software operating components. The watchdogs are provided with a list of all nodes in a compute cluster that identifies every node's neighboring nodes. Each watchdog checks the health of one of its neighboring node, ensuring that this neighboring node is healthy and is operating successfully. Additionally, each watchdog verifies the cluster membership of its other neighboring nodes to ensure that the cluster is operating an adequate number of operating nodes, and that an adequate number of watchdogs are present in the cluster. If an unhealthy or non-member node is identified, the watchdog may initiate corrective action and attempt to restore the node to a correct operational state.
    Type: Application
    Filed: May 12, 2010
    Publication date: November 17, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Michael A. Richmond
  • Publication number: 20110283138
    Abstract: A monitoring and management system for distributed and interacting systems stores configuration settings after a successful installation or modification and compares values to the stored configuration settings. When a discrepancy is found, a messaging system may relay the information to a console where the issue may be dispositioned. In some cases, the configuration settings may be updated, while in other cases, the monitored setting may be restored to the stored configuration setting. A set of wizards or other user interface mechanisms may be used to restore the system to order.
    Type: Application
    Filed: May 11, 2010
    Publication date: November 17, 2011
    Applicant: Microsoft Corporation
    Inventors: Murali Sangubhatla, Dmitry Sonkin, Alok Agarwal, Edward K. Tremblay
  • Publication number: 20110276839
    Abstract: Disclosed is a remote communication system and method. A remote communication system includes a digital protection relay and a remote monitoring system. The digital protection relay stores and maintains fault indices for identifying a predetermined number of faults that have occurred, fault time tags corresponding to the fault indices and fault data corresponding to the fault indices. The remote monitoring system sets a fault index, a fault time tag, a fault data block size to be communicated at a time and a fault data block index for specifying a fault data block to be communicated, and requests the digital protection relay of a fault data block.
    Type: Application
    Filed: April 25, 2011
    Publication date: November 10, 2011
    Inventor: Byung Jin LEE
  • Publication number: 20110276874
    Abstract: A computer-implemented method and system for generation of page templates are provided. The method includes providing a document in computer memory. Using a computer processor, page elements within the document are identified and labeled. For each page of the document, a set of geometric relations between pairs of page elements co-occurring on the page is computed, and the set of geometric relations is associated with the page. The method also includes generating a set of page template candidates based at least in part on the computed geometric relations, selecting page templates from the set of page template candidates, and outputting the selected page templates.
    Type: Application
    Filed: May 4, 2010
    Publication date: November 10, 2011
    Applicant: Xerox Corporation
    Inventor: Hervé Déjean
  • Publication number: 20110271161
    Abstract: Mechanisms for controlling an operation of one or more cores on an integrated circuit chip are provided. The mechanisms retrieve, from an on-chip non-volatile memory of the integrated circuit chip, baseline chip characteristics data representing operational characteristics of the one or more cores prior to the integrated circuit chip being operational in the data processing system. Current operational characteristics data of the one or more cores are compared with the baseline chip characteristics data. Deviations of the current operational characteristics data from the baseline chip characteristics data are determined and used to determine modifications to an operation of the one or more cores. Control signals are sent to one or more on-chip management units based on the determined modifications to cause the operation of the one or more cores to be modified.
    Type: Application
    Filed: April 30, 2010
    Publication date: November 3, 2011
  • Publication number: 20110271152
    Abstract: A failure management method for a computer including a processor, and a memory connected to the processor, and in which the processor containing a memory protection function, executes a first software program and a second software program monitoring the operation of the first software program, and the second software program retains error information including address information and access-related information; and the method implemented by the by the second software program includes a step for detecting the occurrence of errors in the memory; and a step for prohibiting access to the address of the memory where the error occurred, and monitoring the access state; and a step for executing the failure processing when accessing by the first software program of the address of the memory where the error occurred was detected.
    Type: Application
    Filed: April 4, 2011
    Publication date: November 3, 2011
    Applicant: HITACHI, LTD.
    Inventors: Naoya HATTORI, Toshiomi MORIKI, Yoshiko YASUDA
  • Publication number: 20110271170
    Abstract: Embodiments of the invention relate to page faulting of memory operations in a subject code block. An aspect of the invention concerns an apparatus comprising a component for identifying a first object node having a first dependency path and second object node having a second dependency path, and a component for calculating a numerical difference between a first addressing value and a second addressing value, where the first and second addressing values are respectively associated with the first and second dependency paths. The apparatus may include a dependency generator for ordering a subject order list of the subject code block in an object dependency non-page-faulting order when the numerical difference is equal to or less than an assigned memory page size.
    Type: Application
    Filed: February 28, 2011
    Publication date: November 3, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Paul Michael Peter Brian Ronald Walker
  • Publication number: 20110264973
    Abstract: A system for testing electronic circuits is configured to receive a test signal and an ideal response signal and output a test result signal. The system for testing electronic circuits includes a circuit portion to be tested, a comparator and a comparison result recorder. The circuit portion to be tested receives a test signal from a test instrument, and outputs a system response signal. The comparator receives the system response signal from the circuit portion to be tested and receives an ideal response signal from the test instrument. Then, the comparator outputs a comparison result according to the system response signal and the ideal response signal. The comparison result recorder receives and records the comparison result. The comparison result recorder may record comparison results within a period of test time. The test instrument can obtain a record of the comparison results from the comparison result recorder.
    Type: Application
    Filed: April 25, 2010
    Publication date: October 27, 2011
    Inventor: SSU-PIN MA
  • Publication number: 20110264989
    Abstract: A method begins by a processing module dispersed storage error encoding data to produce a plurality of sets of encoded data slices in accordance with dispersed storage error coding parameters. The method continues with the processing module determining a plurality of sets of slice names corresponding to the plurality of sets of encoded data slices. The method continues with the processing module determining integrity information for the plurality of sets of slice names and sending the plurality of sets of encoded data slices, the plurality of sets of slice names, and the integrity information to a dispersed storage network memory for storage therein.
    Type: Application
    Filed: February 4, 2011
    Publication date: October 27, 2011
    Applicant: CLEVERSAFE, INC.
    Inventors: Jason K. Resch, John Quigley, Wesley Leggette
  • Publication number: 20110264967
    Abstract: A network appliance for monitoring, diagnosing and documenting problems among a plurality of devices and processes (objects) coupled to a computer network utilizes periodic polling and collection of object-generated trap data to monitor the status of objects on the computer network. The status of a multitude of objects is maintained in memory utilizing virtual state machines which contain a small amount of persistent data but which are modeled after one of a plurality of finite state machines. The memory further maintains dependency data related to each object which identifies parent/child relationships with other objects at the same or different layers of the OSI network protocol model. A decision engine verifies through on-demand polling that a device is down. A root cause analysis module utilizes status and dependency data to locate the highest object in the parent/child relationship tree that is affected to determine the root cause of a problem.
    Type: Application
    Filed: June 28, 2011
    Publication date: October 27, 2011
    Inventors: David M. Lovy, Brant M. Fagan, Robert J. Bojanek
  • Publication number: 20110264965
    Abstract: The present invention provides systems and methods for conducting electronic transactions in a distributed computing environment. A communications protocol is provided that enables reliable transactional state synchronization for peers participating in a distributed transaction. A transaction processing application is deployed on a local computer system to manage transactions thereon. The local computer system contacts a remote computer system to obtain authorization to execute a transaction. The local computer system initiates a failure-recovery job that is operable to automatically resend status signals and other information to the remote system if the communication with the remote system exhibits certain predefined fault conditions. The remote system is able to dynamically adjust the definition of the predefined fault conditions. If the transaction concludes without triggering the predefined fault conditions, the failure-recovery job is cancelled.
    Type: Application
    Filed: July 5, 2011
    Publication date: October 27, 2011
    Inventors: Marc E. Strohwig, John M. McGinty, W. Olin Sibert
  • Publication number: 20110264990
    Abstract: A verification tool receives a finite precision definition for an approximation of an infinite precision numerical function implemented in a processor in the form of a polynomial of bounded functions. The verification tool receives a domain for verifying outputs of segments associated with the infinite precision numerical function. The verification tool splits the domain into at least two segments, wherein each segment is non-overlapping with any other segment and converts, for each segment, a polynomial of bounded functions for the segment to a simplified formula comprising a polynomial, an inequality, and a constant for a selected segment. The verification tool calculates upper bounds of the polynomial for the at least two segments, beginning with the selected segment and reports the segments that violate a bounding condition.
    Type: Application
    Filed: April 23, 2010
    Publication date: October 27, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Jun Sawada
  • Publication number: 20110258480
    Abstract: Methods and apparatus for managing exchange IDs for multiple asynchronous dependent I/O operations generated for virtual Fibre Channel (FC) target volumes. Features and aspects hereof allocate a range of exchange identifier (X_ID) values used in issuing a plurality of physical I/O operations to a plurality of physical FC target devices that comprise the virtual FC target volume. The plurality of physical I/O operations are dependent upon one another for completion of the original request to the virtual FC target volume and allow substantially parallel operation of the plurality of physical FC target devices. A primary X_ID is selected from the range of allocated X_ID values for communications with the attached host system that generated the original request to the virtual FC target volume.
    Type: Application
    Filed: April 16, 2010
    Publication date: October 20, 2011
    Applicant: LSI CORPORATION
    Inventors: Howard Young, Srinivasa Nagaraja Rao
  • Publication number: 20110252281
    Abstract: Discovery of intermediate network devices is performed using a technique that piggybacks upon the existing standard TCP (Transport Control Protocol) “SACK” (Selective Acknowledgment) option in a SYN/ACK packet so that discovery information may be shared between pair-wise-deployed peer intermediate devices when a TCP/IP connection (Transport Control Protocol/Internet Protocol) is first established between network endpoints using a conventional three-way handshake. Use of the SACK option is combined with another technique which comprises modifying the original 16-bit value of the TCP receive window size to a special arbitrary value to mark a SYN packet as being generated by a first peer device. The marked SYN when received by the second peer device triggers that device's discovery information to be piggybacked in the SACK option of the SYN/ACK packet. The first device then piggybacks its discovery information in the SACK option of the ACK packet which completes the three-way handshake.
    Type: Application
    Filed: June 27, 2011
    Publication date: October 13, 2011
    Applicant: MICROSOFT CORPORATION
    Inventors: Murari Sridharan, Deepak Bansal, Eran Yariv, Ronen Barenboim, Maxim Stepin, Alexander Malvsh
  • Publication number: 20110252269
    Abstract: The invention enhances automatic incident control, problem control, and problem prevention using information provided by the analysis or analysis data. The burden on the part of both users and providers to resolve problems is reduced by using a method of automatic analysis data upload and intelligent problem analysis and resolution. Problems are better identified, investigated, diagnosed, recorded, classified, and tracked until affected services return to normal operation and errors trends are used to proactively prevent future problems.
    Type: Application
    Filed: June 21, 2011
    Publication date: October 13, 2011
    Applicant: NAPSTER LLC
    Inventor: Frank FABBROCINO
  • Publication number: 20110246839
    Abstract: An RTC, having a crystal oscillator of different characteristics from those of a crystal oscillator, is provided, and the pulse period of the pulse signal from the RTC and the pulse signal based on the crystal oscillator are compared to detect a fault in the crystal oscillator. As a result, even if, for example, located in a high temperature environment, the degrees to the decrease in frequency will be different, thus making it possible to detect reliably a fault in the crystal oscillator.
    Type: Application
    Filed: March 18, 2011
    Publication date: October 6, 2011
    Applicant: YAMATAKE CORPORATION
    Inventors: Akira Yamada, Yuuichi Kumazawa, Tomoya Nakata, Katsumi Morikawa
  • Publication number: 20110246864
    Abstract: According to one embodiment, a data detection system includes a coefficient-and-variance engine for selecting which infinite impulse response (IIR) filter and prediction error variance to process and store at any time, and a maximum-likelihood sequence detector. The coefficient-and-variance engine comprises a filter bank storing a plurality of IIR filters that represent a plurality of data-dependent noise whitening or noise prediction filters; a least-mean square (LMS) engine for adapting each IIR filter to actual noise conditions: a variance hank storing a plurality of prediction error variance values; and a data-dependent prediction error variance computation unit which updates the plurality of prediction error variance values. The maximum-likelihood sequence detector includes a metric computation unit that employs the plurality of IIR filters in the filter bank and the plurality of prediction error variances in the variance bank to adaptively compute detector branch metrics.
    Type: Application
    Filed: March 30, 2010
    Publication date: October 6, 2011
    Applicant: International Business Machines Corporation
    Inventors: Evangelos S. Eleftheriou, Robert A. Hutchins, Sedat Oelcer
  • Publication number: 20110246828
    Abstract: A system and method is shown that includes a processor operatively connected to a memory, the processor to include a memory controller to control access to the memory. The system and method also includes a service processor, co-located on a common board and operatively connected to the processor and the memory, the service processor to include an additional memory controller to control access to the memory as part of a checkpoint regime.
    Type: Application
    Filed: March 31, 2010
    Publication date: October 6, 2011
    Inventors: Matteo Monchiero, Naveen Muralimanohar, Partha Ranganathan
  • Publication number: 20110239055
    Abstract: The present invention extends to methods, systems, and computer program products for validation configuration of distributed applications. Embodiments of the invention provide a system framework for identifying root causes of configuration errors and best-practice incompliance of distributed applications. The system framework provides both platform provider and customer a powerful and consistent method to create, extend, and utilize a tool that simplifies the configuration troubleshooting experience. Using the system framework, a user is able to access more information about applications and to troubleshoot multiple applications at the same time without having to load or activate any of the applications. In addition, users are able to add custom rules to identify commonly occurring configuration problems.
    Type: Application
    Filed: March 24, 2010
    Publication date: September 29, 2011
    Applicant: Microsoft Corporation
    Inventors: Sata Busayarat, Vladimir Pogrebinsky
  • Publication number: 20110239058
    Abstract: A switching device includes a storage unit configured to store management information including an updated management information and a before updated management information, a specification unit configured to acquire an information for specifying management information stored in a management device which manages a failure that has occurred in an object device for the failure to be monitored and specify management information stored in the storage unit on the basis of the acquired information, and an information sending unit configured to send a failure information to the management device on the basis of the management information which has been specified using the specification unit in the case that the failure has been detected.
    Type: Application
    Filed: March 21, 2011
    Publication date: September 29, 2011
    Applicant: Fujitsu Limited
    Inventor: Takeshi UMEZUKI
  • Publication number: 20110239050
    Abstract: According to one embodiment of the present disclosure, a method of collecting and reporting exceptions associated with information technology services includes receiving exceptions associated with a service, including receiving exceptions associated with an infrastructure and exceptions associated with an application; formatting the exceptions into an exceptions list; correlating at least one of the exceptions associated with the infrastructure and at least one of the exceptions associated with the application to identify a service error condition; and storing the exceptions list and an identifier of the service error condition for presentation to a client associated with the service.
    Type: Application
    Filed: March 23, 2010
    Publication date: September 29, 2011
    Applicant: Computer Associates Think, Inc.
    Inventors: Ramanjaneyulu Malisetti, Vamshi Shekhar Chandramukhi
  • Publication number: 20110231743
    Abstract: A control circuit of a chip 61 includes a data reception circuit unit 611 that receives data transmitted by a data transmission circuit of another chip, an error information extraction unit 613 that detects error information of the received data, and a data transmission circuit unit 617 that attaches, when the error information extraction unit 613 detected error information, the detected error information to the received data, and transmits the data to which the error information is attached, to a data reception circuit of another chip.
    Type: Application
    Filed: May 27, 2011
    Publication date: September 22, 2011
    Applicant: FUJITSU LIMITED
    Inventor: Hideyuki SAKAMAKI
  • Publication number: 20110231601
    Abstract: Power management functionality is described for implementing an application in an energy-efficient manner, without substantially degrading overall performance of the application. The functionality operates by identifying at least first data and second data associated with the application. The first data is considered to have a greater potential impact on performance of the application compared to the second data. The functionality then instructs a first set of hardware-level resources to handle the first data and a second set of hardware-level resources to handle the second data. The first set of hardware-level resources has a higher reliability compared to the second set of hardware-level resources. In one case, the first and second hardware-level resources comprise DRAM memory units. Here, the first set of hardware-level resources achieves greater reliability than the second set of hardware-level resources by being refreshed at a higher rate than the second set of hardware-level resources.
    Type: Application
    Filed: March 19, 2010
    Publication date: September 22, 2011
    Applicant: Microsoft Corporation
    Inventors: Karthik Pattabiraman, Thomas Moscibroda, Benjamin G. Zom, Song Liu
  • Publication number: 20110231705
    Abstract: Thus, methods and apparatus for providing adaptive diagnostics for ATM fault conditions are provided. Such methods and apparatus may include one or more computer-readable media storing computer-executable instructions which, when executed by a processor on a computer system, perform a method for diagnosing an electronic self-service device fault condition. The method may include receiving an input from a self-service device. The input may include information regarding a fault-related event. The method may also include assessing a plurality of system-level ramifications of the fault-related event. In response to the assessing, the method may further include determining continued viability of a plurality of ATM services. The method may also include electronically providing a notification of a list of remaining viable self-service device services.
    Type: Application
    Filed: March 18, 2010
    Publication date: September 22, 2011
    Applicant: Bank of America
    Inventors: William H. McGraw, IV, Nathan Dent, Timothy B. Vannatter, Matthew K. Bryant
  • Publication number: 20110225479
    Abstract: A communication system that provides fast and reliable communications. The system is suitable for use in connection with wireless computing devices in which transmission errors may occur because of channel conditions, such as interference. Channel conditions causing transmission errors may be bursty and transient such that the errors temporarily overwhelm an error control code. By combining data received for multiple transmission attempts of a packet that fail error checking or that pass error checking with low reliability, a reliable representation of the packet may be quickly constructed. Though, combining may be omitted when a transmission attempt is received that passes error checking with high reliability.
    Type: Application
    Filed: March 11, 2010
    Publication date: September 15, 2011
    Applicant: Microsoft Corporation
    Inventors: Amer A. Hassan, Billy R. Anders, JR.
  • Publication number: 20110225463
    Abstract: A service is used to process files. The processing of the files is performed by worker services that are assigned to process a portion of the files. Each worker service that is processing a portion of the files is assigned a unique identifier. Using the identifier information, the set of worker services currently active are monitored along with the work assigned to each process. When a worker server determines that a worker service has failed, the work assigned to the failed worker service can be automatically determined and a new worker service can be started to process that work. Any new worker service that is started is assigned a unique identifier, so the work assigned to it can be similarly tracked.
    Type: Application
    Filed: March 12, 2010
    Publication date: September 15, 2011
    Applicant: MICROSOFT CORPORATION
    Inventors: TRISTAN A. DAVIS, ANDREW KENNETH BISHOP, CLIFFORD JEFFREY CRUZAN
  • Publication number: 20110219263
    Abstract: A method and system for fast failure detection in a distributed computer system. The method includes executing a distributed computer system having a plurality of clusters comprising at least a first cluster, a second cluster and the third cluster, and initializing failure detection by creating a connected cluster list in each of the plurality of clusters, wherein for each one of the plurality of clusters, a respective connected cluster list describes others of the plurality of clusters said each one is communicatively connected with. A status update message is sent upon changes in connectivity between the plurality of clusters, and generating an updated connected cluster list in each of the plurality of clusters in accordance with the status update message. The method then determines whether the change in connectivity results from a cluster failure by examining the updated connected cluster list in each of the plurality of clusters.
    Type: Application
    Filed: March 4, 2010
    Publication date: September 8, 2011
    Applicant: SYMANTEC CORPORATION
    Inventor: Garima Goel