Bypassing Defective Units On A Serial Bus (epo) Patents (Class 714/E11.086)
  • Publication number: 20120079313
    Abstract: A distributed memory array that supports both file storage and random access operations is provided. The distributed memory array includes at least one memory assembly for storing data, each memory assembly having a plurality of memory modules coupled together through a bi-directionally cross-strapped network, each memory module having a switching mechanism. The distributed memory array further includes at least one gateway coupled to the at least one memory assembly through the bi-directionally cross-strapped network. The gateway also includes a plurality of user access ports for providing access to the at least one memory assembly, and a file manager that is configured to receive a request from a user for access to the at least one memory assembly at the user access ports for either file storage or random access operations and to allocate at least one allocation unit of available memory in the at least one memory assembly based on the request from the user.
    Type: Application
    Filed: September 24, 2010
    Publication date: March 29, 2012
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventor: Clifford E. Kimmery
  • Publication number: 20100235679
    Abstract: A non-volatile memory device includes a block remapping system that offsets an input block address by the addresses of non-functional blocks to provide an output block address that is used to address the memory device. The system generates the output block addresses by, in effect, adding to the input block address the addresses of all non-functional blocks of memory that are between an initial address and the output block address. The system performs this function be comparing the input block address to the address of any defective block. If the address of the defective block is less than or equal to the input block address, the addresses of all defective blocks starting at the block address are added to the input block address. The system then iteratively performs this process using each output block address generated by the system in place of the input block address.
    Type: Application
    Filed: May 26, 2010
    Publication date: September 16, 2010
    Applicant: Micron Technology, Inc.
    Inventors: DEAN NOBUNAGA, Hanqing Li