Buffer Or Repeater Insertion Patents (Class 716/114)
  • Patent number: 7895555
    Abstract: Systems and methods provide improved techniques directed to simultaneous switching output (SSO) noise, which for example may be applied during the programmable logic device design process. For example in accordance with an embodiment, a method of structuring simultaneous switching output (SSO) noise data for an electronic device includes collecting hardware data on SSO noise conditions; generating additional data on SSO noise conditions based on the hardware data; and structuring the hardware data and the additional data to form data tables for SSO noise calculations.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: February 22, 2011
    Assignee: Lattice Semiconductor Corporation
    Inventors: Chris West, Mike Ray, Bertrand Leigh, Hua Xue, Ju Shen
  • Patent number: 7895556
    Abstract: A method and a system is described to predict effects of coupling on timing by estimating the delta delay and delta slack that can occur due to coupling on any net, for optimization to minimize the sensitivity of slack to potential coupling violations. The invention protects against other unexpected increases in effective load capacitance, such as those due to unexpectedly long wire routes. It also estimates the delay impact of a single ‘fault’ or ‘event’, such as a coupling event or unexpectedly long wires routes, including the impact of slew propagation.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: February 22, 2011
    Assignee: International Business Machines Corporation
    Inventors: Pooja M. Kotecha, David J. Hathaway, Louise H. Trevillyan