Multitasking, Time Sharing Patents (Class 718/107)
  • Patent number: 10310730
    Abstract: A method of controlling a display device including a touch screen is provided. The method includes displaying, on the touch screen, a plurality of windows respectively corresponding to executing applications, such that the windows do not overlap each other, displaying a plurality of boundary lines differentiating the plurality of windows, and a center button disposed at an intersection point of the plurality of boundary lines, receiving, through the touch screen, an input of a window size change command to change a size of at least one of the plurality of windows, and resizing and displaying at least one of the plurality of windows in correspondence to the window size change command.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: June 4, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hwan Choi, Kang-Tae Kim, Young-Jin Kim, Dae-Wook Park, Seung-Woon Lee
  • Patent number: 10310915
    Abstract: Techniques are disclosed for efficiently sequencing operations performed in multiple threads of execution in a computer system. In one set of embodiments, sequencing is performed by receiving an instruction to advance a designated next ticket value, incrementing the designated next ticket value in response to receiving the instruction, searching a waiters list of tickets for an element having the designated next ticket value, wherein searching does not require searching the entire waiters list, and the waiters list is in a sorted order based on the values of the tickets, and removing the element having the designated next ticket value from the list using a single atomic operation. The element may be removed by setting a waiters list head element, in a single atomic operation, to refer to an element in the list having a value based upon the designated next ticket value.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: June 4, 2019
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventor: Oleksandr Otenko
  • Patent number: 10305958
    Abstract: Disclosed aspects relate to checkpointing a set of stream computing data with respect to a stream computing environment having a set of windowed stream operators including both a first windowed stream operator and a second windowed stream operator. It may be identified that the first windowed stream operator has a first subset of the set of stream computing data. It may be identified that the second windowed stream operator has the first subset of the set of stream computing data. It may be determined to checkpoint the first subset of the set of stream computing data without a redundant checkpoint related to the first and second windowed stream operators. The set of stream computing data may be checkpointed without the redundant checkpoint of the first subset of the set of stream computing data.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: May 28, 2019
    Assignee: International Business Machines Corporation
    Inventors: Alexander Cook, Manuel Orozco, Christopher R. Sabotta, John M. Santosuosso
  • Patent number: 10242419
    Abstract: In one embodiment a graphics processing system comprises a graphics processor having execution logic and shared memory and a shader compiler unit to compile a shader program for execution by the execution logic of the graphic processor, wherein the shader is to optimize the shader program during the compile, wherein to optimize the shader program includes to convert a divergent block of parallel instructions into a divergent block and a non-divergent block of instructions.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: March 26, 2019
    Assignee: INTEL CORPORATION
    Inventor: Rahul P. Sathe
  • Patent number: 10224073
    Abstract: Systems and methods are disclosed for automatically constructing output media stream from multiple input media sources by applying models learned from existing media products.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: March 5, 2019
    Assignee: Tijee Corporation
    Inventors: Yong Zhang, Xiaoyong Zhou
  • Patent number: 10198290
    Abstract: A method for executing two tasks in timesharing, includes: decomposing offline each task in a repetitive sequence of consecutive frames, and defining a start date and deadline by which an associated atomic operation must respectively start and end; verifying for each frame of a first of the repetitive sequences the corresponding operation can be performed between any two successive operations of a group of frames of the second repetitive sequence, overlapping the first repetitive sequence frame; and if the verification is satisfied, allowing the execution of the two tasks. Scheduling the operations of the two tasks, if two operations can start, executing the operation having the shorter deadline; and if a single operation can start, executing it if its execution need is less than the time remaining until the next frame start date of the other sequence, plus the time margin associated with the next frame of the other sequence.
    Type: Grant
    Filed: November 27, 2014
    Date of Patent: February 5, 2019
    Assignee: KRONO-SAFE
    Inventors: Vincent David, Adrien Barbot
  • Patent number: 10185384
    Abstract: A system has one or more primary power regions having restrictions indicating that the primary power regions are not to be placed in an offline state. The system also includes one or more secondary power region that can either be parked or off-lined into a limited state having limited functionality in that functionality is removed from the one or more secondary power regions when placed in a limited state. At least one interrupt is allocated to one of the primary power regions, based on interrupt characteristics.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: January 22, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Vishal Sharda, Bruce Lee Worthington
  • Patent number: 10176106
    Abstract: Caching extracted information from application containers by one or more processors. Upon extracting relevant information from a temporary container, the relevant information is cached at a container template level. A space guard is applied controlling an amount of storage consumed by the cached relevant information, and a time guard is applied controlling an expiration of the cached relevant information. The cached relevant information is maintained for injection into a working container. Applying the space guard includes defining a purge process for pruning or removing cached relevant information stored in the cache, and candidate files for the purge process may be identified using a predetermined criterion. Applying the time guard includes using a time metric defined in a profile of an information injection agent, where the time metric is based on one of a creation time, a last access time or a last modified time of the cached relevant information.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: January 8, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Lior Aronovich, Shibin I. Ma
  • Patent number: 10169078
    Abstract: A thread in a computing system is processed for execution of instructions to perform an action. The action is one of the following: accessing a shared resource or executing a critical section of code. A schedule of the thread is managed. The management prevents suspension of the thread during execution of the action.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: January 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Christopher N. Bailey, Oliver M. Deakin
  • Patent number: 10163181
    Abstract: For effective joint evaluation of a medical image dataset on a first data processing device and at least one second data processing device that is connected to the first data processing device via a data transmission network, a first application is performed in the first data processing device, and a second application is performed in the second data processing device. Each of the applications has a respective graphical user interface having at least one segment for display of a view of the image dataset. An image processing pipeline is associated with each segment for deriving the view from the image dataset. Partially processed data of the image dataset is decoupled from the image processing pipeline of the segment of the first application, is transferred to the second application, and there is coupled to the image processing pipeline of the segment of the second application for preparing the view.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: December 25, 2018
    Assignee: Siemens Aktiengesellschaft
    Inventors: Lutz Dominick, Vladyslav Ukis
  • Patent number: 10162653
    Abstract: A management agent operates transparently in the background on each endpoint computing device that needs to be managed. The agent sets up a sandboxed environment on the endpoint computing device on which it is operating in order to capture applications that have been installed on the endpoint device. The application capture is performed after the applications have been installed on the endpoint device and therefore does not require installing the application on any dedicated staging machine, nor any recording of the pre-installation state. The application capture process involves running the application from an isolated sandboxed environment on the computing device in order to identify all necessary components of the application by monitoring accesses by the application to components located outside of the sandbox. The identified components can then be packaged together and managed as individual application packages.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: December 25, 2018
    Assignee: VMware, Inc.
    Inventors: Nir Adler, Dima Golbert, Avshi Avital
  • Patent number: 10120868
    Abstract: An outcast index in a distributed file system is described. A first server can receive an indication that a first replica stored on the first server is to be modified in view of a second replica stored on a second server. The first replica and the second replica are replicas of a same file. The first server updates metadata associated with the first replica to indicate an outcast state of the first replica. The first server receives an indication that the modification of the first replica is complete. The first server updates the metadata associated with the first replica to remove the outcast state of the first replica.
    Type: Grant
    Filed: February 11, 2014
    Date of Patent: November 6, 2018
    Assignee: Red Hat, Inc.
    Inventors: Anand Vishweswaran Avati, Pranith Kumar Karampuri
  • Patent number: 10120713
    Abstract: A task control circuit maintains, in response to task event information, a task information queue that includes task information for a plurality of tasks. Based upon the task information in the task information queue, a future task switch condition is identified as corresponding to a task switch time for a particular task of the plurality of tasks. A load start time is determined for a set of instructions for the particular task. A pre-fetch request is generated to load the set of instructions for the particular task into the memory circuit. The pre-fetch request is forwarded to a hardware loader circuit. In response to the task switch time, a task event trigger is generated for the particular task. The hardware loader circuit is used to load, in response to the pre-fetch request, the set of instructions from a non-volatile memory into the memory circuit.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: November 6, 2018
    Assignee: NXP USA, Inc.
    Inventors: Michael Rohleder, Stefan Singer, Jochen Gerster
  • Patent number: 10120712
    Abstract: Pre-fetching instructions for tasks of an operating system (OS) is provided by calling a task scheduler that determines a load start time for a set of instructions for a particular task corresponding to a task switch condition. The OS calls, and in response to the load start time, a loader entity module that generates a pre-fetch request that loads the set of instructions for the particular task from a non-volatile memory circuit into a random access memory circuit. The OS calls the task scheduler to switch to the particular task.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: November 6, 2018
    Assignee: NXP USA, Inc.
    Inventors: Stefan Singer, Jochen M Gerster, Michael Rohleder
  • Patent number: 10114624
    Abstract: A method and apparatus are disclosed for enhancing operable functionality of input source code files from a software program by identifying a first code snippet and a first library function which generate similar outputs from a shared input by parsing each and every line of code in a candidate code snippet to generate a templatized code snippet data structure for the first code snippet, and then testing the templatized code snippet data structure against extracted library function information to check for similarity of outputs between the first code snippet and the first library function in response to a shared input so that the developer is presented with a library function recommendation which includes the first code snippet, the first library function, and instructions for replacing the first code snippet with the first library function.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: October 30, 2018
    Assignee: DevFactory FZ-LLC
    Inventors: Tushar Makkar, Mukund Mandyam Kannappan
  • Patent number: 10095526
    Abstract: A multi-threaded processing unit includes a hardware pre-processor coupled to one or more processing engines (e.g., copy engines, GPCs, etc.) that implement pre-emption techniques by dividing tasks into smaller subtasks and scheduling subtasks on the processing engines based on the priority of the tasks. By limiting the size of the subtasks, higher priority tasks may be executed quickly without switching the context state of the processing engine. Tasks may be subdivided based on a threshold size or by taking into account other consideration such as physical boundaries of the memory system.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: October 9, 2018
    Assignee: NVIDIA CORPORATION
    Inventors: Samuel H. Duncan, Gary Ward, M. Wasiur Rashid, Lincoln G. Garlick, Wojciech Jan Truty
  • Patent number: 10095562
    Abstract: A system and method can use continuation-passing to transform a queue from non-blocking to blocking. The non-blocking queue can maintain one or more idle workers in a thread pool that is not accessible from outside of the non-blocking queue. The continuation-passing can eliminate one or more serialization points in the non-blocking queue, and allows a caller to manage the one or more idle workers in the thread pool from outside of the non-blocking queue.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: October 9, 2018
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventor: Oleksandr Otenko
  • Patent number: 10091289
    Abstract: Expediting content delivery is disclosed. A request for content is received from a requestor. A cached component of the requested content that includes at least some cached executable content is identified. The cached component of the requested content is provided to the requestor for provisional execution. It is determined whether a change, if any, in the requested content may invalidate the provisional execution.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: October 2, 2018
    Assignee: Instart Logic, Inc.
    Inventors: Hariharan Kolam, Peter Blum
  • Patent number: 10089578
    Abstract: A system, method and computer product for predicting a content attribute are provided by collecting labeled media objects labeled with one or more attributes, constructing a feature vector of content-derived values for each of the labeled media objects, generating a model based on the feature vector and the one or more attributes, and applying the model to one or more unlabeled media objects to generate one or more attribute labels.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: October 2, 2018
    Assignee: Spotify AB
    Inventors: Tristan Jehan, Nicola Montecchio
  • Patent number: 10048965
    Abstract: A processor includes a front end, an execution pipeline, and a binary translator. The front end includes logic to receive an instruction and to dispatch the instruction to a binary translator. The binary translator includes logic to determine whether the instruction includes a control-flow instruction, identify a source address of the instruction, identify a target address of the instruction, determine whether the target address is a known destination based upon the source address, and determine whether to route the instruction to the execution pipeline based upon the determination whether the target address is a known destination based upon the source address. The target address includes an address to which execution would indirectly branch upon execution of the instruction.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: August 14, 2018
    Assignee: Intel Corporation
    Inventors: Petros Maniatis, Shantanu Gupta, Naveen Kumar
  • Patent number: 10037145
    Abstract: A present disclosure provides a garbage collector capable of freeing memory reachable only by a terminated thread immediately upon thread exit without scanning the heap or blocking other threads. A heap, including a plurality of spans, is walked, for example when the heap reaches a predetermined size. Reachable objects are marked in a mark bitmap. A mutator sweeps the mark bitmap without clearing mark bits, and newly allocated objects are not marked. When the thread terminates, sweep pointers in each of the spans owned by the terminated thread are reset. Moreover, a write barrier that makes a first unpublished object reachable from a second published object, also publishes the first object and all objects reachable from the first object.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: July 31, 2018
    Assignee: Google LLC
    Inventors: Richard Lewis Hudson, Russell Stensby Cox, David Read Chase, Austin Thomas Kona Clements
  • Patent number: 10019261
    Abstract: Methods, systems and computer program products for resolving multiple magnitudes assigned to a target vector are disclosed. A target vector that includes one or more target vector dimensions is received. One of the target vector dimensions is processed to determine a total number of magnitudes assigned to the processed target vector dimension. Also, a source vector that includes one or more source vector dimensions is received. The received source vector is processed to determine a total number of features associated with the source vector. When it is detected that the total number of magnitudes assigned to the processed target vector dimension exceeds one, one of the assigned magnitudes is selected based on one of the determined features associated with the source vector.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: July 10, 2018
    Assignee: A-LIFE MEDICAL, LLC
    Inventors: Daniel T. Heinze, Mark L. Morsch
  • Patent number: 9967222
    Abstract: Disclosed in the present application are a method and device for managing a shared memory in a robot operating system.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: May 8, 2018
    Assignee: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGY CO., LTD.
    Inventors: Jingchao Feng, Liming Xia, Quan Wang, Ning Qu, Zhuo Chen
  • Patent number: 9940013
    Abstract: A method of controlling a display device including a touch screen is provided. The method includes displaying, on the touch screen, a plurality of windows respectively corresponding to executing applications, such that the windows do not overlap each other, displaying a plurality of boundary lines differentiating the plurality of windows, and a center button disposed at an intersection point of the plurality of boundary lines, receiving, through the touch screen, an input of a window size change command to change a size of at least one of the plurality of windows, and resizing and displaying at least one of the plurality of windows in correspondence to the window size change command.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: April 10, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hwan Choi, Kang-Tae Kim, Young-Jin Kim, Dae-Wook Park, Seung-Woon Lee
  • Patent number: 9940164
    Abstract: One or more processors determine that a user is attempting to execute an unscheduled computing task and estimate the time for execution. One or more processors determine that a computing task is scheduled to execute along with the unscheduled computing task. One or more processors warn the user that the computing task is scheduled to execute along with the unscheduled computing task. One or more processors estimate one or both of: a utilization of processing and a memory consumption for the computing tasks and determine whether a threshold will be exceeded. If the threshold will be exceeded, one or more processors warn the user.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: April 10, 2018
    Assignee: International Business Machines Corporation
    Inventor: Sunil Verma
  • Patent number: 9940165
    Abstract: One or more processors determine that a user is attempting to execute an unscheduled computing task and estimate the time for execution. One or more processors determine that a computing task is scheduled to execute along with the unscheduled computing task. One or more processors warn the user that the computing task is scheduled to execute along with the unscheduled computing task. One or more processors estimate one or both of: a utilization of processing and a memory consumption for the computing tasks and determine whether a threshold will be exceeded. If the threshold will be exceeded, one or more processors warn the user.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: April 10, 2018
    Assignee: International Business Machines Corporation
    Inventor: Sunil Verma
  • Patent number: 9934070
    Abstract: Information representative of a graph-based program specification has components, and directed links between ports of said components, defining a dependency between said components. A directed link exists between a port of a first component and a port of a second component. The first component specifies first-component execution code that when compiled enables execution of a first task. The second component specifies second-component execution code that when compiled enables execution of a second task. Compiling the graph-based program specification includes grafting first control code to said first-component execution code, which changes a state of said second component to a pending state, an active state, or a suppressed state. Based on said state, said first control code causes at least one of: invoking said second component if said state changes from pending to active, or suppressing said second component if said state changes from pending to suppressed.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: April 3, 2018
    Assignee: Ab Initio Technology LLC
    Inventors: Craig W. Stanfill, Richard Shapiro
  • Patent number: 9924017
    Abstract: A vehicle computing system includes at least one processor in communication with a mobile device via a wireless transceiver. The at least one processor is configured to launch a second application from an inactive state at the mobile device based on a message transmitted to a first application in an active state being executed in a foreground at the mobile device. The message is configured with an application identification of the second application.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: March 20, 2018
    Assignee: Livio, Inc.
    Inventors: Justin Dickow, Joel J. Fischer
  • Patent number: 9898350
    Abstract: Described are techniques for synchronizing operations performed on objects. Locking tables may be received where each of the locking tables corresponds to different object class. First processing may be performed by a first thread to acquire a set of one or more locks. Each lock in the set may be a lock for one of the objects. The first processing may include traversing the locking tables in accordance with a predefined ordering and acquiring the set of one or more locks, wherein, for each lock in the set, a first entry is updated in a first of the locking tables to indicate that the first thread has acquired the lock on one of the objects included in an associated object class corresponding to the first locking table.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: February 20, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Sergey Alexandrovich Alexeev, Alexey Vladimirovich Shusharin, Ilya Konstantinovich Morev, Sergey Alexandrovich Zaporozhtsev
  • Patent number: 9842005
    Abstract: A system for executing instructions using a plurality of register file segments for a processor. The system includes a global front end scheduler for receiving an incoming instruction sequence, wherein the global front end scheduler partitions the incoming instruction sequence into a plurality of code blocks of instructions and generates a plurality of inheritance vectors describing interdependencies between instructions of the code blocks. The system further includes a plurality of virtual cores of the processor coupled to receive code blocks allocated by the global front end scheduler, wherein each virtual core comprises a respective subset of resources of a plurality of partitionable engines, wherein the code blocks are executed by using the partitionable engines in accordance with a virtual core mode and in accordance with the respective inheritance vectors. A plurality register file segments are coupled to the partitionable engines for providing data storage.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventor: Mohammad Abdallah
  • Patent number: 9836334
    Abstract: A method, information processing system, and computer program product are provided for managing operating system interference on applications in a parallel processing system. A mapping of hardware multi-threading threads to at least one processing core is determined, and first and second sets of logical processors of the at least one processing core are determined. The first set includes at least one of the logical processors of the at least one processing core, and the second set includes at least one of a remainder of the logical processors of the at least one processing core. A processor schedules application tasks only on the logical processors of the first set of logical processors of the at least one processing core. Operating system interference events are scheduled only on the logical processors of the second set of logical processors of the at least one processing core.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: December 5, 2017
    Assignee: International Business Machines Corporation
    Inventors: John Divirgilio, Liana L. Fong, John Lewars, Seetharami R. Seelam, Brian F. Veale
  • Patent number: 9813766
    Abstract: Disclosed are various embodiment(s) for a digital device and a service processing method by the digital device. Here, a digital device according to an embodiment of the present invention comprises: a display processing unit for transmitting a first lifecycle message, a second lifecycle message, and coordinate information on the size and the position of the second application in a display, to Webkits of a first application and a second application, when a plurality of applications exist in the foreground; a display engine comprising a main sink for the first application and a sub sink for the second application; and a video processing unit for connecting the first application to the main sink of the display engine according to an identifier and a connection request received from a Webkit of the first application and connecting the second application to the sub sink of the display engine according to an identifier and a connection request received from a Webkit of the second application.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: November 7, 2017
    Assignee: LG ELECTRONICS INC.
    Inventors: Sanghoon Jeon, Peter Nordstrom, Ian Cain, Yousun Lee, Robert Jagt
  • Patent number: 9811364
    Abstract: Application virtualization at the thread level, rather than at the process level. the operation of a thread across virtualization contexts. For instance, one virtualization context might be a native environment, whereas another virtualization context might be a virtualization environment in which code running inside a virtualization package has access to virtualized computing resources. A thread operating in a first virtualization context then enters an entry point to code associated with a second virtualization context. For instance, a native thread might enter a plug-in operating as part of a virtualized package in a virtualization environment. While the thread is operating on the code, the thread might request access to the second computing resources associated with the second virtualization environment. In response, the thread is associated with the second virtualization context such that the thread has access to the second computing resources associated with the second virtualization context.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: November 7, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Neil A. Jacobson, Gurashish Singh Brar, Kristofer Hellick Reierson
  • Patent number: 9774682
    Abstract: Embodiments relate to parallel data streaming between a first computer system and a second computer system. Aspects include transmitting a request to establish an authenticated connection between a processing job on the first computer system and a process on the second computer system and transmitting a query to the process on the second computer system over the authenticated connection. Aspects further include creating one or more tasks on the first computer system configured to receive data from the second computer system in parallel and reading data received by the one or more tasks by the processing job on the first computer system.
    Type: Grant
    Filed: January 8, 2015
    Date of Patent: September 26, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sangeeta T. Doraiswamy, Marc Hörsken, Fatma Ozcan, Mir H. Pirahesh
  • Patent number: 9772887
    Abstract: Parallel tasks are created, and the tasks include a first task and a second task. Each task resolves a future. At least one of three possible continuations for each of the tasks is supplied. The three continuations include a success continuation, a cancellation continuation, and a failure continuation. A value is returned as the future of the first task upon a success continuation for the first task. The value from the first task is used in the second task to compute a second future. The cancellation continuation is supplied if the task is cancelled and the failure continuation is supplied if the task does not return a value and the task is not cancelled.
    Type: Grant
    Filed: June 2, 2008
    Date of Patent: September 26, 2017
    Assignee: Microsoft Technology Learning, LLC
    Inventors: John Duffy, Stephen H. Toub
  • Patent number: 9766893
    Abstract: A method for executing instructions using a plurality of virtual cores for a processor. The method includes receiving an incoming instruction sequence using a global front end scheduler, and partitioning the incoming instruction sequence into a plurality of code blocks of instructions. The method further includes generating a plurality of inheritance vectors describing interdependencies between instructions of the code blocks, and allocating the code blocks to a plurality of virtual cores of the processor, wherein each virtual core comprises a respective subset of resources of a plurality of partitionable engines. The code blocks are executed by using the partitionable engines in accordance with a virtual core mode and in accordance with the respective inheritance vectors.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: September 19, 2017
    Assignee: Intel Corporation
    Inventor: Mohammad Abdallah
  • Patent number: 9760404
    Abstract: Generally, this disclosure provides systems, devices, methods and computer readable media for dynamic tuning of multiprocessor and multicore computing systems to improve application performance and scalability. A system may include a number of processing units (CPUs) and profiling circuitry configured to detect the existence of a scalability problem associated with the execution of an application on CPUs and to determine if the scalability problem is associated with an access contention or a resource constraint. The system may also include scheduling circuitry configured to bind the application to a subset of the total number of CPUs if the scalability problem is associated with access contention.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: September 12, 2017
    Assignee: Intel Corporation
    Inventors: Keqiang Wu, Kingsum Chow, Ying C. Feng, Khun Ban
  • Patent number: 9733990
    Abstract: A first executing unit executes a first program by emulating information processing in a first operational environment in which the first program is executable. A generating unit generates, in parallel with the execution of the first program, a second program which is executable in a second operational environment of an information processing system and which is capable of acquiring the same processing result as the first program. A second executing unit terminates the execution of the first program by the first executing unit and also executing the second program, after the generation of the second program is completed.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: August 15, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Taki Kono, Yoshiaki Kurihara, Kanami Hitsuda, Hiroshi Furukawa
  • Patent number: 9727467
    Abstract: A grace period detection technique for a preemptible read-copy update (RCU) implementation that uses a combining tree for quiescent state tracking. When a leaf level bitmask indicating online/offline CPUs is fully cleared due to all of its assigned CPUs going offline as a result of hotplugging operations, the bitmask state is not immediately propagated to the root level of the combining tree as in prior art RCU implementations. Instead, propagation is deferred until all tasks are removed from an associated leaf level task list tracking tasks that were preempted inside an RCU read-side critical section. Deferring bitmask propagation obviates the need to migrate the task list to the combining tree root level in order to prevent premature grace period termination. The task list can remain at the leaf level. In this way, CPU hotplugging is accommodated while avoiding excessive degradation of real-time latency stemming from the now-eliminated task list migration.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: August 8, 2017
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Patent number: 9720836
    Abstract: A grace period detection technique for a preemptible read-copy update (RCU) implementation that uses a combining tree for quiescent state tracking. When a leaf level bitmask indicating online/offline CPUs is fully cleared due to all of its assigned CPUs going offline as a result of hotplugging operations, the bitmask state is not immediately propagated to the root level of the combining tree as in prior art RCU implementations. Instead, propagation is deferred until all tasks are removed from an associated leaf level task list tracking tasks that were preempted inside an RCU read-side critical section. Deferring bitmask propagation obviates the need to migrate the task list to the combining tree root level in order to prevent premature grace period termination. The task list can remain at the leaf level. In this way, CPU hotplugging is accommodated while avoiding excessive degradation of real-time latency stemming from the now-eliminated task list migration.
    Type: Grant
    Filed: May 11, 2015
    Date of Patent: August 1, 2017
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Patent number: 9686206
    Abstract: The present invention relates to a temporal base method of mutual exclusion control of a shared resource. The invention will usually be implemented by a plurality of host computers sharing a shared resource where each host computer will read a reservation memory that is associated with the shared resource. Typically a first host computer will perform and initial read of the reservation memory and when the reservation memory indicates that the shared resource is available, the first host computer will write to the reservation memory. After a time delay, the host computer will read the reservation memory again to determine whether it has won access to the resource. The first host computer may determine that it has won access to the shared resource by checking that data in the reservation memory includes an identifier corresponding to the first host computer.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: June 20, 2017
    Assignee: SILICON GRAPHICS INTERNATIONAL CORP.
    Inventors: Joseph Carl Nemeth, Kevan Flint Rehm
  • Patent number: 9680657
    Abstract: A mainframe computing system includes a central processor complex, a plurality of billing entities, each billing entity having a respective capacity limit, and a workload manager that schedules work requested by the plurality of billing entities on the central processor complex and tracks, by billing entity, a rolling average of millions of service units. The mainframe also includes a dynamic capping policy that identifies a maximum MSU limit, a maximum cost limit, a subset of the plurality of billing entities, and, for each billing entity in the subset, information from which to determine a MSU entitlement value and cost entitlement value. The mainframe also includes a dynamic capping master that adjusts the respective capacity limits of the subset of the plurality of billing entities at scheduled intervals based on the dynamic capping policy to favor billing entities having high-importance workload within the maximum MSU limit and maximum cost limit.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: June 13, 2017
    Assignee: BMC Software, Inc.
    Inventors: Paul Charles Spicer, Steven Degrange, Hemanth Rama, Sridhar Gangavarapu, Robert Perini, Edward Williams
  • Patent number: 9672038
    Abstract: A scalable concurrent queue includes a central queue associated with multiple temporary queues for holding batches of nodes from multiple producers. When a producer thread or service performs an insertion operation on the scalable concurrent queue, the producer inserts one or more nodes into a batch in one of the multiple temporary queues associated with the central queue. Subsequently, the producer (or another producer) inserts the batch held in the temporary queue into the central queue. Contention between the multiple producers is reduced by providing multiple temporary queues into which the producers may insert nodes, and also by inserting nodes in the central queue in batches rather than one node at a time. The scalable concurrent queue scales to serve large number of producers with reduced contention thereby improving performance in a distributed data grid.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: June 6, 2017
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventor: Mark Falco
  • Patent number: 9652301
    Abstract: A system and method of parallelizing programs assigns write tokens and read tokens to data objects accessed by computational operations. During run time, the write sets and read sets for computational operations are resolved and the computational operations executed only after they have obtained the necessary tokens for data objects corresponding to the resolved write and read sets. A data object may have unlimited read tokens but only a single write token and the write token may be released only if no read tokens are outstanding. Data objects provide a wait list which serves as an ordered queue for computational operations waiting for tokens.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: May 16, 2017
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Gagan Gupta, Gurindar S. Sohi, Srinath Sridharan
  • Patent number: 9632978
    Abstract: A reconfigurable processor based on mini-cores (MCs) includes a plurality of MCs, each MC of the MCs including a group of function units (FUs), the group of FUs having a capability of executing a loop iteration independently. The MCs include a first MC configured to execute a first loop iteration, and a second MC configured to execute a second loop iteration.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: April 25, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hae-Woo Park, Won-Sub Kim
  • Patent number: 9628428
    Abstract: Some embodiments provide a method to extract metadata of MIME attachments or other distinguishable MIME parts of MIME emails into virtual emails. The virtual emails do not contain the full MIME attachment data but instead include some or all header fields of the parent email which contains the MIME attachment and a link to the MIME part of the MIME attachment in this email. The virtual emails may be stored in a separate namespace, or a folder which may be hidden from some IMAP clients, on an IMAP server. The virtual emails may be indexed by the IMAP server like any other email. Virtual emails may be created when new emails arrive on the IMAP server and synchronized automatically, e.g., when the parent email changes. As such, standard IMAP commands like FETCH, SEARCH, SORT, THREAD, etc. may be used for virtual emails.
    Type: Grant
    Filed: July 4, 2016
    Date of Patent: April 18, 2017
    Assignee: OX SOFTWARE GMBH
    Inventor: Timo Sirainen
  • Patent number: 9588823
    Abstract: A system and method for distributed computing, including executing a job of distributed computing on compute nodes. The speed of parallel tasks of the job executing on the compute nodes are adjusted to increase performance of the job or to lower power consumption of the job, or both, wherein the adjusting is based on imbalances of respective speeds of the parallel tasks.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: March 7, 2017
    Assignee: Intel Corporation
    Inventors: Muralidhar Rajappa, Andy Hoffman, Devadatta V. Bodas, Justin J. Song, James W. Alexander
  • Patent number: 9588790
    Abstract: A system for providing a stateful virtual compute system is provided. The system may be configured to maintain a plurality of virtual machine instances. The system may be further configured to receive a request to execute a program code and select a virtual machine instance to execute the program code on the selected virtual machine instance. The system may further associate the selected virtual machine instance with shared resources and allow program codes executed in the selected virtual machine instance to access the shared resources.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: March 7, 2017
    Assignee: Amazon Technologies, Inc.
    Inventors: Timothy Allen Wagner, Sean Philip Reque
  • Patent number: 9588921
    Abstract: Embodiments of the technology can provide steering of one or more I/O resources to compute subsystems on a system-on chip (SoC). The SoC may include a first I/O subsystem comprising a plurality of first I/O resources and a second I/O subsystem comprising a plurality of second I/O resources. A steering engine may steer at least one of the first I/O resources to either a network compute subsystem or to a server compute subsystem and may steer at least one of the second I/O resources to either the network compute subsystem or to the server compute subsystem.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: March 7, 2017
    Assignee: Amazon Technologies, Inc.
    Inventors: Mark Bradley Davis, David James Borland
  • Patent number: 9558113
    Abstract: Methods and systems for performing garbage collection involving sensitive information on a mobile device are described herein. Secure information is received at a mobile device over a wireless network. The sensitive information is extracted from the secure information. A software program operating on the mobile device uses an object to access the sensitive information. Secure garbage collection is performed upon the object after the object becomes unreachable.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: January 31, 2017
    Assignee: Citrix Systems International GmbH
    Inventors: Herbert Anthony Little, Neil Patrick Adams, Stefan E. Janhunen, John Fredric Arthur Dahms