Dependency Based Cooperative Processing Of Multiple Programs Working Together To Accomplish A Larger Task Patents (Class 718/106)
  • Patent number: 10013290
    Abstract: A system and method are provided for synchronizing threads in a divergent region of code within a multi-threaded parallel processing system. The method includes, prior to any thread entering a divergent region, generating a count that represents a number of threads that will enter the divergent region. The method also includes using the count within the divergent region to synchronize the threads in the divergent region.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: July 3, 2018
    Assignee: Nvidia Corporation
    Inventor: Stephen Jones
  • Patent number: 10007551
    Abstract: Various technologies and techniques are disclosed for switching threads within routines. A controller routine receives a request from an originating routine to execute a coroutine, and executes the coroutine on an initial thread. The controller routine receives a response back from the coroutine when the coroutine exits based upon a return statement. Upon return, the coroutine indicates a subsequent thread that the coroutine should be executed on when the coroutine is executed a subsequent time. The controller routine executes the coroutine the subsequent time on the subsequent thread. The coroutine picks up execution at a line of code following the return statement. Multiple return statements can be included in the coroutine, and the threads can be switched multiple times using this same approach. Graphical user interface logic and worker thread logic can be co-mingled into a single routine.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: June 26, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventor: Krzysztof Cwalina
  • Patent number: 9959142
    Abstract: One dynamic task scheduling method includes: receiving a task, wherein the task comprises a kernel and a plurality of data items to be processed by the kernel; dynamically partitioning the task into a plurality of sub-tasks, each having the kernel and a variable-sized portion of the data items; and dispatching the sub-tasks to a plurality of computing devices of a heterogeneous computing system. Another dynamic task scheduling method includes: receiving a task, wherein the task comprises a kernel and a plurality of data items to be processed by the kernel; partitioning the task into a plurality of sub-tasks, each having the kernel and a same fixed-sized portion of the data items; and dynamically dispatching the sub-tasks to a plurality of computing devices of a heterogeneous computing system.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: May 1, 2018
    Assignee: MEDIATEK INC.
    Inventors: Che-Ming Hsu, Tzu-Hung Yen, Yu-Mao Kao, Shih-Chieh Huang, Ting-Chang Huang
  • Patent number: 9952859
    Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: April 24, 2018
    Assignee: Intel Corporation
    Inventors: Ed Grochowski, Hong Wang, John P. Shen, Perry H. Wang, Jamison D. Collins, James Held, Partha Kundu, Raya Leviathan, Tin-Fook Ngai
  • Patent number: 9946615
    Abstract: A management apparatus includes a processor to collect resource usage quantities of one or more first site processes executed on an information processing apparatus of a first site, and the resource usage quantities of one or more second site processes executed on an information processing apparatus of a second site to which the processes of the first site are migrated, and to define, as resource control information, at least one of stopping any one or more of the second site processes and reducing resources allocated to any one or more of the second site processes corresponding to variations of the resource usage quantities of the first site processes and the second site processes, the resource usage quantities being collected by the processor.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: April 17, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Katsuo Iimura, Kenichirou Shimogawa, Takahiro Kojima, Yutaka Ezaki, Ingyn Tara
  • Patent number: 9940207
    Abstract: Embodiments of the present disclosure disclose a method, an apparatus and a computer program product for failing back block objects in batch by performing failback operations in batch to part of block objects of one or more of existing file systems; determining a delay time required for performing failback operations in a next batch based on the recorded number of block objects that have been failed back in last batches; and performing the failback operations in the next batch to remaining block objects after the delay time.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: April 10, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Jinwei Li, Gang Cao, Walter Lei Wang, Matt Zhu Zhang, Ren Ren
  • Patent number: 9940138
    Abstract: Methods and apparatus are disclosed for using a register checkpointing mechanism to resolve multithreading mis-speculations. Valid architectural state is recovered and execution is rolled back. Some embodiments include memory to store checkpoint data. Multiple thread units concurrently execute threads. They execute a checkpoint mask instruction to initialize memory to store active checkpoint data including register contents and a checkpoint mask indicating the validity of stored register contents. As register contents change, threads execute checkpoint write instructions to store register contents and update the checkpoint mask. Threads also execute a recovery function instruction to store a pointer to a checkpoint recovery function, and in response to mis-speculation among the threads, branch to the checkpoint recovery function.
    Type: Grant
    Filed: April 8, 2009
    Date of Patent: April 10, 2018
    Assignee: Intel Corporation
    Inventors: Pedro Lopez, Carlos Madriles, Alejandro Martinez, Raul Martinez, Josep M. Codina, Enric Gibert Codina, Fernando Latorre, Antonio Gonzalez
  • Patent number: 9928110
    Abstract: An apparatus may include first and second processors. A first user may be bound to the first processor such that processes of the first user execute on the first processor and do not execute on the second processor. A second user may be bound to the second processor such that processes of the second user execute on the second processor and do not execute on the first processor.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: March 27, 2018
    Assignee: CFPH, LLC
    Inventor: Jacob Loveless
  • Patent number: 9847950
    Abstract: A thread pool of consumers polls existing queues. A thread manager controls the number of active threads. This approach limits the number of threads, but is still able to keep up with the volume of traffic.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: December 19, 2017
    Assignee: Flexera Software LLC
    Inventor: Martin Valdis Markevics
  • Patent number: 9830196
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to manage concurrent predicate expressions. An example method discloses inserting a first condition hook into a first thread, the first condition hook associated with a first condition, inserting a second condition hook into a second thread, the second condition hook associated with a second condition, preventing the second thread from executing until the first condition is satisfied, and identifying a concurrency violation when the second condition is satisfied.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: November 28, 2017
    Assignee: INTEL CORPORATION
    Inventors: Justin E. Gottschlich, Cristiano Ligieri Pereira, Gilles Pokam, Youfeng Wu
  • Patent number: 9830206
    Abstract: A system for providing cross-exception event handling is provided. The system allows a source thread to throw an event (e.g., exception) as part of structured event handling of a programming language that specifies a target thread. When the event is thrown, the source thread starts a handler thread to handle the event in a current context of the target thread. The handler thread is passed an indication of the event and the target thread and sets its context to be consistent with that of handling events in the target thread. The handler thread then handles the event. The source thread may continue its execution in parallel or may terminate its execution as specified in a statement that threw the event. Execution of the target thread may be aborted and its execution continued at an exit statement of an enclosing structured event handling construct—as specified when the event was thrown.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: November 28, 2017
    Assignee: Cray Inc.
    Inventor: Thomas H. Hildebrandt
  • Patent number: 9811392
    Abstract: Computational tasks are mapped with computational locations in a distributed system such as a cloud computing environment. Mapping does not rely on workload estimates. Instead, tasks whose prerequisite tasks or other preconditions are determined to be mutually exclusive are co-located, while other tasks are mapped to different locations than one another. Locations are servers, processor cores, virtual machines, applications, or computational processes, for example. Mutual exclusivity may be determined by detecting that preconditions require different values of a shared variable in order to be satisfied, for example, or determining that preconditions correspond to different branches of a conditional programming statement. A satisfiability engine may also provide a satisfiability determination. Co-located tasks may also be batched, for improved execution performance.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: November 7, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ilya Grebnov, Stephen Siciliano, Charles Lamanna
  • Patent number: 9798583
    Abstract: Described herein are techniques and systems for onboarding a service from client-managed computing infrastructure to network computing infrastructure. As part of the onboarding, a database that stores onboarding information is accessed and a set of tasks is identified. A state diagram is generated based on the onboarding information. The techniques and systems are configured to calculate, within the state diagram, a task execution path that is associated with a highest probability of success for moving the client organization from a current environment associated with the client-managed computing infrastructure to a target environment associated with the network computing infrastructure. The task execution path can be used to identify and provide subsets of tasks as part of an autonomously guided onboarding process. The task execution path can be re-calculated based on a determination that an individual task has not been completed within an expected amount of time to complete the individual task.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: October 24, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Warren Johnson, Sean Dastouri, Ian Liu
  • Patent number: 9778951
    Abstract: Embodiments include computing devices, systems, and methods for task signaling on a computing device. Execution of a task by an initial thread on a critical path of execution may be interrupted to create at least one parallel task by the initial thread that can be executed in parallel with the task executed by the initial thread. An initial signal indicating the creation of the at least one parallel task to a relay thread may be sent by the initial thread. Execution of the task by the initial thread may resume before an acquisition of the at least one parallel task.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: October 3, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Arun Raman, Pablo Montesinos Ortego
  • Patent number: 9766982
    Abstract: A determination is made of a plurality of components whose states are to be determined to generate a statesave. At least one central processing unit that determines a state of a first component of the plurality of components faster than other central processing units is assigned to determine the state of the first component to include in the statesave, where more processing operations have to be performed to determine the state of the first component in comparison to any other component of the plurality of component. One or more of the other central processing units are assigned to other components of the plurality of components to determine states of the other components to include in the statesave.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: September 19, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. Ash, Trung N. Nguyen, Maoyun Tang
  • Patent number: 9766937
    Abstract: Embodiments relate to thread-based cache content savings for task switching in a computer processor. An aspect includes determining a cache entry in a cache of the computer processor that is owned by the first thread, wherein the determination is made based on a hardware thread identifier (ID) of the first thread matching a hardware thread ID in the cache entry. Another aspect includes determining whether the determined cache entry is eligible for prefetching. Yet another aspect includes, based on determining that the determined cache entry is eligible for prefetching, setting a marker in the cache entry to active.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: September 19, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Harold W. Cain, III, David M. Daly, Brian R. Prasky, Vijayalakshmi Srinivasan
  • Patent number: 9753771
    Abstract: A scheduling method of a system-on-chip including a multi-core processor includes detecting a scheduling request of a thread to be executed in the multi-core processor, and detecting a calling thread having the same context as the scheduling-requested thread among threads that are being executed in the multi-core processor. The method includes reassigning or resetting the scheduling-requested thread according to performance of a core to execute the calling thread having the same context.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: September 5, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gyeongtaek Lee, Seungkyu Kim, Jieun Park, WonJoon Jang
  • Patent number: 9741436
    Abstract: In general, this disclosure is directed to techniques for adjusting the timing of operations for a storage device. According to one aspect of the disclosure, a method includes receiving, with at least one device, a workload indicator. The method further includes adjusting, with the at least one device, an operation execution time for the storage device responsive to at least the workload indicator. In some examples, the workload indicator may include a host demand indicator. In additional examples, the workload indicator may include a resource utilization indicator. In further examples, the operation execution time may be one of a write operation execution time or a read operation execution time.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: August 22, 2017
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Ryan J. Goss, Kevin A. Gomez, Mark A. Gaertner
  • Patent number: 9740705
    Abstract: A method for adjusting roles of nodes in a distributed clustered file system can include receiving a first computation operation. The method can also include profiling the first computation operation according to one or more metrics, including identifying and categorizing a first process performed by the first computation operation. The method can also include determining a first file system attribute of the first computation operation. The method can also include performing a lookup operation based on a first computation operation template and identifying that the first computation operation serves a first file system role. The method can also include receiving an identification, in response to the performing the lookup, that a first node of a plurality of nodes can utilize additional computation of the first file system role. The method can also include executing the first computation operation on the first node.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: August 22, 2017
    Assignee: International Business Machines Corporation
    Inventors: Pradipta K. Banerjee, Sasikanth Eda, Deepak R. Ghuge, Sandeep R. Patil
  • Patent number: 9733979
    Abstract: A communication device communicating in conformance with a prescribed communication standard. The device includes a storage storing at least a first virtual program that includes a program implementing a first function of the communication device and a second virtual program that includes a program implementing a second function of the communication device. It also includes an executor configured to successively execute the first and second virtual programs, and a switching controller configured to read at least a part of either one of the first and second virtual programs from the storage, to store the part of either one of the first and second virtual programs into a memory of the executor, to execute the part of either one of the first and second virtual programs in the executor, thereby, to switch the first and second virtual programs to be executed in the executor.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: August 15, 2017
    Assignee: Yokogawa Electric Corporation
    Inventors: Nobuo Okabe, Yukiyo Akisada, Kazunori Miyazawa, Yasuki Sakurai
  • Patent number: 9710300
    Abstract: A computer implemented method generates a visualization of a topology of a flow of multiple transactions. One or more processors detect that a first computer system has received a current transaction initiation request from a precursory transaction. The current transaction initiation request is for an initiation of a current transaction in a computer system, and contains parameter information that is recorded by each computer in a set of interconnected computer systems on which a transaction in the other precursory transactions is executed. One or more processors identify the flow of multiple transactions based on a flow transaction identifier and an identifier of the current transaction in the computer system. The one or more processors generate a visualization of a topology map of the current transaction and the other transactions based on information in the parameter information from the current transaction initiation request.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: July 18, 2017
    Assignee: International Business Machines Corporation
    Inventors: Gerald M. W. Allen, Christopher J. Baker, Dennis L. Plum, Philip I. Wakelin
  • Patent number: 9665396
    Abstract: Controlling tasks includes: receiving ordering information that specifies at least a partial ordering among a plurality of tasks; and generating instructions for performing at least some of the tasks based at least in part on the ordering information. Instructions are stored for executing a first subroutine corresponding to a first task, including a first control section that controls execution of at least a second subroutine corresponding to a second task, the first control section including a function configured to change state information associated with the second task, and to determine whether or not to initiate execution of the second subroutine based on the changed state information. Instructions are stored for executing the second subroutine, including a task section for performing the second task and a second control section that controls execution of a third subroutine corresponding to a third task.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: May 30, 2017
    Assignee: Ab Initio Technology LLC
    Inventor: Craig W. Stanfill
  • Patent number: 9658885
    Abstract: The described technology is directed towards sharing asynchronous (async) tasks between task chains, including in a way that prevents cancellation of lower-level chain entity from cancelling a shared async task. A shared async task is wrapped in multiplexer code that maintains lower-level entity identities as a set of listeners of the shared async task, and when a listener cancels, only removes that listener from the set of listeners so that the shared async task does not cancel as long as one listener remains in the set. Also described is optimization to share an async task, and wrapping tasks in cancel-checking code that prevents the task from running its work if the task is intended to be cancelled but is queued to run before the cancel request is queued to run.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: May 23, 2017
    Assignee: HOME BOX OFFICE, INC.
    Inventors: J. Jordan C. Parker, Tyler R. Furtwangler, Brandon C. Furtwangler, Nathan J. E. Furtwangler, Patrick Finnigan
  • Patent number: 9619291
    Abstract: An improved system and method for a task management library to execute map-reduce applications is provided. A map-reduce application may be operably coupled to a task manager library and a map-reduce library on a client device. The task manager library may include a wrapper application programming interface that provides application programming interfaces invoked by a wrapper to parse data input values of the map-reduce application. The task manager library may also include a configurator that extracts data and parameters of the map-reduce application from a configuration file to configure the map-reduce application for execution, a scheduler that determines an execution plan based on input and output data dependencies of mappers and reducers, a launcher that iteratively launches the mappers and reducers according to the execution plan, and a task executor that requests the map-reduce library to invoke execution of mappers on mapper servers and reducers on reducer servers.
    Type: Grant
    Filed: December 20, 2009
    Date of Patent: April 11, 2017
    Assignee: Yahoo! Inc.
    Inventors: Lluís Garcia Pueyo, Roelof van Zwol
  • Patent number: 9606521
    Abstract: An automation control and monitoring system is provided that includes chainable plug-ins that may work in combination with one another to transform data or generate events. Resources of the automation control and monitoring system may be polymorphically defined based upon a generalized object model. The chainable plug-ins may be chained to make use of and/or affect a resource of any type.
    Type: Grant
    Filed: October 29, 2012
    Date of Patent: March 28, 2017
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: Douglas W. Reid, Joseph Bronikowski, Michael Kalan, Steven John Kowal, Subbian Govindaraj, Taryl Jasper, Kenneth Plache, Douglas J. Reichard, Charles Rischar
  • Patent number: 9563474
    Abstract: This technology relates to assigning a task to a current task queue based on one or more matching category when the new task is received within an application for execution. Availability of one or more existing idle threads within one or more thread groups required for the execution of the received task determined based on one or more utilization parameters, where each of the thread groups is associated with one or more task queues and where the current task queue is one of the task queues. One or more new threads are created to allocate for execution of the task when the existing idle threads are determined to be unavailable in the thread groups within the application. Next, the created new threads are allocated to the task when the existing idle threads are determined to be unavailable. The task is executed using the allocated new threads.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: February 7, 2017
    Assignee: Wipro Limited
    Inventors: Maheshwaran Govindarajeswaran, Arun Jeyaprasad
  • Patent number: 9529632
    Abstract: A method of allocating a memory to a plurality of concurrent threads is presented. The method includes dynamically determining writer threads each having at least one pending write to the memory; and dynamically allocating respective contiguous blocks in the memory for each of the writer threads. Another method of allocating a memory to a plurality of concurrent threads includes launching the plurality of threads as a plurality of wavefronts, dynamically determining a group of wavefronts each having at least one thread requiring a write to the memory, and dynamically allocating respective contiguous blocks in the memory for each wavefront from the group of wavefronts.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: December 27, 2016
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael Mantor, John McCardle, Marcos Zini, Brian Emberling
  • Patent number: 9513975
    Abstract: One embodiment of the present invention sets forth a technique for performing nested kernel execution within a parallel processing subsystem. The technique involves enabling a parent thread to launch a nested child grid on the parallel processing subsystem, and enabling the parent thread to perform a thread synchronization barrier on the child grid for proper execution semantics between the parent thread and the child grid. This technique advantageously enables the parallel processing subsystem to perform a richer set of programming constructs, such as conditionally executed and nested operations and externally defined library functions without the additional complexity of CPU involvement.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: December 6, 2016
    Assignee: NVIDIA Corporation
    Inventors: Stephen Jones, Philip Alexander Cuadra, Daniel Elliot Wexler, Ignacio Llamas, Lacky V. Shah, Jerome F. Duluk, Jr., Christopher Lamb
  • Patent number: 9501328
    Abstract: Embodiments include computing devices, systems, and methods for task-based handling of repetitive processes in parallel. At least one processor of the computing device, or a specialized hardware controller, may be configured to partition iterations of a repetitive process and assign the partitions to initialized tasks to be executed in parallel by a plurality of processor cores. Upon completing a task, remaining divisible partitions of the repetitive process of ongoing tasks may be subpartitioned and assigned to the ongoing task, and the completed task or a newly initialized task. Information about the iteration space for a repetitive process may be stored in a descriptor table, and status information for all partitions of a repetitive process stored in a status table. Each processor core may have an associated local table that tracks iteration execution of each task, and is synchronized with the status table.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: November 22, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Behnam Robatmili, Shaizeen Dilawarhusen Aga, Dario Suarez Gracia, Arun Raman, Aravind Natarajan, Gheorghe Calin Cascaval, Pablo Montesinos Ortego, Han Zhao
  • Patent number: 9501409
    Abstract: A method and an apparatus for an enhanced object model to allow concurrent execution for program code generated from dynamic programming languages, such as JavaScript, are described. An index structure may be introduced to an object model representing a dynamically typed object in addition to a type structure and a data payload storing property or field values of the object. Elements of the index structure may point at corresponding property values as an indirection for accessing the object.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: November 22, 2016
    Assignee: Apple Inc.
    Inventor: Filip J. Pizlo
  • Patent number: 9483307
    Abstract: A method of performing an asynchronous, interactive workflow is provided. The method includes generating a workflow comprising one or more tasks and executing at least a portion of the one or more tasks of the workflow automatically, without user interaction, and in response to a trigger. The method further includes detecting that a current task of the one or more tasks of the workflow requires user interaction, adding the current task to a to-do list of tasks requiring user interaction, and determining that one of an at least one user associated with the workflow has logged on, presenting at least one task from the to-do list to the user, receiving the required user interaction, and executing the at least one task from the to-do list based on the received user interaction.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: November 1, 2016
    Assignee: Swiftpage Act! LLC
    Inventor: George Murray Turner
  • Patent number: 9477465
    Abstract: An arithmetic processing apparatus includes a plurality of arithmetic cores configured to execute threads in parallel, and a control unit configured to cause the arithmetic core to execute a reduction operation for data of the threads having the same storage area to which data is written per a predetermined number of threads in order to add data obtained by the reduction operation to data within a corresponding storage area by an atomic process.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: October 25, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Tsuguchika Tabaru
  • Patent number: 9479578
    Abstract: A content management system synchronizes content items across client computing systems connected by a network. Client devices connected to peer devices on a LAN utilize peer-to-peer synchronization to synchronize content items. Client devices on the LAN broadcast namespaces synchronized on the client devices with other devices on the LAN. Client devices on the LAN connect to a subset of client devices that share a namespace with the connecting client device based on the broadcasts. Upon receiving a notification from the content management system that a new content item has been synchronized with the namespace a client device sends requests for a block comprising a content item to a subset of the connected devices. Additional block requests are sent in the order of randomized blocklist.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: October 25, 2016
    Assignee: DROPBOX, INC.
    Inventor: Eric Swanson
  • Patent number: 9477533
    Abstract: Systems and methods may provide a set of cores capable of parallel execution of threads. Each of the cores may run code that is provided with a progress meter that calculates the amount of work remaining to be performed on threads as they run on their respective cores. The data may be collected continuously, and may be used to alter the frequency, speed or other operating characteristic of the cores as well as groups of cores. The progress meters may be annotated into existing code.
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: October 25, 2016
    Assignee: Intel Corporation
    Inventors: Jonathan M. Eastep, Ilya Sharapov, Rob F. Van Der Wijngaart, Richard J. Greco, Steve S. Sylvester, David N. Lombard
  • Patent number: 9471651
    Abstract: Disclosed herein are techniques for adjusting a map reduce execution environment. It is determined whether some operations in a sequence of operations should be implemented in a map reduce execution environment. If it is determined that some operations in a sequence of operations should be implemented in a map reduce execution environment, the map reduce execution environment is adjusted to achieve a predefined performance objective.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: October 18, 2016
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Alkiviadis Simitsis, William K. Wilkinson
  • Patent number: 9436501
    Abstract: Embodiments relate to thread-based cache content savings for task switching in a computer processor. An aspect includes determining a cache entry in a cache of the computer processor that is owned by the first thread, wherein the determination is made based on a hardware thread identifier (ID) of the first thread matching a hardware thread ID in the cache entry. Another aspect includes determining whether the determined cache entry is eligible for prefetching. Yet another aspect includes, based on determining that the determined cache entry is eligible for prefetching, setting a marker in the cache entry to active.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: September 6, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Harold W. Cain, III, David M. Daly, Brian R. Prasky, Vijayalakshmi Srinivasan
  • Patent number: 9417924
    Abstract: The present invention relates to a method, apparatus, and computer program product for scheduling in job execution. According to embodiments of the present invention, there is provided a method for scheduling a plurality of job slots shared by one or more pre-processors and one or more post-processors in job execution, wherein the data generated by the pre-processor(s) will be fed to the post-processor(s) for processing. The method comprises: determining an overall data generation speed of the pre-processor(s); determining an overall data consumption speed of the post-processor(s); and scheduling allocation of at least one of the job slots between the pre-processor(s) and the post-processor(s) based on the overall data generation speed and the overall data consumption speed. Corresponding apparatus is disclosed as well.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: August 16, 2016
    Assignee: International Business Machines Corporation
    Inventors: Xiao M. Bao, Guan C. Chen, Qi Guo, Yan Li, Tao Liu, Wen tao Tang
  • Patent number: 9405664
    Abstract: A system and method of automating software testing is provided. The system and method may determine whether some of a plurality of anchor points within application instructions is triggered in response to input from a current operation within operation instructions. If some of the plurality of anchor points is triggered, one of the triggered anchor points may be selected. Instructions may be generated that configure a given processor to pause after the current operation until the selected one of the triggered anchor points completes.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: August 2, 2016
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Dror Schwartz, Moshe Eran Kraus, Sagi Monza, Ido Berkovitch, Ithai Levi
  • Patent number: 9400692
    Abstract: A memory management system for managing objects which represent memory in a multi-threaded operating system extracts the ID of the home free-list from the object header to determine whether the object is remote and adds the object to a remote object list if the object is determined to be remote. The memory management system determines whether the number of objects on the remote object list exceeds a threshold. If the threshold is exceeded, the system batch-removes the objects on the remote object list and then adds those objects to the appropriate one or more remote home free-lists.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: July 26, 2016
    Assignee: Software AG
    Inventors: Christopher Reed, Mark Horsburgh
  • Patent number: 9384118
    Abstract: A method, system, and computer program product for identifying an overlay of a data processing target structure in a computing environment is provided. At least one of examining a mapping macro for the target structure with a set of valid ranges, comparing the set of valid ranges with the target structure to identify a string of at least one first invalid value and a last invalid value and locate invalid regions of the target structure, and examining executable code associated with the target structure, comparing at least one unchanged module against at least one additional module exhibiting an overlay characteristic to identify the string of the at least one first invalid value and the last invalid value and locate invalid regions of the target structure, is performed.
    Type: Grant
    Filed: October 29, 2012
    Date of Patent: July 5, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Herman Aranguren, David B. LeGendre, David C. Reed, Max D. Smith
  • Patent number: 9372710
    Abstract: One or more techniques and/or systems are provided for describing virtual machine dependencies. In particular, data objects, such as virtual hard drives, associated with virtual machines may be identified and/or examined to identify data structures, such as configuration files, comprising configuration data. The configuration data may be analyzed to determine dependency relationships between virtual machines to describe virtual machine dependencies. Identifying virtual machine dependencies, among other things, allows virtual machines that are no longer used to be repurposed, deleted, reset, etc. with little to no adverse effect on other virtual machines.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: June 21, 2016
    Assignee: NetApp, Inc.
    Inventors: Deepak Kenchammana-Hosekote, Eric Paul Forgette, Shravan Gaonkar
  • Patent number: 9354904
    Abstract: Portable packages containing encodings of processes are applied to software stacks. The packages are portable and distinct from the software stacks. The packages may be in the form of declarative code for configuring the software stack and can be plugged into the software stack to allow the technology stack to play the packages, thereby configuring the stacks to be capable of automating the processes encoded by the packages. An application or software component can be provided to read a package and apply parts thereof to appropriate corresponding software stack components.
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: May 31, 2016
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Ashvinkumar J. Sanghvi, Giedrius Zizys, Vij Rajarajan
  • Patent number: 9342355
    Abstract: Methods and arrangements for task scheduling. A plurality of jobs is received, each job comprising at least a map phase, a copy/shuffle phase and a reduce phase. For each job, there are determined a map phase execution time and a copy/shuffle phase execution time. Each job is classified into at least one group based on at least one of: the determined map phase execution time and the determined copy/shuffle phase execution time. The plurality of jobs are executed via processor sharing, and the executing includes determining a similarity measure between jobs based on current job execution progress. Other variants and embodiments are broadly contemplated herein.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: May 17, 2016
    Assignee: International Business Machines Corporation
    Inventors: Minghong Lin, Jian Tan, Li Zhang
  • Patent number: 9329821
    Abstract: A printing apparatus includes a storing unit configured to store a job, a printing unit configured to print the job, an acquiring unit configured to acquire a preparation time for the printing unit to become a print-ready state, a determining unit configured to determine a print time for the printing unit to process the job, a specifying unit configured to specify a time for processing the job stored in the storing unit based on the preparation time acquired by the acquiring unit and the print time determined by the determining unit, and a displaying unit configured to display a job execution schedule indicating the job processing time specified by the specifying unit.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: May 3, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Shin Fukuda
  • Patent number: 9317344
    Abstract: A notification service receives messages including various data from application services, and provides notifications including that data to the appropriate computing devices. Each computing device includes a notification system that receives notifications from the notification service and provides those notifications to the appropriate applications on the computing device. If an application is not allowed to run on a computing device, the notification system on the computing device provides an indication to the notification service to block notifications for the application on the computing device. The notification service ceases providing notifications to a computing device targeting applications for which notifications are blocked on the computing device until an indication is received from the computing device to unblock notifications for the application.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: April 19, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Kevin Michael Woley, Benjamin Salim Srour, Gaurav S. Anand, Nathan J. Kuchta, Benjamin D. L. Stewart, Evgeny Skarbovsky, Donovan P. Regan, George Joy, Darren Louie
  • Patent number: 9317322
    Abstract: A computer-implemented method is presented here. The method obtains a script to be executed, wherein the script includes instructions for an asynchronous operation, and wherein the asynchronous operation includes a request calling for a result. The method continues by performing a provisional iteration of the script, wherein the provisional iteration of the script is associated with at least a portion of the script, and wherein the provisional iteration of the script obtains and saves the result as a cached result. Thereafter, a final iteration of the script is performed using the cached result.
    Type: Grant
    Filed: October 24, 2012
    Date of Patent: April 19, 2016
    Assignee: Google Technology Holdings LLC
    Inventor: Wolfram Kriesing
  • Patent number: 9313133
    Abstract: Systems and methods are disclosed for reducing latency in processing data sets in a distributed fashion. A job-queue operable for queuing data-processing jobs run on multiple nodes in a cluster may be communicatively coupled to a job analyzer. The job analyzer may be operable to read the data-processing jobs and extract information characterizing those jobs in ways that facilitate identification of resources in the cluster serviceable to run the data-processing jobs and/or data to be processed during the running of those jobs. The job analyzer may also be coupled to a resource warmer operable to warm-up a portion of the cluster to be used to run a particular data-processing job prior to the running of the job. In some embodiments, mappers and/or reducers may be extracted from the jobs and converted into compute node identifiers and/or data units identifying blocks for processing, informing the warm-up operations of the resource warmer.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: April 12, 2016
    Assignee: ROBIN SYSTEMS, INC.
    Inventors: Krishna Satyasai Yeddanapudi, Christopher Alan Mildebrandt, Rao V. Madduri
  • Patent number: 9298504
    Abstract: In a system having multiple processors, idle processors are wakened in anticipation of tasks that may be subsequently queued. When interrupting a first processor to execute a particular task, a scheduler may also send interrupts to idle or otherwise available processors, instructing the idle processors to begin monitoring task queues and to find and execute compatible tasks that may be subsequently queued.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: March 29, 2016
    Assignee: Amazon Technologies, Inc.
    Inventor: Pradeep Vincent
  • Patent number: 9286139
    Abstract: An automatic mutual exclusion computer programming system is disclosed which allows a programmer to produce concurrent programming code that is synchronized by default without the need to write any synchronization code. The programmer creates asynchronous methods which are not permitted make changes to shared memory that they cannot reverse, and can execute concurrently with other asynchronous methods. Changes to shared memory are committed if no other thread has accessed shared memory while the asynchronous method executed. Changes are reversed and the asynchronous method is re-executed if another thread has made changes to shared memory. The resulting program executes in a serialized order. A blocking system method is disclosed which causes the asynchronous method to re-execute until the blocking method's predicate results in an appropriate value. A yield system call is disclosed which divides asynchronous methods into atomic fragments.
    Type: Grant
    Filed: January 5, 2015
    Date of Patent: March 15, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Andrew David Birrell, Michael Acheson Isard
  • Patent number: 9282118
    Abstract: An embodiment may include policy engine circuitry that may enforce, at least in part, one or more platform resource management policies in a cloud computing environment. The one or more policies may be based, at least in part, upon service arrangements of the cloud computing environment. The one or more policies may establish respective isolated computing environments in the cloud computing environment that may be used by respective users. The enforcement of the one or more policies may result in the respective isolated computing environments being virtually isolated from each other and prevented from interfering with each other in derogation of the one or more policies. The one or more policies may be established, at least in part, via interaction of at least one management process with one or more application program interfaces of the circuitry. Many modifications are possible.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: March 8, 2016
    Assignee: Intel Corporation
    Inventor: Uri Elzur