Patents Represented by Attorney Daniel H. Kane
  • Patent number: 5775494
    Abstract: A package for a disk product has an inner box formed with outer and inner surfaces spaced from each other for presenting a disk product. The outer surface is composed of substantially transparent material so that the disk product is visible through the outer surface. The box is formed with at least one hub on the inner surface with a free end extending toward the outer surface. The free end of the hub is constructed to pass through the center hole of the disk product. The hub is formed with a holding surface for holding a disk product suspended on the hub so that it does not contact the inner surface. An outer box encloses the inner box. The outer box is composed of material bearing printing and graphics and is formed with inner and outer surfaces. The outer surface of the outer box is formed with a window for visibility of the disk product through the window and outer surface of the inner box. The outer box may be formed with a frame around the window.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: July 7, 1998
    Assignee: DeLorme Publishing Company
    Inventor: Jeffrey S. Taplin
  • Patent number: 5613372
    Abstract: A heat pump system dehumidifies air in an enclosure containing a source of humidity such as a swimming pool. The heat pump system invention transfers rejection heat from the primary refrigerant loop to a secondary water loop. The secondary water loop is coupled in heat exchange relationship to the primary condenser of the primary refrigerant loop for receiving the rejection heat including the latent heat and sensible heat from the refrigerant. The secondary water loop incorporates a circulating water pump and a storage tank and affords a substantially uniform load on the compressor, condenser and refrigerant of the refrigerant loop. The secondary water loop then provides versatility and flexibility in meeting variable load demand such as conditioning the enclosure air, heating water in open receptacles such as pools, dumping heat outside the enclosure, or adding heat to the enclosure. The secondary water loop displaces the variable load requirements from direct impact on the primary refrigerant loop.
    Type: Grant
    Filed: May 26, 1995
    Date of Patent: March 25, 1997
    Assignee: Dumont Management, Inc.
    Inventors: David E. Beal, Thomas P. Carson
  • Patent number: 5590864
    Abstract: A handicapped artist's easel is constructed with a horizontal baseboard and an easel board pivotally mounted at the front end of the baseboard for rotation through substantially 180.degree. relative to the baseboard. At least one extendable and retractable arm is coupled between the easel board and the baseboard for varying the angle of the easel board relative to the baseboard from an acute angle to an obtuse angle great enough for presenting the front side of the easel board over the face of an artist painting or sketching with mouth held instruments and confined to a bed or wheelchair. The desired angle can be set by the telescoping arm. An appropriate support structure is provided for holding the weight of the cantilevered easel board at an obtuse angle without interfering in handicapped artist access to the easel board. Multiple uses of the adjustable easel are described.
    Type: Grant
    Filed: October 20, 1994
    Date of Patent: January 7, 1997
    Inventor: Leslie E. Menard
  • Patent number: 5563890
    Abstract: A pointer processor circuit substantially eliminates the pointer gap during justification of an outgoing SONET/SDH frame relative to an incoming SONET/SDH frame. The pointer interpreter circuit PI is constructed to receive an incoming frame, interpret the pointer H1H2, and write data payload bytes of the incoming frame into a FIFO memory. An input clock CLK1 controls the writing of data payload bytes into the FIFO. The FIFO stores only data bytes. A pointer generator circuit PG is coupled to the FIFO and is constructed to read out data payload bytes from the FIFO, create an outgoing frame, and calculate a new pointer. An output clock CLK2 controls reading of data from the FIFO to form an outgoing frame. The PI, FIFO and PG cooperate for justification of the outgoing frame relative to the incoming frame.
    Type: Grant
    Filed: June 14, 1995
    Date of Patent: October 8, 1996
    Assignee: National Semiconductor Corporation
    Inventor: Oscar W. Freitas
  • Patent number: 5559707
    Abstract: A computer aided routing system (CARS) determines a travel route between a user selected travel origin and travel destination following user selected waypoints along the way. A CARS database incorporates travel information selected from a range of multimedia sources about the transportation routes, waypoints, and geographically locatable points of interest (POIs) selected by the user along the travel route. The CARS software permits user selection of specified POI types within a user defined region of interest and user selection of particular POIs from the selected types within the region of interest. The transportation routes, waypoints, POIs and region of interest are identified in the computer by coordinate locations of a selected geographical coordinate system. The CARS software is constructed to present a user customized travelog for preview on the computer display of the user defined travel route.
    Type: Grant
    Filed: January 31, 1995
    Date of Patent: September 24, 1996
    Assignee: DeLorme Publishing Company
    Inventors: David M. DeLorme, Keith A. Gray
  • Patent number: 5535086
    Abstract: An ESD protection circuit for a BICMOS IC device protects NMOS transistors (Q2) of internal CMOS gates (G2) from ESD events at a high potential power rail (VCC). Specifically the ESD protection circuit protects NMOS pulldown transistors coupled between a pullup bipolar emitter follower transistor (Q5) and the low potential power rail (GND). A PMOS current control transistor (QPESD) is coupled with primary current path between the high potential power rail (VCC) and the bipolar emitter follower transistor (Q5) for controlling current flow through the emitter follower transistor. An RC time constant circuit (R10,C1) is coupled between the high potential power rail (VCC) and low potential power rail (GND). The RC time constant circuit is constructed with a time constant for following power up events but not for following the faster ESD events at the high potential power rail.
    Type: Grant
    Filed: September 22, 1994
    Date of Patent: July 9, 1996
    Assignee: National Semiconductor Corp.
    Inventor: Ray A. Mentzer
  • Patent number: 5535219
    Abstract: A pointer processing circuit processes SONET/SDH frames and calculates a new pointer value. A pointer interpreter circuit (PI) is constructed to receive an incoming frame, identify the pointer in transport overhead bytes of the frame, interpret the pointer, and send the pointer value directly to a pointer generator circuit (PG). The pointer value indicates the position of the first byte of the data payload bytes of the incoming frame starting at the trace byte J1. The PI is constructed to tag the next data byte after the pointer H1 H2 and negative justification data holding byte location H3 and send the tagged data byte directly to a FIFO without the delay of counting down to the trace byte J1 of the incoming frame. A first in first out memory FIFO is coupled to the PI for writing data payload bytes from the incoming frame into the FIFO. A pointer generator circuit (PG) is coupled to the FIFO for changing the pointer on the outgoing frame.
    Type: Grant
    Filed: June 14, 1995
    Date of Patent: July 9, 1996
    Assignee: National Semiconductor Corp.
    Inventor: Oscar W. Freitas
  • Patent number: 5513741
    Abstract: A proportional spacing mechanism proportionally spaces objects from a reference position on a fixed support frame. At least one supplemental drive mechanism assists the proportional spacing mechanism in moving the coupling elements and respective objects relative to each other for proportional spacing from the reference position. The supplemental drive mechanism incorporates a first portion coupled to a coupling element spaced from the reference position. A second portion of the supplemental drive mechanism is coupled to the fixed support frame. The supplemental drive mechanism extends and retracts the distance between the first and second portions for assisting motion of the coupling elements and respective objects during rotation of the shaft and crank of the proportional spacing mechanism. Various supplemental drive mechanisms are described including a chain and sprocket drive, a cylinder and piston drive, and a screw drive mechanism.
    Type: Grant
    Filed: August 2, 1994
    Date of Patent: May 7, 1996
    Assignee: Ellis Farms, Inc.
    Inventor: Malcolm P. Ellis
  • Patent number: 5503883
    Abstract: A biodegradable wreath ring provides the central framework for constructing a decorative wreath from plant tips and decorative materials secured to the wreath ring. The wreath ring is of generally circular configuration with specified diameter and is constructed from multiple layers of strips of paper laminated one over another in the radial direction of the ring and bonded together preferably using a biodegradable resin or adhesive material. The wreath ring is of generally cylindrical configuration having a cylinder radial thickness and a cylinder height thickness. The ring is constructed with a sufficient number of layers of paper in the radial direction and with sufficient cylinder radial thickness and height thickness to provide the required structural strength to support a constructed wreath of decorative material having the selected diameter.
    Type: Grant
    Filed: August 24, 1994
    Date of Patent: April 2, 1996
    Inventors: Dugald Kell, Jr., Dugald Kell, Sr.
  • Patent number: 5459737
    Abstract: A test access port (TAP) controls monitoring and testing of static current IDDQ in integrated circuit (IC) devices having both a TAP of the type specified in IEEE Standard 1149.1 Test Access Port and Boundary Architecture and built-in current (BIC) monitors. BIC monitors are coupled between MOS or CMOS modules of the IC device and the low potential power rail (GND) for monitoring static current IDDQ. Bypass or shunt MOS transistors (N1,N2, . . . , NN) are coupled with primary current paths in parallel with the respective BIC monitors between the CMOS circuit modules and low potential power rail (GND). The TAP data registers (TDR's) include a design specific BIC shunt control TDR (BICSC TDR) constructed for receiving a coded BIC monitor bypass code (BICBC) at the TDI pin. BICSC TDR outputs are coupled to control nodes of the respective MOS bypass transistors (N1,N2, . . . , NN) for controlling the conducting state of the bypass transistors according to the BICBC.
    Type: Grant
    Filed: July 7, 1993
    Date of Patent: October 17, 1995
    Assignee: National Semiconductor Corporation
    Inventor: John R. Andrews
  • Patent number: 5450672
    Abstract: A flexible material wall trimming tool (10) cuts flexible material (32) such as flexible flooring material and flexible wall cove material at the intersection of a floor (34) and a wall (35). An elongate low profile block body (12) is formed with a bevel angle pusher surface (15) at the back end (14) of the block body (12) for pushing the wall trimming tool in the elongate cutting direction (18) using the palm of a hand. The bevel angle pusher surface (15) delivers force components downward against the floor (34) and sideways against the wall (35) for accurate cutting. A blade slot (20) is formed on the cutting side (28) of the block body (12) near the back end (14). The blade slot (20) is also formed at a compound angle. A blade holder (24) rigidly clamps a blade (22) in the blade slot (20) at the compound angle. A tool angle trim adjuster (42) is slidably received in a tool angle trim slot (40) on the opposite side (38) of the block body (12) from the cutting side (28).
    Type: Grant
    Filed: April 6, 1994
    Date of Patent: September 19, 1995
    Inventor: Conrad Fortin
  • Patent number: 5441071
    Abstract: An automated water sampling system collects multiple samples of sample water at a remote site. A multiport valve provides a plurality of ports and respective port inlets. A sample water intake line is coupled to the respective port inlets. A plurality of sample receivers or sample containers are coupled to respective ports of the multiport valve. At least one container of cleaning liquid is also coupled to a port of the multiport valve. An output manifold provides a plurality of manifold outlets coupled to the respective sampler receivers and to at least one container of cleaning liquid. A pumping water output line is coupled to the plurality of manifold outlets. A reversible pump is coupled in the water output line for pumping and drawing sample water through the intake line into selected sample receivers and for pumping and pushing cleaning liquid from said at least one cleaning liquid container out the sample water intake line. The multiport valve opens and closes the ports one at a time.
    Type: Grant
    Filed: May 4, 1994
    Date of Patent: August 15, 1995
    Assignee: McLane Research Laboratories, Inc.
    Inventors: Kenneth W. Doherty, Susumu Honjo, John D. Billings
  • Patent number: 5436908
    Abstract: An output skew detection circuit detects and measures output skew tOSLH, tOSHL between multiple in phase common edge output signals propagated through a multiple signal driver circuit having n outputs. The output skew detection circuit senses common edge output skew across the n in phase output signals simultaneously and directly. A first logic gate has n inputs coupled to the n outputs, detects occurrence of either the first or last of the multiple common edge output signals, and generates a first skew detection edge signal at a first logic gate output. The first and last common edge output signals are the signals propagated with minimum and maximum propagation times tplhmin, tphlmin and tplhmax, tphlmax. A second logic gate has n inputs coupled to the n outputs in parallel with the first logic gate. The second logic gate detects occurrence of the other of the first and last of the multiple common edge output signals and generates a second skew detection edge signal at a second logic gate output.
    Type: Grant
    Filed: June 17, 1992
    Date of Patent: July 25, 1995
    Assignee: National Semiconductor Corporation
    Inventors: Jon L. Fluker, Ray A. Mentzer
  • Patent number: 5436183
    Abstract: An electrostatic discharge protection (ESDP) transistor element is coupled at an input or output of an MOS integrated circuit (IC) device for protecting internal transistor elements of the MOS IC device from electrostatic discharge (ESD) dielectric breakdown voltages. A relatively thick passivating layer of low temperature deposited passivating material is deposited over the active area between the channel and gate of the ESDP transistor element. A metal layer gate is formed over the passivating layer. The channel insulating layer thickness provides a turn on voltage V.sub.TON less than the dielectric breakdown voltage BVGOX of internal transistor elements. The bond pads of the MOS IC device are used for the metal layer gates and the metal layer gate bond pads are formed over the active area of the ESDP transistor elements.
    Type: Grant
    Filed: September 16, 1993
    Date of Patent: July 25, 1995
    Assignee: National Semiconductor Corporation
    Inventors: Jeffrey B. Davis, Stephen C. Park
  • Patent number: 5425459
    Abstract: A stone separation table (30,70) selectively separates and drops stones, clods, and dirt (27) between selected rollers while conveying potatoes (33) or other root crops from one side of the table to the other. The stone separation table incorporates sets of rollers (32,72) including separating (36,76) and spacing (40,80) rollers of substantially the same diameter. The sets of rollers are coplanar forming a planar conveying level (45,75) with all rollers driven in the same direction of rotation. The separating roller (36,76) is constructed with projecting elements, either projecting fingers (38) of a star roller (36) or bristles (78) of a brush roller (76) for receiving stones, clods, and dirt (27) for rotation downward and dropping in the separating passageway (42,82) between the separating roller (36,76) and spacer roller (40,80).
    Type: Grant
    Filed: August 6, 1993
    Date of Patent: June 20, 1995
    Inventors: Malcolm P. Ellis, Jaye A. Ellis
  • Patent number: 5398957
    Abstract: A recreational boot attachment (10) adapts a boot (50) for sliding on snow, ice, and other natural and artificial surfaces. The ski device is constructed with a boot length flat elongate base (12) having a toe end (14), heel end (15), and flat bottom surface (16) for sliding. The toe end (14) is formed with a toe end brace (18) or bridge spaced above the base (12) defining a recess (20) for receiving a toe end projection of a boot. The toe end brace (18) bears against an upper surface of the toe end projection of the boot. The toe end (14) rises in the front of the elongate base (12) to join the toe end brace (18) and form a toe end plow (22) at the front. A heel end binding (40) is secured to the heel end (15) of the flat elongate base (12). The binding (40) includes first and second pivoting anchors (44,35,36) pivotally mounted on the respective sides of the base (12) spaced from the heel end (15) of the base.
    Type: Grant
    Filed: October 4, 1993
    Date of Patent: March 21, 1995
    Assignee: Morning Sun, Inc.
    Inventors: Frederick L. Leighton, Kenneth C. Shaknites
  • Patent number: 5389125
    Abstract: A system and method for removing volatile organic compounds (VOC's) from a circulating airstream utilizes first and second adsorption beds and first and second adsorption paths alternately coupling the circulating airstream to the respective first and second adsorption beds for removing VOC's during adsorption cycles. First and second desorption loops alternately couple a desorption inert gas through the respective first and second adsorption beds for desorption and regeneration and for recovering VOC's in a VOC condenser. System parameter sensors are distributed in the first and second adsorption paths and first and second desorption loops for sensing system parameters. A programmable controller is coupled to the system parameter sensors, to flow control valves, and to the inert gas heater for controlling the system in response to sensed system parameters. The system parameter sensors include a variety of temperature, O.sub.2, VOC, pressure, and differential pressure sensors.
    Type: Grant
    Filed: August 20, 1993
    Date of Patent: February 14, 1995
    Assignee: Daniel D. Thayer
    Inventors: Daniel D. Thayer, Bruce D. Barney
  • Patent number: 5385525
    Abstract: An exercise machine is constructed with an elongate rectangular framework having spaced apart vertical legs joined by a plurality of horizontal cross braces. Suction cup anchors are attached to the elongate rectangular framework approximately at the four corners and at midsections of the legs for anchoring the shower exercise machine to nonporous wall surfaces such as tile surfaces or other nonporous wall surfaces of a shower or bath. First and second stretchable resistance cords are anchored at one end to the rectangular framework at the midsection of the legs and terminate at the other ends in hand grips. The stretchable resistance cords pass through pulleys. Pulley supports are provided for supporting the pulleys at different locations on the rectangular framework for example at the top corners or the bottom corners of the rectangular framework for changing the direction of the handle grips and direction of stretching of the cords for exercising different muscles.
    Type: Grant
    Filed: April 8, 1994
    Date of Patent: January 31, 1995
    Inventor: Robert A. Davis
  • Patent number: 5381061
    Abstract: A tristate output buffer circuit provides overvoltage protection from voltage signals on a common bus having a higher voltage level than the internal high potential power rail of the tristate output buffer circuit. A high potential level pseudorail (PV) is coupled to the NWELL of a P channel output pullup transistor (P4). A comparator circuit (P5,P6) couplings the pseudorail (PV) to the output (VOUT). The comparator circuit passgates (P5,P6) are constructed to couple the pseudorail (PV) to the high potential power rail (VCC) for VOUT<VCC and to couple the pseudorail (PV) to the output (VOUT) for VOUT>VCC. A feedback transistor (P1) couples the pseudorail (PV) to an internal node of the tristate output buffer circuit at the control gate node of the output pullup transistor (P4). The feedback transistor (P1) control gate node is coupled to a tristate enable input (EN) for turning on the feedback transistor (P1) during the tristate operating mode and holding off the output pullup transistor (P4).
    Type: Grant
    Filed: March 2, 1993
    Date of Patent: January 10, 1995
    Assignee: National Semiconductor Corporation
    Inventor: Jeffrey B. Davis
  • Patent number: 5379302
    Abstract: An integrated circuit device ECL test access port (TAP) is constructed for low static current requirements and low power consumption when the TAP is inactive. The ECL test access port may conform with IEEE Standard 1149.1 Test Access Port and Boundary Scan Architecture. An SCS logic circuit (50) is incorporated in the TAP controller coupled to the flip-flops (32,34,36,38) of the TAP controller n state finite machine for generating a current sink switch control signal (SCS) according to the state of the TAP controller. A current sink switch circuit (24) is coupled to respective current sinks of ECL gates incorporated in the boundary scan register (BSR/TDR1), design specific TAP data registers (DS/TDRs), TAP instruction register (TIR), and device identification register (DIR/TDR3). The current sink switch circuit (24) has an input coupled to the SCS logic circuit (50) to receive the current sink switch control signal (SCS).
    Type: Grant
    Filed: April 2, 1993
    Date of Patent: January 3, 1995
    Assignee: National Semiconductor Corporation
    Inventor: John R. Andrews