Abstract: Provided are a semiconductor chip attaching apparatus and a semiconductor chip attaching method. The semiconductor chip attaching apparatus includes a collet body comprising a pick-up pad and a pad support and a collet plate on the collet body, the collet plate having a central portion. A lower surface of the edge portion contacts an upper surface of the pad support. An edge portion of the lower surface is spaced apart from the upper surface of the pad support. The apparatus further includes a first pipe extending through the collet plate and the collet body. The collet plate includes a second pipe in the edge portion.

Abstract: In a vertical-type memory device and a method of manufacturing the vertical-type memory device, the vertical memory device includes an insulation layer pattern of a linear shape provided on a substrate, pillar-shaped single-crystalline semiconductor patterns provided on both sidewalls of the insulation layer pattern and transistors provided on a sidewall of each of the single-crystalline semiconductor patterns. The transistors are arranged in a vertical direction of the single-crystalline semiconductor pattern, and thus the memory device may be highly integrated.

Abstract: Disclosed is a global positioning system receiver which comprises a satellite signal receiving part constructed and arranged to extract navigation data from a satellite signal received from at least one satellite; a decoder constructed and arranged to decode the navigation data; a satellite location determining part constructed and arranged to determine a location of the at least one satellite according to the decoded navigation data; and a satellite clock correcting part constructed and arranged to calculate a velocity of the at least one satellite and to correct a satellite clock based on at least one of the calculated satellite velocity and the location of the at least one satellite.

Abstract: Provided are a semiconductor device and a method of forming a semiconductor device in which a plurality of patterns are simultaneously formed to have different widths and the pattern densities of some regions are increased using a double patterning.

Abstract: A three-dimensional graphics system is provided. The three-dimensional graphics system rasterizes each of a plurality of polygons generated from vertexes in an order adapted to characteristics of each polygon. The three-dimensional graphics system includes a rasterization engine including a polygon setup unit receiving the vertexes and generating the polygons and rasterization information for each polygon, and a rasterizer rasterizing pixels using the rasterization information received from the polygon setup unit in an order adapted to the characteristics of each polygon. Accordingly, the coherence of the pixels is increased and the hit ratio of cache memory is thus increased. As a result, the performance of the three-dimensional graphics system is improved. With the increase of the hit ratio of the cache memory, buss traffic in the system is reduced and power consumption is thus reduced.

Abstract: In a method of forming a wiring structure, a first insulation layer is formed on a substrate, the first insulation layer comprising a group of hydrocarbon (C?H?) wherein ? and ? are integers. A second insulation layer is formed on the first insulation layer, the second insulation layer being avoid of the group of hydrocarbon. A first opening is formed through the first and the second insulation layers by etching the first and the second insulation layers. A damaged pattern and a first insulation layer pattern are formed by performing a surface treatment on a portion of the first insulation layer corresponding to an inner sidewall of the first opening. A sacrificial spacer is formed in the first opening on the damaged pattern and on the second insulation layer. A conductive pattern is formed in the first opening.

Abstract: Exposed are a semiconductor device and method of fabricating the same. The device includes an insulation film that is disposed between an active pattern and a substrate, which provides various improvements. This structure enhances the efficiency of high integration and offers an advanced structure for semiconductor devices.

Abstract: In a light emitting device and system providing white light with various color temperatures are provided, a light emitting device includes a light emitting element (LED) that is operated by a driving bias and emits first light, and a phosphor layer including a phosphor that partially wavelength-converts first light and emits second light, thereby emitting white light using the first light and the second light, wherein the phosphor has a maximum conversion efficiency at a first level of the driving bias, and the LED has a maximum conversion efficiency at a second level of the driving bias, the first level being different from the first level.

Abstract: A non-volatile memory device having a vertical structure includes a NAND string having a vertical structure. The NAND string includes a plurality of memory cells, and at least one pair of first selection transistors arranged to be adjacent to a first end of the plurality of memory cells. A plurality of word lines are coupled to the plurality of memory cells of the NAND string. A first selection line is commonly connected to the at least one pair of first selection transistors of the NAND string.

Abstract: A method of message distribution, the method performed in a computer system having one or more processors accessing one or more databases comprising user account records, the one or more databases being stored in at least one storage device accessible by the one or more processors, the method including receiving a first message from a sender of a first client system, retrieving a first user credential of a first social media user account and a second user credential of a second social media user account stored in the one or more databases, packaging the first message and the first user credential into a first message package and the first message and the second user credential into a second message package, transmitting the first message package to a first social media system, the first social media system automatically distributing the first message to predetermined recipients of the first social media user account, and transmitting the second message package to the first social media system, the first socia

Abstract: A track-and-hold circuit includes a bootstrapped clock generator and a track-and-hold unit. The bootstrapped clock generator receives an input voltage signal and generates a sampling control signal having a voltage level lower than or equal to a level of a power supply voltage by maintaining an initial level of a boost capacitor voltage at a level lower than the level of the power supply voltage. The boost capacitor voltage is a voltage that is charged across a boost capacitor included in the bootstrapped clock generator and the sampling control signal is generated based on a clock signal. The track-and-hold unit samples and holds the input voltage signal in response to the sampling control signal to generate a sampled signal.

Abstract: An device for molding plastic preforms into plastic containers comprises at least one blow mold and a plurality of closure members interacting with one another in order to transfer the blow mold between an open state and a closed state. The blow mold forms a cavity, within which the plastic preforms may be expanded into the plastic containers. The closure members comprise at least one first mold part and one second mold part, which are moveable with respect to one another. The closure members further comprise a blow nozzle unit which is moveable with respect to the mold parts, and which closes the blow mold in the closed state in one direction. At least one first drive unit moves the mold parts with respect to one another. A second drive unit moves the blow nozzle unit with respect to the mold parts. At least one drive unit moving at least one of the closure members for transferring the blow mold between the closed state and the open state includes an electric drive unit.

Abstract: Provided are a light-emitting element and a light-emitting device, and methods of fabricating the same. The method of fabricating a light-emitting element includes forming a buffer layer on a substrate and forming photonic crystal patterns and a pad pattern on the buffer layer. Each of the pad pattern and the photonic crystal patterns are made of a metal material, and the pad pattern is physically connected to the photonic crystal patterns. Forming a light-emitting structure includes sequentially stacking a first conductive pattern of a first conductivity type, a light-emitting pattern, and a second conductive pattern of a second conductivity type on the buffer layer. And the method also includes forming a first electrode that is electrically connected to the first conductive pattern and forming a second electrode that is electrically connected to the second conductive pattern.

Abstract: In a method of forming fine patterns, a photocurable coating layer is formed on a substrate. A first surface of a template makes contact with the photocurable coating layer. The first surface of the template includes at least two first patterns having a first dispersion degree of sizes, and at least one portion of the first surface of the template includes a photo attenuation member. A light is irradiated onto the photocurable coating layer through the template to form a cured coating layer including second patterns having a second dispersion degree of sizes. The second patterns are generated from the first patterns and the second dispersion degree is less than the first dispersion degree. The template is separate from the cured coating layer. A size dispersion degree of the patterns used in a nanoimprint lithography process may be adjusted by the light attenuation member, so that the fine patterns may be formed to have an improved size dispersion degree.

Abstract: Provided are a system for compensating response speed and a method of controlling frame data of an image. The system includes: a circuit for compensating response speed; an internal frame memory that comprises N sub frame memories formed in a single chip with the circuit for compensating response speed, wherein N is a natural number; a frame memory controller that comprises N sub frame memory controllers corresponding to each sub frame memory; and a data flow controller that comprises N write first-in-first-out (FIFO) circuits and N read FIFO circuits corresponding to each sub frame memory.

Abstract: A memory system and memory module includes a plurality of memory devices, each having a plurality, e.g. four, ports for transmitting and receiving command signals, write data signals and read data signals. One of the memory devices is connected to a host or controller, and the remaining memories are connected together, typically by point-to-point links. When the memory system configuration is such that at least one of the ports in at least one of the memory devices is not used, one or more other ports can use the pins that may otherwise have been used by the unused ports. As a result, a set of reconfigurable, shared pins is defined in which two ports share the pins. The port that is not being used in a particular application for the memory device is not connected to the shared pins, and another port that is being used in the application is connected to the shared pins. This allows for the used of fewer package pins and, consequently, reduced package size.

Abstract: In a light emitting device and a fabricating method thereof are provide, wherein the light emitting device includes a light converting element, and a light emitting element positioned on the light converting element and including a first electrode, a light emitting structure and a second electrode, the first electrode formed on the light emitting element and having a first opening, the light emitting structure having a first conductive pattern of a first conductivity type, a light emitting pattern, and a second conductive pattern of a second conductivity type, which are sequentially stacked, and the second electrode formed on the second conductive pattern, wherein the light generated from the light emitting structure reaches the light converting element through the first opening.

Abstract: An internal voltage generating method performed in a semiconductor device, the internal voltage generating method including generating a plurality of initialization signals corresponding to a plurality of external power supply voltages; detecting a transition of a lastly-generated initialization signal from among the plurality of initialization signals and generating a detection signal; and generating a first internal voltage according to the detection signal.

Abstract: The present invention is directed to a vertical-type luminous device and high through-put methods of manufacturing the luminous device. These luminous devices can be utilized in a variety of luminous packages, which can be placed in luminous systems. The luminous devices are designed to maximize light emitting efficiency and/or thermal dissipation. Other improvements include an embedded zener diode to protect against harmful reverse bias voltages.

Abstract: A method of processing a substrate using plasma includes loading a substrate into a chamber, processing the substrate with a first plasma mode and then processing the substrate with a second plasma mode, wherein at least one of the first plasma mode and the second plasma mode is a time-modulation mode in which a plasma induced in the chamber is periodically turned on and off to reduce plasma-induced damage in the substrate.