Patents Assigned to ATI Technologies ULC
  • METHOD AND SYSTEM FOR IMPROVED VISIBILITY IN BLENDED LAYERS FOR HIGH DYNAMIC RANGE DISPLAYS
    Publication number: 20230267581
    Abstract: There are many instances where a standard dynamic range (“SDR”) overlay is displayed over high dynamic range (“HDR”) content on HDR displays. Because the overlay is SDR, the maximum brightness of the overlay is much lower than the maximum brightness of the HDR content, which can lead to the SDR elements being obscured if those elements have at least some transparency. The present disclosure provides techniques including modifying the luminance of either or both of the HDR and SDR content when an SDR layer with some transparency is displayed over HDR content. A variety of techniques are provided. In one example, a fixed adjustment is applied to pixels of one or both of the SDR layer and the HDR layer. The fixed adjustment comprises decreasing the luminance of the HDR layer and/or increasing the luminance of the SDR layer. In another example, a variable adjustment is applied.
    Type: Application
    Filed: April 28, 2023
    Publication date: August 24, 2023
    Applicant: ATI Technologies ULC
    Inventors: Jie Zhou, David I.J. Glen
  • Migrating pages of memory accessible by input-output devices
    Patent number: 11726693
    Abstract: An electronic device includes a memory, an input-output memory management unit (IOMMU), a processor that executes a software entity, and a page migration engine. The software entity and the page migration engine perform operations for preparing to migrate a page of memory that is accessible by the at least one IO device in the memory, the software entity and the page migration engine set migration state information in a page table entry for the page of memory based on the operations being performed. When the operations for preparing to migrate the page of memory are completed, the page migration engine migrates the page of memory in the memory. The IOMMU uses the migration state information in the page table entry to control one or more operations of the IOMMU.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: August 15, 2023
    Assignee: ATI Technologies ULC
    Inventors: Philip Ng, Nippon Raval
  • Method and apparatus for providing a picture-in-picture (PIP) overlay window on a single physical monitor
    Patent number: 11721306
    Abstract: Methods and apparatus provide a picture-in-picture (PIP) overlay window on a single physical monitor by displaying a first swap chain of the single physical monitor, reporting to an operating system (OS), a display level request for a fake connection to a non-existent second monitor, and displaying on the single physical monitor a virtual display defined by a second swap chain of the non-existent second monitor, as the PIP overlay window on the displayed content of the first swap chain on the single physical monitor.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: August 8, 2023
    Assignee: ATI TECHNOLOGIES ULC
    Inventors: Nitant Patel, Parimalkumar Patel, Anthony Brown
  • Arbitration Allocating Requests During Backpressure
    Publication number: 20230244623
    Abstract: An arbitration system receives requests to access a destination during an arbitration window that spans multiple processor clock cycles. During each clock cycle, the destination is monitored to determine whether the destination is suffering from backpressure by receiving more requests than the destination is able to accommodate during the clock cycle. In response to detecting backpressure, a masking index value assigned to a requesting source is incremented, which limits an amount of requests from the source that will be granted destination access during a subsequent arbitration window. Alternatively, in response to detecting an absence of backpressure during an arbitration window, the masking index value is decremented, which increases the amount of requests from the source that will be granted destination access during a subsequent arbitration window.
    Type: Application
    Filed: December 8, 2021
    Publication date: August 3, 2023
    Applicant: ATI Technologies ULC
    Inventors: Michael E. McLean, Philip Ng
  • Address translation services buffer
    Patent number: 11714766
    Abstract: An address translation buffer or ATB is provided for emulating or implementing the PCIe (Peripheral Component Interface Express) ATS (Address Translation Services) protocol within a PCIe-compliant device. The ATB operates in place of (or in addition to) an address translation cache (ATC), but is implemented in firmware or hardware without requiring the robust set of resources associated with a permanent hardware cache (e.g., circuitry for cache control and lookup). A component of the device (e.g., a DMA engine) requests translation of an untranslated address, via a host input/output memory management unit for example, and the response (including a translated address) is stored in the ATB for use for a single DMA operation (which may involve multiple transactions across the PCIe bus).
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: August 1, 2023
    Assignee: ATI Technologies ULC
    Inventors: Philip Ng, Vinay Patel
  • Controlling electrical power consumption for elements in an electronic device based on a platform electrical power limit
    Patent number: 11714442
    Abstract: An electronic device includes an accelerated processing unit (APU) and multiple elements. The APU performs operations for a platform boost and throttle (PBT) controller. For the operations, the APU receives a platform electrical power limit, the platform electrical power limit being a limit on a total electrical power allowed to be consumed by a group of the elements at a given time. The APU then determines a present platform electrical power consumption. The APU next adjusts one or more operating parameters for specified elements from among the group of elements to control electrical power consumption by the specified elements based on a relationship between the present platform electrical power consumption and the platform electrical power limit.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: August 1, 2023
    Assignees: ATI Technologies ULC, Advanced Micro Devices Inc.
    Inventors: Meeta Surendramohan Srivastav, Ashwini Chandrashekhara Holla, Alex Sabino Duenas, Xinzhe Li, Michael John Austin, Indrani Paul, Sriram Sambamurthy
  • Pixelation optimized delta color compression
    Patent number: 11715253
    Abstract: A technique for compressing an original image is disclosed. According to the technique, an original image is obtained and a delta-encoded image is generated based on the original image. Next, a segregated image is generated based on the delta-encoded image and then the segregated image is compressed to produce a compressed image. The segregated image is generated because the segregated image may be compressed more efficiently than the original image and the delta image.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: August 1, 2023
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Ruijin Wu, Skyler Jonathon Saleh, Christopher J. Brennan, Kei Ming Kwong, Anthony Hung-Cheong Chan
  • Multi-thread graphics processing system
    Patent number: 11710209
    Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
    Type: Grant
    Filed: May 3, 2022
    Date of Patent: July 25, 2023
    Assignee: ATI Technologies ULC
    Inventors: Laurent Lefebvre, Andrew Gruber, Stephen Morein
  • Multi-die system performance optimization
    Patent number: 11709536
    Abstract: A multi-die semiconductor package includes a first integrated circuit (IC) die having a first intrinsic performance level and a second IC die having a second intrinsic performance level different from the first intrinsic performance level. A power management controller distributes, based on a determined die performance differential between the first IC die and the second IC die, a level of power allocated to the semiconductor chip package between the first IC die and the second IC die. In this manner, the first IC die receives and operates at a first level of power resulting in performance exceeding its intrinsic performance level. The second IC die receives and operates at a second level of power resulting in performance below its intrinsic performance level, thereby reducing performance differentials between the IC dies.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: July 25, 2023
    Assignees: Advanced Micro Devices, Inc., ATI TECHNOLOGIES ULC
    Inventors: Greg Sadowski, Sriram Sundaram, Stephen Kushnir, William C. Brantley, Michael J. Schulte
  • Client-side offload of graphics effects processing
    Patent number: 11711571
    Abstract: A server offloads graphics effects processing to a client device with graphics processing resources by determining a modification to a graphics effects operation, generating a portion of a rendered video stream using the modification to the graphics effects operation, and providing an encoded representation of the portion of the rendered video stream to the client device, along with metadata representing the modification implemented. The client device decodes the encoded representation to recover the portion of the rendered video stream and selectively performs a graphics effects operation on the recovered portion to at least partially revert the resulting graphics effects for the portion to the intended effects without the modification implemented by the server.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: July 25, 2023
    Assignees: Advanced Micro Devices, Inc., ATI TECHNOLOGIES ULC
    Inventors: Ihab Amer, Guennadi Riguer, Thomas Perry, Mehdi Saeedi, Gabor Sines, Yang Liu
  • Platform power manager for rack level power and thermal constraints
    Patent number: 11703930
    Abstract: Platform power management includes boosting performance in a platform power boost mode or restricting performance to keep a power or temperature under a desired threshold in a platform power cap mode. Platform power management exploits the mutually exclusive nature of activities and the associated headroom created in a temperature and/or power budget of a server platform to boost performance of a particular component while also keeping temperature and/or power below a threshold or budget.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: July 18, 2023
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Indrani Paul, Sriram Sambamurthy, Larry David Hewitt, Kevin M. Lepak, Samuel D. Naffziger, Adam Neil Calder Clark, Aaron Joseph Grenat, Steven Frederick Liepe, Sandhya Shyamasundar, Wonje Choi, Dana Glenn Lewis, Leonardo de Paula Rosa Piga
  • Application profiling for power-performance management
    Patent number: 11703931
    Abstract: A processing apparatus is provided which includes memory configured to store hardware parameter settings for each of a plurality of applications. The processing apparatus also includes a processor in communication with the memory configured to store, in the memory, the hardware parameter settings, identify one of the plurality of applications as a currently executing application and control an operation of hardware by tuning a plurality of hardware parameters according to the stored hardware parameter settings for the identified application.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: July 18, 2023
    Assignee: ATI Technologies ULC
    Inventors: Shahriar Pezeshgi, Jun Huang, Mohammad Hamed Mousazadeh, Alexander S. Duenas
  • Still frame detection in video data
    Patent number: 11706415
    Abstract: Still frame detection for single pass video data, including: determining that an average quantization parameter of a frame of video data falls below a quantization parameter threshold; determining whether an amount of skipped macroblocks in the frame meets a skipped macroblock threshold; and responsive to the amount of skipped macroblocks exceeding the skipped macroblock threshold, identifying the frame as a still frame.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: July 18, 2023
    Assignees: ADVANCED MICRO DEVICES, INC., ATI TECHNOLOGIES ULC
    Inventors: Mehdi Semsarzadeh, Jiao Wang, Yao Wen Yu, Edward Harold, Richard E. George
  • Performing asynchronous memory clock changes on multi-display systems
    Patent number: 11699408
    Abstract: Systems, apparatuses, and methods for performing asynchronous memory clock changes on multiple displays are disclosed. From time to time, a memory clock frequency change is desired for a memory subsystem storing frame buffer(s) used to drive pixels to multiple displays. For example, when the real-time memory bandwidth demand differs from the memory bandwidth available with the existing memory clock frequency, a control unit tracks the vertical blanking interval (VBI) timing of a first display. Also, the control unit causes a second display to enter into panel self-refresh (PSR) mode. Once the PSR mode of the second display overlaps with a VBI of the first display, a memory clock frequency change, including memory training, is initiated. After the memory clock frequency change, the displays are driven by the frame buffer(s) in the memory subsystem at an updated frequency.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: July 11, 2023
    Assignee: ATI Technologies ULC
    Inventors: Arshad Rahman, Rajeevan Panchacharamoorthy, Boris Ivanovic
  • Method, system, and apparatus for supporting multiple address spaces to facilitate data movement
    Patent number: 11698860
    Abstract: Methods, systems, and apparatuses provide support for multiple address spaces in order to facilitate data movement. One apparatus includes an input/output memory management unit (IOMMU) comprising: a plurality of memory-mapped input/output (MMIO) registers that map memory address spaces belonging to the IOMMU and at least a second IOMMU; and hardware control logic operative to: synchronize the plurality of MMIO registers of the at least the second IOMMU; receive, from a peripheral component endpoint coupled to the IOMMU, a direct memory access (DMA) request, the DMA request to a memory address space belonging to the at least the second IOMMU; access the plurality of MMIO registers of the IOMMU based on context data of the DMA request; and access, from the IOMMU, a function assigned to the memory address space belonging to the at least the second IOMMU based on the accessed plurality of MMIO registers.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: July 11, 2023
    Assignee: ATI TECHNOLOGIES ULC
    Inventors: Nippon Raval, Philip Ng, Rostislav S. Dobrin
  • Compressing texture data on a per-channel basis
    Patent number: 11694367
    Abstract: Sampling circuitry independently accesses channels of texture data that represent a set of pixels. One or more processing units separately compress the channels of the texture data and store compressed data representative of the channels of the texture data for the set of pixels. The channels can include a red channel, a blue channel, and a green channel that represent color values of the set of pixels and an alpha channel that represents degrees of transparency of the set of pixels. Storing the compressed data can include writing the compress data to portions of a cache. The processing units can identify a subset of the set of pixels that share a value of a first channel of the plurality of channels and represent the value of the first channel over the subset of the set of pixels using information representing the value, the first channel, and boundaries of the subset.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: July 4, 2023
    Assignees: Advanced Micro Devices, Inc., ATI TECHNOLOGIES ULC
    Inventors: Saurabh Sharma, Laurent Lefebvre, Sagar Shankar Bhandare, Ruijin Wu
  • Alternative protocol over physical layer
    Patent number: 11693813
    Abstract: A link controller includes a Peripheral Component Interconnect Express (PCIe) physical layer circuit for coupling to a communication link and providing a data path over the communication link, a first data link layer controller which operates according to a PCIe protocol, and a second data link layer controller which operates according to a Gen-Z protocol. A multiplexer-demultiplexer selectively connects both data link layer controllers to the PCIe physical layer circuit. A protocol translation circuit is coupled between the multiplexer-demultiplexer and the second data link layer controller, the protocol translation circuit receiving traffic data from the second data link layer controller in a Gen-Z format, encapsulating the Gen-Z format in a PCIe format, and passing traffic data to the multiplexer-demultiplexer circuit.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: July 4, 2023
    Assignees: ATI Technologies ULC, Advanced Micro Devices, Inc.
    Inventors: Gordon Caruk, Maurice B. Steinman, Gerald R. Talbot, Joseph D. Macri
  • CONTROL FLOW INVARIANT RESOURCE IDENTIFICATION
    Publication number: 20230205584
    Abstract: A disclosed technique includes allocating a first set of resource slots for a first execution instance of a pipeline shader program; correlating the first set of resource slots with graphics pipeline passes; and on a second execution instance of the pipeline shader program, assigning resource slots, from the first set of resource slots, to the graphics pipeline passes, based on the correlating.
    Type: Application
    Filed: December 28, 2021
    Publication date: June 29, 2023
    Applicants: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Zhuo Chen, Steven J. Tovey
  • IDENTIFYING LONG TERM REFERENCE FRAME USING SCENE DETECTION AND PERCEPTUAL HASHING
    Publication number: 20230209064
    Abstract: Methods and devices are provided for encoding a video stream which comprise encoding a plurality of frames of video acquired from different points of view, generating statistical values for the frames of video determined from values of pixels of the frames, generating, for each of the plurality of frames, a perceptual hash value based on statistical values of the frame and encoding a current frame comprising video acquired from a corresponding one of the different points of view using a previously encoded reference frame based on a similarity of perceptual hashes of the current frame and the previously encoded reference frame.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 29, 2023
    Applicant: ATI Technologies ULC
    Inventors: Sunil Gopal Koteyar, Sonu Thomas, Ihab M. A. Amer, Haibo Liu
  • Resynchronization of a display system and GPU after panel self refresh
    Patent number: 11688031
    Abstract: A display system receives first timing information prior to the display system entering a panel self-refresh (PSR) mode. The display system supports a range of refresh rates. Prior to the display system entering the PSR mode, first timing information indicating a first refresh rate that is lower than a maximum refresh rate supported by the display system is received by the display system. The display system then refreshes images at a second refresh rate that is less than or equal to the first refresh rate using a frame stored in a buffer prior to entering the PSR mode. In some cases, the processing unit also receives second timing information from the display system in response to initiating an exit from a panel self-refresh (PSR) mode. The second timing information indicates a current scanout line that is used to schedule transmission of a subsequent frame.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: June 27, 2023
    Assignee: ATI TECHNOLOGIES ULC
    Inventors: Anthony W L Koo, Syed Athar Hussain, David I. J. Glen