Patents Assigned to ATI Technologies ULC
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Patent number: 11551398Abstract: Systems, apparatuses, and methods for implementing light volume rendering techniques are disclosed. A processor is coupled to a memory. A processor renders the geometry of a scene into a geometry buffer. For a given light source in the scene, the processor initiates two shader pipeline passes to determine which pixels in the geometry buffer to light. On the first pass, the processor renders a front-side of a light volume corresponding to the light source. Any pixels of the geometry buffer which are in front of the front-side of the light volume are marked as pixels to be discarded. Then, during the second pass, only those pixels which were not marked to be discarded are sent to the pixel shader. This approach helps to reduce the overhead involved in applying a lighting effect to the scene by reducing the amount of work performed by the pixel shader.Type: GrantFiled: August 31, 2020Date of Patent: January 10, 2023Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Mika Tuomi, Miikka Petteri Kangasluoma, Jan Henrik Achrenius, Laurent Lefebvre
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Patent number: 11552892Abstract: An endpoint processing device is provided for dynamically controlling latency tolerance reporting (LTR) values. The endpoint processing device comprises memory configured to store data and a processor. The processor is configured to execute a program and send, to a root point processing device via a peripheral component interconnect express (PCIe) link, a plurality of messages each comprising a memory access request and a LTR value indicating an amount of time to service the memory access request. The processor is also configured to, for each of the plurality of messages, determine, during execution of the program, a LTR value setting and set the LTR value as the determined LTR value setting.Type: GrantFiled: August 30, 2019Date of Patent: January 10, 2023Assignee: ATI Technologies ULCInventor: Alexander S. Duenas
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Patent number: 11543877Abstract: An apparatus includes a processor, a sleep state duration prediction module, and a system management unit. The sleep state duration prediction module is configured to predict a sleep state duration for component of the processing device. The system management unit is to transition the component into a sleep state selected from a plurality of sleep states based on a comparison of the predicted sleep state duration to at least one duration threshold. Each sleep state of the plurality of sleep states is a lower power state than a previous sleep state of the plurality of sleep states.Type: GrantFiled: March 31, 2021Date of Patent: January 3, 2023Assignees: Advanced Micro Devices, Inc., ATI TECHNOLOGIES ULCInventors: Karthik Rao, Indrani Paul, Donny Yi, Oleksandr Khodorkovsky, Leonardo De Paula Rosa Piga, Wonje Choi, Dana G. Lewis, Sriram Sambamurthy
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Publication number: 20220415285Abstract: A disclosed technique includes prefetching display data into a cache memory, wherein the display data includes data to be displayed on a display during a memory black-out period for a memory; triggering the memory black-out period; and during the black-out period, reading from the cache memory to obtain data to be displayed on the display.Type: ApplicationFiled: June 29, 2021Publication date: December 29, 2022Applicant: ATI Technologies ULCInventors: Tony Chang-Yi Cheng, Oswin Hall
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Publication number: 20220416750Abstract: A power delivery network, circuit, and method reduce die package resonance of an integrated circuit (IC) die. Decoupling capacitors interact with equivalent series inductances (ESLs) of power conductors within a package carrier substrate create the die package resonance characteristic. In one form an anti-resonance tuning circuit has a first branch including a first inductance coupled to one of an IC die positive power supply conductor and an IC die negative power supply conductor, and a second branch coupled directly to a selected one of a carrier substrate positive or negative conductive structures, the second branch comprising a second inductance inductively coupled to the first inductance.Type: ApplicationFiled: June 24, 2021Publication date: December 29, 2022Applicant: ATI Technologies ULCInventor: Fei Guo
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Publication number: 20220417466Abstract: A method and apparatus for adjusting a display includes receiving a video stream. The video stream is analyzed for one or more environmental conditions. Based upon the analysis, a portion of the display is adjusted.Type: ApplicationFiled: June 28, 2021Publication date: December 29, 2022Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Vickie Youmin Wu, Wilson Hung Yu, Hakki Can Karaimer, Hong Tao Yan
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Patent number: 11533204Abstract: A receiver circuit includes an analog front end and a non-linear equalizer. The analog front end including a super source follower (SSF) amplifier having a first input terminal adapted to couple to a transmission line to receive an input signal referenced to a first voltage level, a second input adapted to receive a reference voltage, and first and second output terminals adapted to provide an amplified signal referenced to a second voltage level. The non-linear equalizer coupled to receive an output signal of the analog front end and compensate for inter-symbol interference at a data rate of at least 14 Gbps. The SSF amplifier includes transistors having relative sizes selected to provide a frequency response of the SSF amplifier with a peak at a frequency approximately ? of the data rate.Type: GrantFiled: December 14, 2020Date of Patent: December 20, 2022Assignee: ATI Technologies ULCInventor: Saman Asgaran
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Patent number: 11521293Abstract: Methods are provided for creating objects in a way that permits an API client to explicitly participate in memory management for an object created using the API. Methods for managing data object memory include requesting memory requirements for an object using an API and expressly allocating a memory location for the object based on the memory requirements. Methods are also provided for cloning objects such that a state of the object remains unchanged from the original object to the cloned object or can be explicitly specified.Type: GrantFiled: July 30, 2020Date of Patent: December 6, 2022Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Guennadi Riguer, Brian K. Bennett
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Patent number: 11514194Abstract: Devices, methods, and systems for secure communications on a computing device. A host operating system (OS) runs on a host processor in communication with a host memory. A secure OS runs on a coprocessor in communication with a secure memory. The coprocessor receives information from an external device over a secure peer-to-peer (P2P) connection. The secure P2P connection is managed by the secure OS and is not accessible by the host OS.Type: GrantFiled: December 19, 2019Date of Patent: November 29, 2022Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Guhan Krishnan, Carl K. Wakeland, Saikishore Reddipalli, Philip Ng
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Patent number: 11507158Abstract: Electrical design current throttling, including: applying an electrical design current (EDC) threshold for each control processing unit component of a plurality of the central processing unit components responsive to the corresponding priority of each central processing unit component, the priority of a central processing unit component responsive to a central processing unit component's current usage data.Type: GrantFiled: May 12, 2020Date of Patent: November 22, 2022Assignees: ADVANCED MICRO DEVICES, INC., ATI TECHNOLOGIES ULCInventors: Xiuting Kaleen Cheng Man, Erik Swanson, Larry D. Hewitt, Adam N. C. Clark
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Patent number: 11503310Abstract: A device includes an encoder, decoder, codec or combination thereof and inline hardware conversion units that are operative to convert stored image data into one of: an HDR/WCG format and an SDR/SCG format during the conversion process. Each of the inline hardware conversion units is operative to perform the conversion process independent of another read operation with the memory that stores the image data to be converted. In one example, an encoding unit is operative to perform a write operation with a memory to store the converted image data after completing the conversion process. In another example, a decoding unit is operative to perform a read operation with the memory to retrieve the image data from the memory before initiating the conversion process. In another example, an encoder/decoder unit is operative to perform at least one of: the read operation and the write operation.Type: GrantFiled: October 31, 2018Date of Patent: November 15, 2022Assignees: ATI TECHNOLOGIES ULC, ADVANCED MICRO DEVICES, INC.Inventors: Lei Zhang, David Glen, Kim A. Meinerth
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Patent number: 11494211Abstract: An electronic device includes a processor that executes a guest operating system and a hypervisor, an input-output (IO) device, and an input-output memory management unit (IOMMU). The IOMMU handles communications between the IOMMU and the guest operating system by: replacing, in communications received from the guest operating system, guest domain identifiers (domainIDs) with corresponding host domainIDs and/or guest device identifiers (deviceIDs) with corresponding host deviceIDs before further processing the communications; replacing, in communications received from the IO device, host deviceIDs with guest deviceIDs before providing the communications to the guest operating system; and placing, into communications generated in the IOMMU and destined for the guest operating system, guest domainIDs and/or guest deviceIDs before providing the communications to the guest operating system. The IOMMU handles the communications without intervention by the hypervisor.Type: GrantFiled: April 22, 2019Date of Patent: November 8, 2022Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Maggie Chan, Philip Ng, Paul Blinzer
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Patent number: 11488328Abstract: Systems, apparatuses, and methods for implementing automatic data format detection techniques are disclosed. A graphics engine receives data of indeterminate format and the graphics engine predicts an organization of the data. As part of the prediction, the graphics engine predicts the pixel depth (i.e., bytes per pixel (BPP)) and format separately. The graphics engine folds the data along pixel and channel boundaries to help in determining the pixel depth and format. The graphics engine scores modes against each other to generate different predictions for different formats. Then, the graphics engine generates scores for the predictions to determine which mode has a highest correlation with the input data. Next, the graphics engine chooses the format which attains the best score among the scores that were generated for the different modes. Then, the graphics engine compresses the unknown data using the chosen format with the best score.Type: GrantFiled: October 30, 2020Date of Patent: November 1, 2022Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Anthony Chan, Nooruddin Ahmed, Christopher J. Brennan, Bernard T. K. Chan
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Patent number: 11490090Abstract: Methods and devices are provided for encoding video. By using co-sited gradient and variance values to detect text and line in frames of the video. A processor is configured to receive a plurality of frames of video, determine, for a portion of a frame, a variance of the portion of the frame and a gradient of the portion of the frame and encode, using one of a plurality of different encoding qualities, the portion of the frame based on the gradient and the variance of the portion of the frame. Encoding is performed at both the sub-frame level and frame level. The portion of the frame is classified into one of a plurality of categories based on the gradient and variance and encoded based on the category.Type: GrantFiled: December 30, 2020Date of Patent: November 1, 2022Assignee: ATI Technologies ULCInventors: Mehdi Saeedi, Sai Harshita Tupili, Yang Liu, Mingkai Shao, Gabor Sines
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Patent number: 11488349Abstract: In some examples, an apparatus obtains source layer pixels, such as those of a content image and first destination layer pixels, such as those of a destination image. The first destination layer pixels have associated alpha values. The apparatus obtains information that indicates a first blending color format for the alpha values. The first blending color format is different from a first destination layer color format for the first destination layer pixels and an output color format for a display. The apparatus converts the source and/or first destination layer pixels to the first blending color format. The apparatus generates first alpha blended pixels based on alpha blending the source layer pixels with the first destination layer pixels using the associated alpha values. The apparatus provides, for display on the display, the first alpha blended pixels.Type: GrantFiled: June 28, 2019Date of Patent: November 1, 2022Assignee: ATI TECHNOLOGIES ULCInventors: David I.J. Glen, Keith Lee
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Patent number: 11490127Abstract: Methods and apparatus provide cloud-based video encoding that generates encoded video data by one or more encoders in a cloud platform for a plurality of cloud encoding sessions. The methods and apparatus generate operational improvement tradeoff data in response to operational encoding metrics associated with the one or more encoders and change operational characteristics of the one or more encoders for at least one of the cloud encoding sessions based on the operational improvement tradeoff data.Type: GrantFiled: December 31, 2020Date of Patent: November 1, 2022Assignee: ATI TECHNOLOGIES ULCInventors: Wei Gao, Ihab Amer, Feng Pan, Mingkai Shao, Crystal Sau, Dong Liu, Gabor Sines, Yang Liu
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Patent number: 11481256Abstract: Techniques for scheduling operations for a task graph on a processing device are provided. The techniques include receiving a task graph that specifies one or more passes, one or more resources, and one or more directed edges between passes and resources; identifying independent passes and dependent passes of the task graph; based on performance criteria of the processing device, scheduling commands to execute the passes; and transmitting scheduled commands to the processing device for execution as scheduled.Type: GrantFiled: May 29, 2020Date of Patent: October 25, 2022Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Steven J. Tovey, Zhou Chen, David Ronald Oldcorn
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Patent number: 11475653Abstract: The present disclosure is directed to techniques for determining a perceptual importance map. The perceptual importance map indicates the relative importance to the human visual system of different portions of an image. The techniques include obtaining cost values for the blocks of an image, where cost values are values used in determining motion vectors. For each block, a confidence value is derived from the cost values. The confidence value indicates the confidence with which the motion vector is believed to be correct. A perceptual importance value is determined based on the confidence value via one or more modifications to the confidence value to better reflect importance to the human visual system. The generated perceptual importance values can be used for various purposes such as allocating bits for encoding, identifying regions of interest, or selectively rendering portions of an image with greater or lesser detail based on relative perceptual importance.Type: GrantFiled: April 27, 2018Date of Patent: October 18, 2022Assignee: ATI Technologies ULCInventor: Boris Ivanovic
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Patent number: 11474354Abstract: Various virtual reality computing systems and methods are disclosed. In one aspect, a method of delivering video frame data to multiple VR displays is provided. The method includes generating content for multiple VR displays and sensing for competing needs for resources with real time requirements of the multiple VR displays. If competing needs for resources with real time requirements are sensed, a selected refresh offset for refreshes of the multiple VR displays is determined to avoid conflict between the competing needs for resources of the multiple VR displays. The selected refresh offset is imposed and the content is delivered to the multiple VR displays.Type: GrantFiled: April 25, 2017Date of Patent: October 18, 2022Assignee: ATI TECHNOLOGIES ULCInventor: Guennadi Riguer
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Patent number: 11474591Abstract: Systems, apparatuses, and methods for implementing fine-grain power management for virtual reality (VR) systems are disclosed. A VR compositor monitors workload tasks while rendering and displaying content of a VR application. The VR compositor determines the priorities of different tasks of a given VR frame and cause power states to be assigned to processing units to match the priorities of the tasks being performed. For example, if a first task within a first frame period is assigned a high priority, a processing unit executing the task operates at a relatively high power performance state when performing the first task. If a second task within the first frame period is assigned a low priority, the processing unit operates at a relatively low power performance state when performing the second task. By implementing fine-grain power management in a VR environment, the likelihood of the processing unit suffering a thermal event or impaired performance is reduced.Type: GrantFiled: August 5, 2016Date of Patent: October 18, 2022Assignee: ATI Technologies ULCInventor: Guennadi Riguer