Abstract: A processing chamber such as a plasma etch chamber can perform deposition and etch operations, where byproducts of the deposition and etch operations can build up in a vacuum pump system fluidly coupled to the processing chamber. A vacuum pump system may have multiple roughing pumps so that etch gases can be diverted a roughing pump and deposition precursors can be diverted to another roughing pump. A divert line may route unused deposition precursors through a separate roughing pump. Deposition byproducts can be prevented from forming by incorporating one or more gas ejectors or venturi pumps at an outlet of a primary pump in a vacuum pump system. Cleaning operations, such as waferless automated cleaning operations, using certain clean chemistries may remove deposition byproducts before or after etch operations.

Abstract: An assembly for use in a process chamber for depositing a film on a wafer. The assembly includes a pedestal having a pedestal top surface extending from a central axis of the pedestal to an outer edge, the pedestal top surface having a plurality of wafer supports for supporting a wafer. A pedestal step having a step surface extending from a step inner diameter towards the outer edge of the pedestal. A focus ring rests on the step surface and having a mesa extending from an outer diameter of the focus ring to a mesa inner diameter. A shelf steps downwards from a mesa surface at the mesa inner diameter, and extends between the mesa inner diameter and an inner diameter of the focus ring. The shelf is configured to support at least a portion of a wafer bottom surface of the wafer at a process temperature.

Abstract: Computer-implemented methods of optimizing a process simulation model that predicts a result of a semiconductor device fabrication operation to process parameter values characterizing the semiconductor device fabrication operation are disclosed. The methods involve generating cost values using a computationally predicted result of the semiconductor device fabrication operation and a metrology result produced, at least in part, by performing the semiconductor device fabrication operation in a reaction chamber operating under a set of fixed process parameter values. The determination of the parameters of the process simulation model may employ pre-process profiles, via optimization of the resultant post-process profiles of the parameters against profile metrology results. Cost values for, e.g., optical scatterometry, scanning electron microscopy and transmission electron microscopy may be used to guide optimization.

Abstract: A rotational indexer rotatable to move semiconductor wafers or other items between various stations arranged in a circular array. The items being moved may be supported by arms of the indexer during such movement. The rotational indexer may be further configured to also cause the items being moved to rotate about other rotational axes to cause rotation of the items relative to the arms supporting them.

Abstract: In one example, an electroplating system comprises a first bath reservoir, a second bath reservoir, a clamp, a first anode in the first bath reservoir, a second anode in the second bath reservoir, and a direct current power supply. The first bath reservoir contains a first electrolyte solution that includes an alkaline copper-complexed solution. The second bath reservoir contains a second electrolyte solution that includes an acidic copper plating solution. The direct current power supply generates a first direct current between the clamp and the first anode to electroplate a first copper layer on the cobalt layer of the wafer submerged in the first electrolyte solution. The direct current power supply then generates a second direct current between the clamp and the second anode to electroplate a second copper layer on the first copper layer of the wafer submerged in the second electrolyte solution.

Abstract: A chamber is provided. The chamber includes a Faraday shield positioned above a substrate support of the chamber. A dielectric window is disposed over the Faraday shield, and the dielectric window has a center opening. A hub having an internal plenum for passing a flow of fluid received from an input conduit and removing the flow of fluid from an output conduit is further provided. The hub has sidewalls and a center cavity inside of the sidewalls for an optical probe, and the internal plenum is disposed in the sidewalls. The hub has an interface surface that is in physical contact with a back side of the Faraday shield. The physical contact provides for a thermal couple to the Faraday shield at a center region around said center opening, and an outer surface of the sidewalls of the hub are disposed within the center opening of the dielectric window.

Abstract: A substrate processing system for selectively etching a substrate includes a first chamber and a second chamber. A first gas delivery system supplies an inert gas species to the first chamber. A plasma generating system generates plasma including ions and metastable species in the first chamber. A gas distribution device removes the ions from the plasma, blocks ultraviolet (UV) light generated by the plasma and delivers the metastable species to the second chamber. A substrate support is arranged below the gas distribution device to support the substrate. A second gas delivery system delivers a reactive gas species to one of the gas distribution device or a volume located below the gas distribution device. The metastable species transfer energy to the reactive gas species to selectively etch one exposed material of the substrate more than at least one other exposed material of the substrate.

Abstract: In one embodiment, the disclosed apparatus is a heat-pipe cooling system that includes a conical structure having an upper portion that is truncated. The conical structure is configured to be formed above a dielectric window with the conical structure being configured to condense vapor from a heat-transfer fluid placed or formed within a volume formed between the dielectric window and the conical structure. At least one cooling coil is formed on an exterior portion of the conical structure. Other apparatuses and systems are disclosed.

Abstract: A chamber for use in implementing a deposition process includes a pedestal for supporting a semiconductor wafer. A silicon ring is disposed over the pedestal and surrounds the semiconductor wafer. The silicon ring has a ring thickness that approximates a semiconductor wafer thickness. The silicon ring has an annular width that extends a process zone defined over the semiconductor wafer to an extended process zone that is defined over the semiconductor wafer and the silicon ring. A confinement ring defined from a dielectric material is disposed over the pedestal and surrounds the silicon ring. A showerhead having a central showerhead area and an extended showerhead area is also included. The central showerhead area is substantially disposed over the semiconductor wafer and the silicon ring. The extended showerhead area is substantially disposed over the confinement ring.

Abstract: Embodiments for processing a substrate in a pulsed plasma chamber are provided. A processing apparatus with two chambers, separated by a plate fluidly connecting the chambers, includes a continuous wave (CW) controller, a pulse controller, and a system controller. The CW controller sets the voltage and the frequency for a first radio frequency (RF) power source coupled to a top electrode. The pulse controller is operable to set voltage, frequency, ON-period duration, and OFF-period duration for a pulsed RF signal generated by a second RF power source coupled to the bottom electrode. The system controller is operable to regulate the flow of species between the chambers to assist in the negative-ion etching, to neutralize excessive positive charge on the wafer surface during afterglow in the OFF-period, and to assist in the re-striking of the bottom plasma during the ON-period.

Abstract: Methods for depositing ultrathin films by atomic layer deposition with reduced wafer-to-wafer variation are provided. Methods involve exposing the substrate to soak gases including one or more gases used during a plasma exposure operation of an atomic layer deposition cycle prior to the first atomic layer deposition cycle to heat the substrate to the deposition temperature.

Abstract: Various embodiments herein relate to methods, apparatus, and systems for etching a feature in a substrate. Typically the feature is etched in a dielectric-containing stack. The etching process involves cyclically etching the feature and depositing a protective film on sidewalls of the partially etched feature. These stages are repeated until the feature reaches its final depth. The protective film may have a particular composition, for example including at least one of a tungsten carbonitride, a tungsten sulfide, tin, a tin-containing compound, molybdenum, a molybdenum-containing compound, a ruthenium carbonitride, a ruthenium sulfide, an aluminum carbonitride, an aluminum sulfide, zirconium, and a zirconium-containing compound. A number of optional steps may be taken including, for example, doping the mask layer, pre-treating the substrate prior to deposition, removing the protective film from the sidewalls, and oxidizing any remaining protective film.

Abstract: A carrier plate for receiving a wafer includes a pocket defined in a middle section on a top surface of the carrier plate and has a surface diameter. The pocket defines a substrate support region. A retaining feature of the carrier plate is defined at an outer edge of the pocket. A tapered portion of the carrier plate extends from the retaining feature to an outer diameter. The tapered portion is configured to receive a focus ring. A bottom surface of the carrier plate is configured to sit over a pedestal that is used in a process chamber. A plurality of wafer supports is disposed on a top surface of the substrate support region to support the wafer, when received.

Abstract: A fluid delivery system includes N first valves. Inlets of the N first valves are fluidly connected to N gas sources, respectively, where N is an integer greater than zero. N mass flow controllers include a microelectromechanical (MEMS) Coriolis flow sensor having an inlet in fluid communication with an outlet of a corresponding one of the N first valves. A second valve has an inlet in fluid communication with an outlet of the MEMS Coriolis flow sensor and an outlet supplying fluid to treat a substrate arranged in a processing chamber. A controller in communication with the MEMS Coriolis flow sensor is configured to determine at least one of a mass flow rate and a density of fluid flowing through the MEMS Coriolis flow sensor.

Abstract: A gas delivery system includes a 2-port valve including a first valve located between a first port and a second port. A 4-port valve includes a first node connected to a first port and a second port. A bypass path is located between the third port and the fourth port. A second node is located along the bypass path. A second valve is located between the first node and the second node. A manifold block defines gas flow channels configured to connect the first port of the 4-port valve to a first inlet, configured to connect the second port of the 4-port valve to the first port of the 2-port valve, the third port of the 4-port valve to a second inlet, the second port of the 2-port valve to a first outlet, and the fourth port of the 4-port valve to a second outlet.

Abstract: An electrostatic chuck for a substrate processing system is provided and includes a baseplate, an intermediate layer disposed on the baseplate, and a top plate. The top plate is bonded to the baseplate via the intermediate layer and is configured to electrostatically clamp to a substrate. The top plate includes a monopolar clamping electrode and seals. The monopolar clamping electrode includes a groove opening pattern with coolant gas groove opening sets. The seals separate coolant gas zones. The coolant gas zones include four or more coolant gas zones. Each of the coolant gas zones includes distinct coolant gas groove sets. The top plate includes the distinct coolant gas groove sets. Each of the distinct coolant gas groove sets has one or more coolant gas supply holes and corresponds to a respective one of the coolant gas groove opening sets.

Abstract: An apparatus for electroplating a semiconductor wafer includes an insert member configured to circumscribe a processing region. The insert member has a top surface. A portion of the top surface of the insert member has an upward slope that slopes upward from a peripheral area of the top surface of the insert member toward the processing region. The apparatus also includes a seal member having an annular-disk shape. The seal member is positioned on the top surface of the insert member. The seal member is flexible such that an outer radial portion of the seal member conforms to the upward slope of the top surface of the insert member and such that an inner radial portion of the seal member projects inward toward the processing region.

Abstract: The invention relates to a device for pulsed laser deposition and a substrate with a substrate surface, which device includes: a substrate holder for holding the substrate; a target arranged facing the substrate surface of the substrate; a velocity filter arranged between the substrate and the target; a pulsed laser directed onto the target at a target spot for generating a plasma plume of target material; and a plasma hole plate arranged between the target and the substrate. The plasma hole plate has a plasma passage opening divided in an upstream section and a downstream section by a dividing plane. The target spot coincides with the dividing plane, and the surface area of the upstream section is larger than the surface area of the downstream section.

Abstract: A method for forming features over a wafer with a carbon based deposition is provided. The carbon based deposition is pretuned, wherein the pretuning causes a non-uniform removal of some of the carbon based deposition. An oxide deposition is deposited through an atomic layer deposition process, wherein the depositing the oxide deposition causes a non-uniform removal of some of the carbon based deposition. At least one additional process is provided, wherein the at least one additional process completes formation of features over the wafer, wherein the features are more uniform than features that would be formed without pretuning.