Abstract: A wafer support structure in a chamber of a semiconductor manufacturing apparatus is provided. The wafer support structure includes a dielectric block having a bottom surface and a top surface supports a wafer when present. The wafer support structure includes a baseplate for supporting the dielectric block. The wafer support structure includes a first electrode embedded in an upper part of the dielectric block. The first electrode is proximate and below the top surface of the dielectric block. A top surface of the first electrode is substantially parallel to the top surface of the dielectric block. The first electrode is configured for connection to a direct current (DC) power source. The wafer support structure includes a second electrode embedded in the dielectric block. The wafer support structure includes a second electrode disposed below the first electrode and a separation distance is defined between the first electrode and the second electrode within the dielectric block.

Abstract: A method for forming a stair-step structure in a stack on a substrate is provided. The method comprises at least one stair step cycle. Each stair step cycle comprises trimming the mask and etching the stack. Etching the stack is provided in a plurality of cycles wherein each cycle comprises etching a SiO2 layer and etching a SiN layer. Etching a SiO2 layer comprises flowing a SiO2 etching gas into the plasma processing chamber, wherein the SiO2 etching gas comprises a hydrofluorocarbon, an inert bombardment gas, and at least one of SF6 and NF3, generating a plasma from the SiO2 etching gas, providing a bias, and stopping the SiO2 layer etch. The etching a SiN layer comprises flowing a SiN etching gas into the plasma processing chamber, comprising a hydrofluorocarbon and oxygen, generating a plasma from the SiN etching gas, providing a bias, and stopping the SiN layer etch.

Abstract: Methods for depositing films by atomic layer deposition using aminosilanes are provided.

Abstract: Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiO2 and SiN can be selectively etched using a plasma formed in an Hz-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiO2 is deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO2, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% Hz. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100° C.

Abstract: Disclosed are apparatuses and methods for performing atomic layer etching. A method may include modifying one or more surface layers of material on the substrate and exposing the one or more modified surface layers on the substrate to an electron source thereby removing, without using a plasma, the one or more modified surface layers on the substrate. An apparatus may include a processing chamber, a process gas unit, an electron source, and a controller with instructions configured to cause the process gas unit to flow a first process gas to a substrate in a chamber interior, the first process gas is configured to modify one or more layers of material on the substrate, and to cause the electron source to generate electrons and expose the one or more modified surface layers on the substrate to the electrons, the one or more modified surface layers being removed, without using a plasma.

Abstract: In various examples, the disclosed subject matter includes a substrate pedestal that includes a platen formed from a ceramic material and having an upper surface to support a substrate during processing. A stem, formed from a ceramic material, has an upper-stem flange upon which the platen is mechanically coupled. The stem has an interior portion. A backside gas-delivery tube, formed from a ceramic material, is located in the interior portion of the stem. The backside gas-delivery tube includes an upper gas-tube flange that is located between a lower surface of the platen and an upper surface of the upper-stem flange. The backside gas-delivery tube is in fluid communication with at least one backside-gas passage of the platen and is arranged to supply a backside gas to a region below a lower surface of the substrate during processing. Other examples of apparatuses and methods of making and using the apparatuses are included.

Abstract: The invention relates to a filter for filtering particles from a plasma plume. The filter includes a housing with two pass-through openings arranged in the housing wall and forming a pass-through channel for passing at least part of the plasma plume through the housing, which pass-through channel extends from one side of the housing to an opposite side of the housing, at least one primary blade arranged at a distance from and rotatable around a rotation axis, which rotation axis is parallel and spaced apart from the center line of the pass-through channel, with the path of the at least one primary blade intersecting with the pass-through channel and with the at least one primary blade having a contact surface for contact with the plasma plume, which contact surface is facing in the direction of the rotation direction, and a drain channel connecting to a drain opening arranged in the housing wall.

Abstract: Computer implemented methods and computer program products have instructions for generating transfer functions that relate segments on lithography photomasks to features produced by photolithography and etching using such segments. Such methods may be characterized by the following elements: (a) receiving after development inspection metrology results produced from one or more first test substrates on which resist was applied and patterned using a set of design layout segments; (b) receiving after etch inspection metrology results produced from one or more second test substrates which were etched after resist was applied and patterned using said set of design layout segments; and (c) generating the transfer function using the set of design layout segments together with corresponding after development inspection metrology results and corresponding after etch inspection metrology results.

Abstract: A system includes an electrode. The electrode includes a showerhead having a first stem portion and a head portion. A plurality of dielectric layers is vertically stacked between the electrode and a first surface of a conducting structure. The plurality of dielectric layers includes M dielectric layers arranged adjacent to the head portion and P dielectric portions arranged around the first stem portion. The plurality of dielectric layers defines a first gap between the electrode and one of the plurality of dielectric layers, a second gap between adjacent ones of the plurality of dielectric layers, and a third gap between a last one of the plurality of dielectric layers and the first surface. A number of the plurality of dielectric layers and sizes of the first gap, the second gap, and the third gap are selected to prevent parasitic plasma between the first surface and the electrode.

Abstract: Various embodiments include apparatuses, systems, and methods for using a remote-plasma cleaning system with a directional-flow device for concurrently cleaning multiple processing stations in a processing tool used in the semiconductor and allied fields. In one example, an apparatus used to perform a remote-plasma clean (RPC) in a multi-station process chamber is disclosed and includes an RPC directional-flow device that is to be coupled between an RPC reactor and the process chamber. The RPC directional-flow device includes a number of ramped gas-diversion areas to direct at least a radical species generated by the RPC reactor to a separate one of the processing stations. An incoming cleaning-gas diversion hub is to receive the radical species and distribute at least the species substantially-uniformly to each of the of the ramped gas-diversion areas. Other apparatuses, systems, and methods are disclosed.

Abstract: A determination is made of a real-time azimuthal position of a notch alignment feature located on a support surface of a substrate holder relative to a fixed reference ray extending perpendicularly away from a rotational axis of the substrate holder as the substrate holder rotates about the rotational axis. A determination is made of an approach initiation azimuthal position of the notch alignment feature relative to the fixed reference ray at which vertical movement of the substrate holder should initiate in order to have the notch alignment feature located at a prescribed azimuthal position relative to the fixed reference ray when the substrate holder reaches a prescribed vertical position. A determination is made of a time delay required to have the notch alignment feature located at the approach initiation azimuthal position. Vertical movement of the substrate holder is initiated in accordance with the determined time delay.

Abstract: In one implementation a cathode for electrochemical metal removal has a generally disc-shaped body and a plurality of channels in the generally disc-shaped body, where the channels are configured for passing electrolyte through the body of the cathode. The channels may be fitted with non-conductive (e.g., plastic) tubes that in some embodiments extend above the body of the cathode to a height of at least 1 cm. The cathode may also include a plurality of indentations at the edge to facilitate electrolyte flow at the edge of the cathode. In some embodiments the cathode includes a plurality of non-conductive fixation elements on a conductive surface of the cathode, where the fixation elements are attachable to one or more handles for removing the cathode from the electrochemical metal removal apparatus.

Abstract: A substrate processing system includes a first chamber including a substrate support. A showerhead is arranged above the first chamber and is configured to filter ions and deliver radicals from a plasma source to the first chamber. The showerhead includes a heat transfer fluid plenum, a secondary gas plenum including an inlet to receive secondary gas and a plurality of secondary gas injectors to inject the secondary gas into the first chamber, and a plurality of through holes passing through the showerhead. The through holes are not in fluid communication with the heat transfer fluid plenum or the secondary gas plenum.

Abstract: A substrate processing system includes a processing chamber. A pedestal is arranged in the processing chamber. An edge coupling ring is arranged adjacent to the pedestal and around a radially outer edge of the substrate. An actuator is configured to selectively move a first portion of the edge coupling ring relative to the substrate to alter an edge coupling profile of the edge coupling ring.

Abstract: A method for etching features in a stack below a patterned mask in an etch chamber is provided. The stack is cooled with a coolant with a coolant temperature below ?20° C. An etch gas is flowed into the etch chamber. A plasma is generated from the etch gas. Features are selectively etched into the stack with respect to the patterned mask.

Abstract: A circuit tuning radio frequency (RF) power. The circuit includes a low to mid frequency (LF/HF) tuning circuit including a variable LF/MF capacitor coupled in series with an LF/MF inductor. The LF/MF tuning circuit is coupled between ground and a common node configured to receive an RF input. The circuit includes a high frequency (HF) tuning circuit coupled in parallel to the LF/MF tuning circuit between ground and the common node. The HF tuning circuit includes a variable HF capacitor coupled in series with an HF inductor. Cross parallel isolation occurs between the LF/MF inductor of the LF/MF tuning circuit and the HF inductor of the HF tuning circuit when adjusting the variable LF/MF capacitor or variable HF capacitor.

Abstract: A plasma processing system includes a plasma chamber having a substrate support, and a multi-zone gas injection upper electrode disposed opposite the substrate support. An inner plasma region is defined between the upper electrode and the substrate support. The multi-zone gas injection upper electrode has a plurality of concentric gas injection zones. A confinement structure, which surrounds the inner plasma region, has an upper horizontal wall that interfaces with the outer electrode of the upper electrode. The confinement structure has a lower horizontal wall that interfaces with the substrate support, and includes a perforated confinement ring and a vertical wall that extends from the upper horizontal wall to the lower horizontal wall. The lower surface of the upper horizontal wall, an inner surface of the vertical wall, and an upper surface of the lower horizontal wall define a boundary of an outer plasma region, which surrounds the inner plasma region.

Abstract: The embodiments herein relate to apparatuses and methods for electroplating one or more materials onto a substrate. Embodiments herein utilize a cross flow conduit in the electroplating cell to divert flow of fluid from a region between a substrate and a channeled ionically resistive plate positioned near the substrate down to a level lower than level of fluid in a fluid containment unit for collecting overflow fluid from the plating system for recirculation. The cross flow conduit can include channels cut into components of the plating cell to allow diverted flow, or can include an attachable diversion device mountable to an existing plating cell to divert flow downwards to the fluid containment unit. Embodiments also include a flow restrictor which may be a plate or a pressure relief valve for modulating flow of fluid in the cross flow conduit during plating.

Abstract: Systems and techniques for determining and correcting inter-wafer misalignments in a stack of wafers transported by a wafer handling robot. An enhanced automatic wafer centering system is provided that may be used to determine a smallest circle associated with the stack of wafers, which may then be used to determine whether or not the stack of wafer meets various process requirements and/or if a centering correction can be made to better align the wafers with a receiving station coordinate frame.

Abstract: Localized stresses can be modulated in a film deposited on a bowed semiconductor substrate by selectively and locally curing the film by ultraviolet (UV) radiation. A bowed semiconductor substrate can be asymmetrically bowed. A UV-curable film is deposited on the front side or the backside of the bowed semiconductor substrate. A mask is provided between the UV-curable film and a UV source, where openings in the mask are patterned to selectively define exposed regions and non-exposed regions of the UV-curable film. Exposed regions of the UV-curable film modulate localized stresses to mitigate bowing in the bowed semiconductor substrate.