Abstract: A novel use of a solid state light detector with a low impedance substrate is described. Light that enters the substrate after traversing the antireflective layer creates an electron-hole pair. The electrons are collected in a crystalline epitaxial layer that spans the space charge region, or depletion layer. A high electric field accelerates free electrons inside the depletion region. The electrons collide with the lattice to free more holes and electrons resulting from the presence of an n-p junction, or diode. The diode is formed by placing the crystalline layer which has positive doping in close proximity with the electrodes which have negative doping. The continual generation of charge carriers results in avalanche multiplication with a large multiplication coefficient. During the avalanche process, electrons can be collected enabling light detection. A resistive layer is used to quench, or stop, the avalanche process.

Abstract: An SRAM according to the present invention includes a voltage-down circuit and an internal circuit. The voltage-down circuit includes three resistors, two PMOS transistors and an NMOS transistor. One PMOS transistor directly applies an external power supply voltage to the internal circuit. The NMOS transistor applies a voltage obtained by reducing the external power supply voltage by a threshold voltage thereof to the internal circuit. The value of a predetermined voltage as a condition for switching such application of the voltage by the PMOS transistor and application Of the voltage by the NMOS transistor is determined by the resistance ratio of the two resistors. Each of the three resistors is formed by a plurality of resistance elements of one kind. Thus, even if the process parameter varies, the ratio of the resistance values of the two resistors which determines the switching point can be kept constant, thereby preventing variation in switching point.

Abstract: The present invention relates to a thin film transistor (TFT), liquid crystal display (LCD) and fabricating methods thereof, and more particularly to a TFT having source/drain lines on which an insulating layer and an active layer are located lie on an insulated substrate, to an LCD using the TFT and fabricating methods of the TFT and LCD. The TFT has a BBC (Buried Bus Coplanar) structure by forming a source/drain line on a substrate and by forming a buffer layer which covers the source/drain line which simplifies the process by means of reducing the number of deposition steps. The BBC structure of TFT has a source/drain line on a substrate, an insulating layer covering the source/drain line and the entire disclosed surface and a coplanar structure on the insulating layer. The present invention also provides a data line in the TFT of the BBC structure having low resistance applicable to a wide-screen by means of forming both the buffer layer and the source/drain line with a sufficient thickness.

Abstract: To improve the gettering performance by ion implanting boron and improves the production yield of the semiconductor device by using an epitaxial wafer of good quality suppressing the occurrence of dislocations. For this purpose, an epitaxial wafer in which an epitaxial layer of about 1 &mgr;m is formed to a CZ semiconductor substrate implanted with boron ions which are dopant and carbon ions which are not a dopant is provided, and transistors are formed on the surface of the epitaxial layer.

Abstract: A semiconductor light-receiving device includes a light-receiving section that receives an input light. The light-receiving section includes a light-receiving surface to which the input light is directed, a groove extending vertically into the light-receiving surface, and a thin film coated on the inside wall of the groove.

Abstract: Quantum-well sensing arrays for detecting radiation with two or more wavelengths. Each pixel includes at least two different quantum-well sensing stacks that are biased at a common voltage.

Abstract: A nitride-type III-V group compound semiconductor device includes a substrate and a layered structure including at least a channel layer using two-dimensional electron gas formed over a substrate, wherein the channel layer contains InN.

Abstract: A semiconductor device is constituted by a quantum-wave interference layer with plural periods of a pair of a first layer W and a second layer B. The second layer B has wider band gap than the first layer W. Each thickness of the first layer W and the second layer B is determined by multiplying by an odd number one fourth of wavelength of quantum-wave of carriers in each of the first layer W and the second layer B existing around the lowest energy level of the second layer B. A &dgr; layer, for sharply varying energy band, is formed at an every interface between the first layer W and the second layer B and has a thickness substantially thinner than the first layer W and the second layer B. The quantum-wave interference layer functions as a reflecting layer of carriers for higher reflectivity.

Abstract: Provided is a semiconductor device and a method of manufacturing the semiconductor device having a stacked type capacitor excellent in storage capacity, breakdown voltage and reliability. A storage node electrode (Ru) of the stacked-type capacitor is formed on a contact hole of the underlying insulating film by the steps of forming the side wall of the contact hole diagonally at a taper angle within the range of 90 to 110°, forming a storage node electrode on the inner wall surface of the contact hole, filling SOG in the contact hole, etching off the Ru film on the insulating film using SOG as a mask, and etching off the Ru film formed on the upper peripheral region of the inner wall in the depth direction of the contact hole. Thereafter, the dielectric film of the stacked-type capacitor formed of a (Ba, Sr) TiO3 thin film is formed on the Ru storage node electrode. In this manner, it is possible to obtain a stack-type capacitor having a drastically-improved step coverage and a high breakdown voltage.

Abstract: An ohmic contact including a gallium arsenide substrate having an epitaxially grown crystalline layer of indium arsenide on the substrate. The crystalline material and the substrate define an interface, layers are n-doped with silicon close to the interface.

Abstract: An inductor structure having a single crystal body with a spiral shaped pedestal formed in one surface and a ground plane conductor disposed over an opposite surface of the body. A spiral shaped conductor is disposed over the spiral shaped pedestal. Portions of the conductor are separated from underlying portions of the pedestal by air. Laterally adjacent portions of the conductor are separated by air. The single crystal body comprises gallium arsenide.

Abstract: An active layer is sandwiched between the n-type cladding layer and the p-type cladding layer, forming a light emitting layer forming portion. The n-type cladding layer has a carrier concentration of non-doped or less than 5.times.10.sup.17 cm.sup.-3 on a side thereof close to the active layer, and a carrier concentration of 7.times.10.sup.17 -7.times.10.sup.18 cm .sup.-3 on a side thereof remote from the active layer. With this structure, it is possible to suppress to a minimum the deterioration of crystallinity at an interface between the active layer and the n-type cladding layer as well as in the active layer. thereby providing a semiconductor light emitting device high in brightness.

Abstract: A Gunn diode includes a layered structure including at least a cathode layer, an anode layer, and an active region interposed between the cathode and anode layers, wherein at least a portion of the active region is an AlGaAs layer.

Abstract: A mother glass board used to fabricate multiple liquid crystal display panels includes a substrate on which the liquid crystal panel portions are formed. An orientation film is formed on the liquid crystal panel portions. A pattern of metallic film is formed on the substrate outside that portion of the substrate on which the liquid crystal panel portions are located. The patterns include an alignment mark and an identifier mark used in the liquid crystal panel production process. An enclosure surrounding the liquid crystal panel portions is formed on the substrate between the pattern and the liquid crystal panel portions. The enclosure prevents stripes from being formed on the orientation film during a rubbing step in the production process in which the liquid crystal panel portions are rubbed with a cloth.

Abstract: A gallium nitride type compound semiconductor light-emitting device of the present invention includes: a substrate; a buffer layer, formed on the substrate, having a thick region and a thin region in terms of a thickness taking a surface of the substrate as a reference level; and a semiconductor layered structure, formed on the buffer layer, at least including an undoped gallium nitride type compound semiconductor layer, a gallium nitride type compound semiconductor active layer, and a P-type gallium nitride type compound semiconductor cladding layer.

Abstract: A field emitter cell includes a thin film edge emitter normal to a gate layer. The field emitter is a multilayer structure including a low work function material sandwiched between two protective layers. The field emitter may be fabricated from a composite starting structure including a conductive substrate layer, an insulation layer, a standoff layer and a gate layer, with a perforation extending from the gate layer into the substrate layer. The emitter material is conformally deposited by chemical beam deposition along the sidewalls of the perforation. Alternatively, the starting material may be a conductive substrate having a protrusion thereon. The emitter layer, standoff layer, insulation layer, and gate layer are sequentially deposited, and the unwanted portions of each are preferentially removed to provide the desired structure.

Abstract: An optoelectronic semiconductor device, whereby at least one functional semiconductor structure is arranged on a II-V semiconductor substrate. Inventively, an electrically conductive III-V semiconductor substrate is provided that exhibits a charge carrier concentration of more than 1*10.sup.15 cm.sup.-3. At least one electrically insulating oxide layer is provided between the functional semiconductor structure and the III-V semiconductor substrate.

Abstract: Provided by the present invention is a II-VI compound semiconductor based light emitting device which is suppressed in the propagation velocity of crystal defects at the time of current application, has a prolonged lifetime and can be readily mass produced. The device has a recombination region and non-recombination region of carriers which have been separated spatially each other in the plane of the active layer.